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Merge branch 'FastAsynchIO' into simhv38-2-rc2

Browse source 
Conflicts:
	PDP11/pdp11_tq.c
	PDP11/pdp11_ts.c
	PDP11/pdp11_xq.h
	VAX/vax780_sbi.c
	VAX/vax_cpu.c
	makefile
	scp.c
	sim_defs.h
	sim_ether.c
	sim_timer.c
This commit is contained in:
Mark Pizzolato 2011-04-15 10:47:35 -07:00
commit fe8b1f06de
84 changed files with 15748 additions and 714 deletions
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161
0readmeAsynchIO.txt Normal file
View file

@ -0,0 +1,161 @@
SIM_ASYNCH_IO
Theory of operation.
Features.
- Optional Use. Build with or without SIM_ASYNCH_IO defined and
simulators will still build and perform correctly when run.
- Consistent Save/Restore state. The state of a simulator saved
on a simulator with (or without) Asynch support can be restored
on any simulator of the same version with or without Asynch
support.
- Optimal behavior/performance with simulator running with or
without CPU idling enabled.
- Consistent minimum instruction scheduling delays when operating
with or without SIM_ASYNCH_IO. When SIM_ASYNCH_IO is emabled,
any operation which would have been scheduled to occurr in 'n'
instructions will still occur (from the simulated computer's
point of view) at least 'n' instructions after it was initiated.
Benefits.
Allows a simulator to execute simulated instructions concurrently
with I/O operations which may take numerous milliseconds to perform.
Allows a simulated device to potentially avoid polling for the arrival
of data. Polling consumes host processor CPU cycles which may better
be spent executing simulated instructions or letting other host
processes run. Measurements made of available instruction execution
easily demonstrate the benefits of parallel instruction and I/O
activities. A VAX simulator with a process running a disk intensive
application in one process was able to process 11 X the number of
Dhrystone operations with Asynch I/O enabled.
Asynch I/O is provided through a callback model.
SimH Libraries which provide Asynch I/O support:
sim_disk
sim_tape
sim_ether
Requirements to use:
The Simulator's instruction loop needs to be modified to include a single
line which checks for asynchronouzly arrived events. The vax_cpu.c
module added the following line indicated by >>>:
/* Main instruction loop */
for ( ;; ) {
[...]
>>> AIO_CHECK_EVENT;
if (sim_interval <= 0) { /* chk clock queue */
temp = sim_process_event ();
if (temp)
ABORT (temp);
SET_IRQL; /* update interrupts */
}
A global variable (sim_asynch_latency) is used to indicate the "interrupt
dispatch latency". This variable is the number of nanoseconds between checks
for completed asynchronous I/O. The default value is 4000 (4 usec) which
corresponds reasonably with simulated hardware. This variable controls
the computation of sim_asynch_inst_latency which is the number of simulated
instructions in the sim_asynch_latency interval. We are trying to avoid
checking for completed asynchronous I/O after every instruction since the
actual checking every instruction can slow down execution. Periodic checks
provide a balance which allows response similar to real hardware while also
providing minimal impact on actual instruction execution. Meanwhile, if
maximal response is desired, then the value of sim_asynch_latency can be
set sufficiently low to assure that sim_asynch_inst_latency computes to 1.
The sim_asynch_inst_latency is dynamically updated once per second in the
sim_rtcn_calb routine where clock to instruction execution is dynamically
determined. A simulator would usually add register definitions
to enable viewing and setting of these variables via scp:
#if defined (SIM_ASYNCH_IO)
{ DRDATA (LATENCY, sim_asynch_latency, 32), PV_LEFT },
{ DRDATA (INST_LATENCY, sim_asynch_inst_latency, 32), PV_LEFT },
#endif
Naming conventions:
All of the routines implemented in sim_disk and sim_tape have been kept
in place. All routines which perform I/O have a variant routine available
with a "_a" appended to the the routine name with the addition of a single
parameter which indicates the asynch completion callback routine. For
example there now exists the routines:
t_stat sim_tape_rdrecf (UNIT *uptr, uint8 *buf, t_mtrlnt *bc, t_mtrlnt max);
t_stat sim_tape_rdrecf_a (UNIT *uptr, uint8 *buf, t_mtrlnt *bc, t_mtrlnt max, TAPE_PCALLBACK callback);
The Purpose of the callback function is to record the I/O completion status
and then to schedule the activation of the unit.
Considerations:
Avoiding multiple concurrent users of the unit structure. While asynch
I/O is pending on a Unit, the unit should not otherwise be on the event
queue. The I/O completion will cause the Unit to be scheduled to run
immediately to actually dispatch control flow to the callback routine.
The callback routine is always called in the same thread which is
executing instructions. Since all simulator device data structures are
only referenced from this thread there are no host multi-processor cache
coherency issues to be concerned about.
Arguments to the callback routine:
UNIT *, and IO Status
Requirements of the Callback routine.
The callback routine must save the I/O completion status in a place
which the next invocation of the unit service routine will reference
and act on it. This allows device code to return error conditions
back to scp in a consistent way without regard to how the callback
routine (and the actual I/O) may have been executed.
Required change in device coding.
Devices which wish to leverage the benefits of asynch I/O must rearrange
the code which implements the unit service routine. This rearrangement
usually entails breaking the activities into two phases. The first phase
(I'll call the top half) involves performing whatever is needed to
initiate a call to perform an I/O operation with a callback argument.
Control is then immediately returned to the scp event dispatcher.
The callback routine needs to be coded to stash away the io completion
status and some indicator that an I/O has completed.
The top/bottom half separation of the unit service routine would be
coded to examine the I/O completion indicator and invoke the bottom half
code upon completion. The bottom half code should clear the I/O
completion indicator and then perform any activities which normally
need to occur after the I/O completes. Care should be taken while
performing these top/bottom half activities to return to the scp event
dispatcher with either SCPE_OK or an appropriate error code when needed.
The need to return error indications to the scp event dispatcher is why
the bottom half activities can't simply be performed in the
callback routine (the callback routine does not return a status).
Care should also be taken to realize that local variables in the
unit service routine will not directly survive between the separate
top and bottom half calls to the unit service routine. If any such
information must be referenced in both the top and bottom half code paths
then it must either be recomputed prior to the top/bottom half check
or not stored in local variables of the unit service routine.
Run time requirements to use SIM_ASYNCH_IO.
The Posix threads API (pthreads) is required for asynchronous execution.
Most *nix platforms have these APIs available and on these platforms
simh is typically built with these available since on these platforms,
pthreads is required for simh networking support. Windows can also
utilize the pthreads APIs if the compile and run time support for the
win32Pthreads package has been installed on the build system and the
run time dll is available in the execution environment.
Sample Asynch I/O device implementations.
The pdp11_rq.c module has been refactored to leverage the asynch I/O
features of the sim_disk library. The impact to this code to adopt the
asynch I/O paradigm was quite minimal.
The pdp11_rp.c module has also been refactored to leverage the asynch I/O
features of the sim_disk library.
The pdp11_tq.c module has been refactored to leverage the asynch I/O
features of the sim_tape library. The impact to this code to adopt the
asynch I/O paradigm was very significant. This was due to the two facts:
1) there are many different operations which can be requested of tape
devices and 2) some of the tmscp operations required many separate
operations on the physical device layer to perform a single tmscp request.
This issue was addressed by adding additional routines to the physical
device layer (in sim_tape.c) which combined these multiple operations.
This approach will dovetail well with a potential future addition of
operations on physical tapes as yet another supported tape format.

2
ALTAIR/altair_cpu.c
View file

@ -141,7 +141,7 @@ device addresses, if a device is plugged to a port it's routine
address is here, 'nulldev' means no device is available address is here, 'nulldev' means no device is available
*/ */
struct idev { struct idev {
int32 (*routine)(); int32 (*routine)(int32, int32);
}; };
struct idev dev_table[256] = { struct idev dev_table[256] = {
{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 000 */ {&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 000 */

12
ALTAIR/altair_sio.c
View file

@ -122,7 +122,7 @@ DEVICE ptp_dev = {
/* service routine - actually gets char & places in buffer */ /* service routine - actually gets char & places in buffer */
int32 sio_svc (UNIT *uptr) t_stat sio_svc (UNIT *uptr)
{ {
int32 temp; int32 temp;
@ -139,12 +139,12 @@ int32 sio_svc (UNIT *uptr)
} }
int32 ptr_svc (UNIT *uptr) t_stat ptr_svc (UNIT *uptr)
{ {
return SCPE_OK; return SCPE_OK;
} }
int32 ptp_svc (UNIT *uptr) t_stat ptp_svc (UNIT *uptr)
{ {
return SCPE_OK; return SCPE_OK;
} }
@ -152,7 +152,7 @@ int32 ptp_svc (UNIT *uptr)
/* Reset routine */ /* Reset routine */
int32 sio_reset (DEVICE *dptr) t_stat sio_reset (DEVICE *dptr)
{ {
sio_unit.buf = 0; /* Data */ sio_unit.buf = 0; /* Data */
sio_unit.u3 = 0x02; /* Status */ sio_unit.u3 = 0x02; /* Status */
@ -161,7 +161,7 @@ int32 sio_reset (DEVICE *dptr)
} }
int32 ptr_reset (DEVICE *dptr) t_stat ptr_reset (DEVICE *dptr)
{ {
ptr_unit.buf = 0; ptr_unit.buf = 0;
ptr_unit.u3 = 0x02; ptr_unit.u3 = 0x02;
@ -169,7 +169,7 @@ int32 ptr_reset (DEVICE *dptr)
return SCPE_OK; return SCPE_OK;
} }
int32 ptp_reset (DEVICE *dptr) t_stat ptp_reset (DEVICE *dptr)
{ {
ptp_unit.buf = 0; ptp_unit.buf = 0;
ptp_unit.u3 = 0x02; ptp_unit.u3 = 0x02;

6
AltairZ80/altairZ80_sio.c
View file

@ -506,10 +506,10 @@ typedef struct {
int32 sio_can_read; /* bit mask to indicate that one can read from this port */ int32 sio_can_read; /* bit mask to indicate that one can read from this port */
int32 sio_cannot_read; /* bit mask to indicate that one cannot read from this port */ int32 sio_cannot_read; /* bit mask to indicate that one cannot read from this port */
int32 sio_can_write; /* bit mask to indicate that one can write to this port */ int32 sio_can_write; /* bit mask to indicate that one can write to this port */
int32 hasReset; /* TRUE iff SIO has reset command */ t_bool hasReset; /* TRUE iff SIO has reset command */
int32 sio_reset; /* reset command */ int32 sio_reset; /* reset command */
int32 hasOUT; /* TRUE iff port supports OUT command */ t_bool hasOUT; /* TRUE iff port supports OUT command */
int32 isBuiltin; /* TRUE iff mapping is built in */ t_bool isBuiltin; /* TRUE iff mapping is built in */
} SIO_PORT_INFO; } SIO_PORT_INFO;
static SIO_PORT_INFO port_table[PORT_TABLE_SIZE] = { static SIO_PORT_INFO port_table[PORT_TABLE_SIZE] = {

4
AltairZ80/altairz80_hdsk.c
View file

@ -632,8 +632,8 @@ static int32 doWrite(void) {
hdskbuf[i] = GetBYTEWrapper(selectedDMA + i); hdskbuf[i] = GetBYTEWrapper(selectedDMA + i);
rtn = sim_fwrite(hdskbuf, 1, uptr -> HDSK_SECTOR_SIZE, uptr -> fileref); rtn = sim_fwrite(hdskbuf, 1, uptr -> HDSK_SECTOR_SIZE, uptr -> fileref);
if (rtn != (size_t)(uptr -> HDSK_SECTOR_SIZE)) { if (rtn != (size_t)(uptr -> HDSK_SECTOR_SIZE)) {
TRACE_PRINT(VERBOSE_MSG, ("HDSK%d: " ADDRESS_FORMAT " Could not write Sector=%02d Track=%04d Result=%zd." NLP, TRACE_PRINT(VERBOSE_MSG, ("HDSK%d: " ADDRESS_FORMAT " Could not write Sector=%02d Track=%04d Result=%d." NLP,
selectedDisk, PCX, selectedSector, selectedTrack, rtn)); selectedDisk, PCX, selectedSector, selectedTrack, (int)rtn));
return CPM_ERROR; return CPM_ERROR;
} }
} }

4
AltairZ80/i8272.c
View file

@ -475,8 +475,8 @@ static char *messages[0x20] = {
uint8 I8272_Write(const uint32 Addr, uint8 cData) uint8 I8272_Write(const uint32 Addr, uint8 cData)
{ {
I8272_DRIVE_INFO *pDrive; I8272_DRIVE_INFO *pDrive;
unsigned int flags = 0; uint32 flags = 0;
unsigned int readlen; uint32 readlen;
uint8 disk_read = 0; uint8 disk_read = 0;
int32 i; int32 i;

8
AltairZ80/mfdc.c
View file

@ -421,8 +421,8 @@ static uint8 MFDC_Read(const uint32 Addr)
if(mfdc_info->datacount == 0) { if(mfdc_info->datacount == 0) {
unsigned int i, checksum; unsigned int i, checksum;
unsigned long sec_offset; unsigned long sec_offset;
unsigned int flags; uint32 flags;
unsigned int readlen; uint32 readlen;
/* Clear out unused portion of sector. */ /* Clear out unused portion of sector. */
memset(&sdata.u.unused[0], 0x00, 10); memset(&sdata.u.unused[0], 0x00, 10);
@ -524,8 +524,8 @@ static uint8 MFDC_Read(const uint32 Addr)
static uint8 MFDC_Write(const uint32 Addr, uint8 cData) static uint8 MFDC_Write(const uint32 Addr, uint8 cData)
{ {
unsigned int sec_offset; unsigned int sec_offset;
unsigned int flags = 0; uint32 flags = 0;
unsigned int writelen; uint32 writelen;
MFDC_DRIVE_INFO *pDrive; MFDC_DRIVE_INFO *pDrive;
pDrive = &mfdc_info->drive[mfdc_info->sel_drive]; pDrive = &mfdc_info->drive[mfdc_info->sel_drive];

4
AltairZ80/vfdhd.c
View file

@ -547,7 +547,7 @@ static void VFDHD_Command(void)
if(vfdhd_info->read == 1) { /* Perform a Read operation */ if(vfdhd_info->read == 1) { /* Perform a Read operation */
unsigned int i, checksum; unsigned int i, checksum;
unsigned int readlen; uint32 readlen;
TRACE_PRINT(RD_DATA_MSG, ("VFDHD: " ADDRESS_FORMAT " RD: Drive=%d, Track=%d, Head=%d, Sector=%d" NLP, TRACE_PRINT(RD_DATA_MSG, ("VFDHD: " ADDRESS_FORMAT " RD: Drive=%d, Track=%d, Head=%d, Sector=%d" NLP,
PCX, PCX,
@ -619,7 +619,7 @@ static void VFDHD_Command(void)
} }
} else { /* Perform a Write operation */ } else { /* Perform a Write operation */
unsigned int writelen; uint32 writelen;
TRACE_PRINT(WR_DATA_MSG, ("VFDHD: " ADDRESS_FORMAT " WR: Drive=%d, Track=%d, Head=%d, Sector=%d" NLP, TRACE_PRINT(WR_DATA_MSG, ("VFDHD: " ADDRESS_FORMAT " WR: Drive=%d, Track=%d, Head=%d, Sector=%d" NLP,
PCX, PCX,

12
AltairZ80/wd179x.c
View file

@ -445,8 +445,8 @@ uint8 WD179X_Read(const uint32 Addr)
{ {
uint8 cData; uint8 cData;
WD179X_DRIVE_INFO *pDrive; WD179X_DRIVE_INFO *pDrive;
unsigned int flags = 0; uint32 flags = 0;
unsigned int readlen; uint32 readlen;
int status; int status;
if(wd179x_info->sel_drive >= WD179X_MAX_DRIVES) { if(wd179x_info->sel_drive >= WD179X_MAX_DRIVES) {
@ -578,8 +578,8 @@ static uint8 Do1793Command(uint8 cCommand)
{ {
uint8 result = 0; uint8 result = 0;
WD179X_DRIVE_INFO *pDrive; WD179X_DRIVE_INFO *pDrive;
unsigned int flags = 0; uint32 flags = 0;
unsigned int readlen; uint32 readlen;
int status; int status;
if(wd179x_info->sel_drive >= WD179X_MAX_DRIVES) { if(wd179x_info->sel_drive >= WD179X_MAX_DRIVES) {
@ -955,8 +955,8 @@ uint8 WD179X_Write(const uint32 Addr, uint8 cData)
{ {
WD179X_DRIVE_INFO *pDrive; WD179X_DRIVE_INFO *pDrive;
/* uint8 disk_read = 0; */ /* uint8 disk_read = 0; */
unsigned int flags = 0; uint32 flags = 0;
unsigned int writelen; uint32 writelen;
if(wd179x_info->sel_drive >= WD179X_MAX_DRIVES) { if(wd179x_info->sel_drive >= WD179X_MAX_DRIVES) {
return 0xFF; return 0xFF;

12
Ibm1130/ibm1130_cpu.c
View file

@ -197,7 +197,7 @@ int32 int_mask; /* current active interrupt mask (ipl sensitive) */
int32 mem_mask; /* mask for memory address bits based on current memory size */ int32 mem_mask; /* mask for memory address bits based on current memory size */
int32 cpu_dsw = 0; /* CPU device status word */ int32 cpu_dsw = 0; /* CPU device status word */
int32 ibkpt_addr = -1; /* breakpoint addr */ int32 ibkpt_addr = -1; /* breakpoint addr */
int32 sim_gui = TRUE; /* enable gui */ t_bool sim_gui = TRUE; /* enable gui */
t_bool running = FALSE; /* TRUE if CPU is running */ t_bool running = FALSE; /* TRUE if CPU is running */
t_bool power = TRUE; /* TRUE if CPU power is on */ t_bool power = TRUE; /* TRUE if CPU power is on */
t_bool cgi = FALSE; /* TRUE if we are running as a CGI program */ t_bool cgi = FALSE; /* TRUE if we are running as a CGI program */
@ -222,7 +222,7 @@ t_stat cpu_set_type (UNIT *uptr, int32 value, char *cptr, void *desc);
void calc_ints (void); void calc_ints (void);
extern t_stat ts_wr (int32 data, int32 addr, int32 access); extern t_stat ts_wr (int32 data, int32 addr, int32 access);
extern t_stat detach_cmd (int flags, char *cptr); extern t_stat detach_cmd (int32 flags, char *cptr);
extern UNIT cr_unit; extern UNIT cr_unit;
extern int32 sim_switches; extern int32 sim_switches;
@ -230,7 +230,7 @@ extern int32 sim_switches;
static void archive_backtrace(char *inst); static void archive_backtrace(char *inst);
static void reset_backtrace (void); static void reset_backtrace (void);
static void show_backtrace (int nshow); static void show_backtrace (int nshow);
static t_stat backtrace_cmd (int flag, char *cptr); static t_stat backtrace_cmd (int32 flag, char *cptr);
#else #else
#define archive_backtrace(inst) #define archive_backtrace(inst)
#define reset_backtrace() #define reset_backtrace()
@ -245,7 +245,7 @@ extern int32 sim_switches;
static void init_console_window (void); static void init_console_window (void);
static void destroy_console_window (void); static void destroy_console_window (void);
static t_stat view_cmd (int flag, char *cptr); static t_stat view_cmd (int32 flag, char *cptr);
static t_stat cpu_attach (UNIT *uptr, char *cptr); static t_stat cpu_attach (UNIT *uptr, char *cptr);
static t_bool bsctest (int32 DSPLC, t_bool reset_V); static t_bool bsctest (int32 DSPLC, t_bool reset_V);
static void exit_irq (void); static void exit_irq (void);
@ -1556,7 +1556,7 @@ static void show_backtrace (int nshow)
putchar('\n'); putchar('\n');
} }
static t_stat backtrace_cmd (int flag, char *cptr) static t_stat backtrace_cmd (int32 flag, char *cptr)
{ {
int n; int n;
@ -1854,7 +1854,7 @@ void debug_print (char *fmt, ...)
/* view_cmd - let user view and/or edit a file (e.g. a printer output file, script, or source deck) */ /* view_cmd - let user view and/or edit a file (e.g. a printer output file, script, or source deck) */
static t_stat view_cmd (int flag, char *cptr) static t_stat view_cmd (int32 flag, char *cptr)
{ {
#ifdef _WIN32 #ifdef _WIN32
char cmdline[256]; char cmdline[256];

2
Ibm1130/ibm1130_cr.c
View file

@ -951,7 +951,7 @@ t_stat load_cr_boot (int drvno, int switches)
return SCPE_OK; return SCPE_OK;
} }
t_stat cr_boot (int unitno, DEVICE *dptr) t_stat cr_boot (int32 unitno, DEVICE *dptr)
{ {
t_stat rval; t_stat rval;
int i; int i;

4
Ibm1130/ibm1130_defs.h
View file

@ -47,7 +47,7 @@
extern int cgi; /* TRUE if we are running as a CGI program */ extern int cgi; /* TRUE if we are running as a CGI program */
extern int cgiwritable; /* TRUE if we can write the disk images back to the image file in CGI mode */ extern int cgiwritable; /* TRUE if we can write the disk images back to the image file in CGI mode */
extern int sim_gui; extern t_bool sim_gui;
extern uint16 M[]; /* core memory, up to 32Kwords (note: don't even think about trying 64K) */ extern uint16 M[]; /* core memory, up to 32Kwords (note: don't even think about trying 64K) */
extern uint16 ILSW[]; /* interrupt level status words */ extern uint16 ILSW[]; /* interrupt level status words */
@ -269,7 +269,7 @@ void xio_error (char *msg);
void bail (char *msg); void bail (char *msg);
t_stat load_cr_boot (int drv, int switches); t_stat load_cr_boot (int drv, int switches);
t_stat cr_boot (int unitno, DEVICE *dptr); t_stat cr_boot (int32 unitno, DEVICE *dptr);
t_stat cr_rewind (void); t_stat cr_rewind (void);
t_stat cr_detach (UNIT *uptr); t_stat cr_detach (UNIT *uptr);
void calc_ints (void); /* recalculate interrupt bitmask */ void calc_ints (void); /* recalculate interrupt bitmask */

16
Ibm1130/ibm1130_disk.c
View file

@ -43,9 +43,9 @@ extern int32 sim_switches;
extern int32 sim_quiet; extern int32 sim_quiet;
static int trace_dms = 0; static int trace_dms = 0;
static void tracesector (int iswrite, int nwords, int addr, int sector); static void tracesector (int iswrite, int nwords, int addr, int sector);
static t_stat where_cmd (int flag, char *ptr); static t_stat where_cmd (int32 flag, char *ptr);
static t_stat phdebug_cmd (int flag, char *ptr); static t_stat phdebug_cmd (int32 flag, char *ptr);
static t_stat fdump_cmd (int flags, char *cptr); static t_stat fdump_cmd (int32 flags, char *cptr);
static void enable_dms_tracing (int newsetting); static void enable_dms_tracing (int newsetting);
#endif #endif
@ -91,7 +91,7 @@ static t_stat dsk_svc (UNIT *uptr);
static t_stat dsk_reset (DEVICE *dptr); static t_stat dsk_reset (DEVICE *dptr);
static t_stat dsk_attach (UNIT *uptr, char *cptr); static t_stat dsk_attach (UNIT *uptr, char *cptr);
static t_stat dsk_detach (UNIT *uptr); static t_stat dsk_detach (UNIT *uptr);
static t_stat dsk_boot (int unitno, DEVICE *dptr); static t_stat dsk_boot (int32 unitno, DEVICE *dptr);
static void diskfail (UNIT *uptr, int dswflag, int unitflag, t_bool do_interrupt); static void diskfail (UNIT *uptr, int dswflag, int unitflag, t_bool do_interrupt);
@ -571,7 +571,7 @@ static t_stat dsk_detach (UNIT *uptr)
/* boot routine - if they type BOOT DSK, load the standard boot card. */ /* boot routine - if they type BOOT DSK, load the standard boot card. */
static t_stat dsk_boot (int unitno, DEVICE *dptr) static t_stat dsk_boot (int32 unitno, DEVICE *dptr)
{ {
t_stat rval; t_stat rval;
@ -644,7 +644,7 @@ char * saywhere (int addr)
static int phdebug_lo = -1, phdebug_hi = -1; static int phdebug_lo = -1, phdebug_hi = -1;
static t_stat phdebug_cmd (int flag, char *ptr) static t_stat phdebug_cmd (int32 flag, char *ptr)
{ {
int val1, val2; int val1, val2;
@ -671,7 +671,7 @@ static t_stat phdebug_cmd (int flag, char *ptr)
return SCPE_OK; return SCPE_OK;
} }
static t_stat where_cmd (int flag, char *ptr) static t_stat where_cmd (int32 flag, char *ptr)
{ {
int addr; int addr;
char *where; char *where;
@ -836,7 +836,7 @@ done:
savesector(addr, offset, nwords, phid, name); savesector(addr, offset, nwords, phid, name);
} }
static t_stat fdump_cmd (int flags, char *cptr) static t_stat fdump_cmd (int32 flags, char *cptr)
{ {
int addr = 0x7a24; /* address of next statement */ int addr = 0x7a24; /* address of next statement */
int sofst = 0x7a26, symaddr; int sofst = 0x7a26, symaddr;

2
Ibm1130/ibm1130_prt.c
View file

@ -637,7 +637,7 @@ static t_stat prt1403_svc(UNIT *uptr)
/* delete_cmd - SCP command to delete a file */ /* delete_cmd - SCP command to delete a file */
static t_stat delete_cmd (int flag, char *cptr) static t_stat delete_cmd (int32 flag, char *cptr)
{ {
char gbuf[CBUFSIZE]; char gbuf[CBUFSIZE];
int status; int status;

4
Ibm1130/ibm1130_ptrp.c
View file

@ -37,7 +37,7 @@ static t_stat ptr_svc (UNIT *uptr);
static t_stat ptr_reset (DEVICE *dptr); static t_stat ptr_reset (DEVICE *dptr);
static t_stat ptr_attach (UNIT *uptr, char *cptr); static t_stat ptr_attach (UNIT *uptr, char *cptr);
static t_stat ptr_detach (UNIT *uptr); static t_stat ptr_detach (UNIT *uptr);
static t_stat ptr_boot (int unitno, DEVICE *dptr); static t_stat ptr_boot (int32 unitno, DEVICE *dptr);
static t_stat ptp_svc (UNIT *uptr); static t_stat ptp_svc (UNIT *uptr);
static t_stat ptp_reset (DEVICE *dptr); static t_stat ptp_reset (DEVICE *dptr);
static t_stat ptp_attach (UNIT *uptr, char *cptr); static t_stat ptp_attach (UNIT *uptr, char *cptr);
@ -228,7 +228,7 @@ static t_stat ptr_detach (UNIT *uptr)
/* ptr_attach - perform paper tape initial program load */ /* ptr_attach - perform paper tape initial program load */
static t_stat ptr_boot (int unitno, DEVICE *dptr) static t_stat ptr_boot (int32 unitno, DEVICE *dptr)
{ {
int ch, nch, val, addr; int ch, nch, val, addr;
t_bool leader = TRUE, start = FALSE; t_bool leader = TRUE, start = FALSE;

4
NOVA/eclipse_cpu.c
View file

@ -5957,12 +5957,12 @@ int32 Debug_Entry(int32 PC, int32 inst, int32 inst2, int32 AC0, int32 AC1, int32
return 0; return 0;
} }
int32 Debug_Dump(UNIT *uptr, int32 val, char *cptr, void *desc) t_stat Debug_Dump(UNIT *uptr, int32 val, char *cptr, void *desc)
{ {
return SCPE_OK; return SCPE_OK;
} }
int32 Dump_History (FILE *st, UNIT *uptr, int32 val, void *desc) t_stat Dump_History (FILE *st, UNIT *uptr, int32 val, void *desc)
{ {
char debmap[4], debion[4]; char debmap[4], debion[4];
t_value simeval[20]; t_value simeval[20];

4
NOVA/nova_defs.h
View file

@ -228,14 +228,14 @@
struct ndev { struct ndev {
int32 mask; /* done/busy mask */ int32 mask; /* done/busy mask */
int32 pi; /* assigned pi bit */ int32 pi; /* assigned pi bit */
int32 (*routine)(); /* dispatch routine */ int32 (*routine)(int32, int32, int32); /* dispatch routine */
}; };
typedef struct { typedef struct {
int32 dnum; /* device number */ int32 dnum; /* device number */
int32 mask; /* done/busy mask */ int32 mask; /* done/busy mask */
int32 pi; /* assigned pi bit */ int32 pi; /* assigned pi bit */
int32 (*routine)(); /* dispatch routine */ int32 (*routine)(int32, int32, int32); /* dispatch routine */
} DIB; } DIB;
/* Device flags (simulator representation) /* Device flags (simulator representation)

3
NOVA/nova_sys.c
View file

@ -861,7 +861,8 @@ return SCPE_ARG;
char *get_addr (char *cptr, t_addr addr, t_bool ext, int32 cflag, int32 *val) char *get_addr (char *cptr, t_addr addr, t_bool ext, int32 cflag, int32 *val)
{ {
int32 d, r, x, pflag; int32 d, x, pflag;
t_stat r;
char gbuf[CBUFSIZE]; char gbuf[CBUFSIZE];
int32 dmax, dsign; int32 dmax, dsign;

12
PDP10/pdp10_cpu.c
View file

@ -446,24 +446,24 @@ const d10 bytemask[64] = { 0,
ONES, ONES, ONES, ONES, ONES, ONES, ONES, ONES, ONES ONES, ONES, ONES, ONES, ONES, ONES, ONES, ONES, ONES
}; };
static t_bool (*io700d[16])() = { static t_bool (*io700d[16])(a10, int32) = {
&aprid, NULL, NULL, NULL, &wrapr, &rdapr, &czapr, &coapr, &aprid, NULL, NULL, NULL, &wrapr, &rdapr, &czapr, &coapr,
NULL, NULL, NULL, NULL, &wrpi, &rdpi, &czpi, &copi NULL, NULL, NULL, NULL, &wrpi, &rdpi, &czpi, &copi
}; };
static t_bool (*io701d[16])() = { static t_bool (*io701d[16])(a10, int32) = {
NULL, &rdubr, &clrpt, &wrubr, &wrebr, &rdebr, NULL, NULL, NULL, &rdubr, &clrpt, &wrubr, &wrebr, &rdebr, NULL, NULL,
NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL
}; };
static t_bool (*io702d[16])() = { static t_bool (*io702d[16])(a10, int32) = {
&rdspb, &rdcsb, &rdpur, &rdcstm, &rdtim, &rdint, &rdhsb, NULL, &rdspb, &rdcsb, &rdpur, &rdcstm, &rdtim, &rdint, &rdhsb, NULL,
&wrspb, &wrcsb, &wrpur, &wrcstm, &wrtim, &wrint, &wrhsb, NULL &wrspb, &wrcsb, &wrpur, &wrcstm, &wrtim, &wrint, &wrhsb, NULL
}; };
#define io700i io700d #define io700i io700d
static t_bool (*io701i[16])() = { static t_bool (*io701i[16])(a10, int32) = {
&clrcsh, &rdubr, &clrpt, &wrubr, &wrebr, &rdebr, NULL, NULL, &clrcsh, &rdubr, &clrpt, &wrubr, &wrebr, &rdebr, NULL, NULL,
NULL, &rdpcst, NULL, &wrpcst, NULL, NULL, NULL, NULL NULL, &rdpcst, NULL, &wrpcst, NULL, NULL, NULL, NULL
}; };
static t_bool (*io702i[16])() = { static t_bool (*io702i[16])(a10, int32) = {
&sdbr1, &sdbr2, &sdbr3, &sdbr4, &rdtim, &rdint, &rdhsb, &spm, &sdbr1, &sdbr2, &sdbr3, &sdbr4, &rdtim, &rdint, &rdhsb, &spm,
&ldbr1, &ldbr2, &ldbr3, &ldbr4, &wrtim, &wrint, &wrhsb, &lpmr &ldbr1, &ldbr2, &ldbr3, &ldbr4, &wrtim, &wrint, &wrhsb, &lpmr
}; };
@ -697,7 +697,7 @@ for ( ;; ) { /* loop until ABORT */
int32 op, ac, i, st, xr, xct_cnt, its_2pr, pflgs; int32 op, ac, i, st, xr, xct_cnt, its_2pr, pflgs;
a10 ea; a10 ea;
d10 inst, mb, indrct, rs[2]; d10 inst, mb, indrct, rs[2];
t_bool (*fptr)(); t_bool (*fptr)(int32, int32);
pager_PC = PC; /* update pager PC */ pager_PC = PC; /* update pager PC */
pager_tc = FALSE; /* not in trap cycle */ pager_tc = FALSE; /* not in trap cycle */

1
PDP11/pdp11_mscp.h
View file

@ -84,6 +84,7 @@
#define MD_ACL 0x0002 /* t avl: all class NI */ #define MD_ACL 0x0002 /* t avl: all class NI */
#define MD_NXU 0x0001 /* b gus: next unit */ #define MD_NXU 0x0001 /* b gus: next unit */
#define MD_RIP 0x0001 /* d onl: allow rip NI */ #define MD_RIP 0x0001 /* d onl: allow rip NI */
#define MD_SPD 0x0001 /* d avl: spin-down */
/* End flags */ /* End flags */

118
PDP11/pdp11_rp.c
View file

@ -25,6 +25,10 @@
rp RH/RP/RM moving head disks rp RH/RP/RM moving head disks
06-Mar-11 MP Converted to using sim_disk library and refactored
for Asynch I/O.
Set STIME value to default of 26 which allows VMS V4.x
to boot.
17-May-07 RMS CS1 DVA resides in device, not MBA 17-May-07 RMS CS1 DVA resides in device, not MBA
21-Nov-05 RMS Enable/disable device also enables/disables Massbus adapter 21-Nov-05 RMS Enable/disable device also enables/disables Massbus adapter
12-Nov-05 RMS Fixed DriveClear, does not clear disk address 12-Nov-05 RMS Fixed DriveClear, does not clear disk address
@ -65,6 +69,7 @@
#endif #endif
#include "sim_disk.h"
#include <math.h> #include <math.h>
#define RP_CTRL 0 /* ctrl is RP */ #define RP_CTRL 0 /* ctrl is RP */
@ -93,6 +98,9 @@
/* Parameters in the unit descriptor */ /* Parameters in the unit descriptor */
#define CYL u3 /* current cylinder */ #define CYL u3 /* current cylinder */
#define sectsread u4 /* sectors read */
#define io_status u5 /* io status from callback */
#define io_complete u6 /* io completion flag */
/* RPCS1, RMCS1 - control/status 1 - offset 0 */ /* RPCS1, RMCS1 - control/status 1 - offset 0 */
@ -319,19 +327,20 @@ struct drvtyp {
int32 size; /* #blocks */ int32 size; /* #blocks */
int32 devtype; /* device type */ int32 devtype; /* device type */
int32 ctrl; /* ctrl type */ int32 ctrl; /* ctrl type */
char *name; /* device type name */
}; };
static struct drvtyp drv_tab[] = { static struct drvtyp drv_tab[] = {
{ RM03_SECT, RM03_SURF, RM03_CYL, RM03_SIZE, RM03_DEV, RM_CTRL }, { RM03_SECT, RM03_SURF, RM03_CYL, RM03_SIZE, RM03_DEV, RM_CTRL, "RM03" },
{ RP04_SECT, RP04_SURF, RP04_CYL, RP04_SIZE, RP04_DEV, RP_CTRL }, { RP04_SECT, RP04_SURF, RP04_CYL, RP04_SIZE, RP04_DEV, RP_CTRL, "RP04" },
{ RM80_SECT, RM80_SURF, RM80_CYL, RM80_SIZE, RM80_DEV, RM_CTRL }, { RM80_SECT, RM80_SURF, RM80_CYL, RM80_SIZE, RM80_DEV, RM_CTRL, "RM80" },
{ RP06_SECT, RP06_SURF, RP06_CYL, RP06_SIZE, RP06_DEV, RP_CTRL }, { RP06_SECT, RP06_SURF, RP06_CYL, RP06_SIZE, RP06_DEV, RP_CTRL, "RP06" },
{ RM05_SECT, RM05_SURF, RM05_CYL, RM05_SIZE, RM05_DEV, RM_CTRL }, { RM05_SECT, RM05_SURF, RM05_CYL, RM05_SIZE, RM05_DEV, RM_CTRL, "RM05" },
{ RP07_SECT, RP07_SURF, RP07_CYL, RP07_SIZE, RP07_DEV, RM_CTRL }, { RP07_SECT, RP07_SURF, RP07_CYL, RP07_SIZE, RP07_DEV, RM_CTRL, "RP07" },
{ 0 } { 0 }
}; };
uint16 *rpxb = NULL; /* xfer buffer */ uint16 *rpxb[RP_NUMDR] = { 0 }; /* xfer buffer */
uint16 rpcs1[RP_NUMDR] = { 0 }; /* control/status 1 */ uint16 rpcs1[RP_NUMDR] = { 0 }; /* control/status 1 */
uint16 rpda[RP_NUMDR] = { 0 }; /* track/sector */ uint16 rpda[RP_NUMDR] = { 0 }; /* track/sector */
uint16 rpds[RP_NUMDR] = { 0 }; /* drive status */ uint16 rpds[RP_NUMDR] = { 0 }; /* drive status */
@ -346,7 +355,7 @@ uint16 rper3[RP_NUMDR] = { 0 }; /* error status 3 */
uint16 rpec1[RP_NUMDR] = { 0 }; /* ECC correction 1 */ uint16 rpec1[RP_NUMDR] = { 0 }; /* ECC correction 1 */
uint16 rpec2[RP_NUMDR] = { 0 }; /* ECC correction 2 */ uint16 rpec2[RP_NUMDR] = { 0 }; /* ECC correction 2 */
int32 rp_stopioe = 1; /* stop on error */ int32 rp_stopioe = 1; /* stop on error */
int32 rp_swait = 10; /* seek time */ int32 rp_swait = 26; /* seek time */
int32 rp_rwait = 10; /* rotate time */ int32 rp_rwait = 10; /* rotate time */
static const char *rp_fname[CS1_N_FNC] = { static const char *rp_fname[CS1_N_FNC] = {
"NOP", "UNLD", "SEEK", "RECAL", "DCLR", "RLS", "OFFS", "RETN", "NOP", "UNLD", "SEEK", "RECAL", "DCLR", "RLS", "OFFS", "RETN",
@ -767,6 +776,15 @@ int32 rp_abort (void)
return rp_reset (&rp_dev); return rp_reset (&rp_dev);
} }
/* I/O completion callback */
void rp_io_complete (UNIT *uptr, t_stat status)
{
uptr->io_status = status;
uptr->io_complete = 1;
sim_activate (uptr, 0);
}
/* Service unit timeout /* Service unit timeout
Complete movement or data transfer command Complete movement or data transfer command
@ -791,9 +809,9 @@ if ((uptr->flags & UNIT_ATT) == 0) { /* not attached? */
rp_update_ds (DS_ATA, drv); /* set attn */ rp_update_ds (DS_ATA, drv); /* set attn */
return (rp_stopioe? SCPE_UNATT: SCPE_OK); return (rp_stopioe? SCPE_UNATT: SCPE_OK);
} }
rpds[drv] = (rpds[drv] & ~DS_PIP) | DS_RDY; /* change drive status */
switch (fnc) { /* case on function */ if (!uptr->io_complete) { /* Top End (I/O Initiation) Processing */
switch (fnc) { /* case on function */
case FNC_OFFSET: /* offset */ case FNC_OFFSET: /* offset */
rp_update_ds (DS_OFM | DS_ATA, drv); rp_update_ds (DS_OFM | DS_ATA, drv);
@ -824,7 +842,6 @@ switch (fnc) { /* case on function */
case FNC_WCHK: /* write check */ case FNC_WCHK: /* write check */
case FNC_READ: /* read */ case FNC_READ: /* read */
case FNC_READH: /* read headers */ case FNC_READH: /* read headers */
err = fseek (uptr->fileref, da * sizeof (int16), SEEK_SET);
mbc = mba_get_bc (rp_dib.ba); /* get byte count */ mbc = mba_get_bc (rp_dib.ba); /* get byte count */
wc = (mbc + 1) >> 1; /* convert to words */ wc = (mbc + 1) >> 1; /* convert to words */
if ((da + wc) > drv_tab[dtype].size) { /* disk overrun? */ if ((da + wc) > drv_tab[dtype].size) { /* disk overrun? */
@ -838,24 +855,56 @@ switch (fnc) { /* case on function */
} }
} }
if (fnc == FNC_WRITE) { /* write? */ if (fnc == FNC_WRITE) { /* write? */
abc = mba_rdbufW (rp_dib.ba, mbc, rpxb); /* get buffer */ abc = mba_rdbufW (rp_dib.ba, mbc, rpxb[drv]);/* get buffer */
wc = (abc + 1) >> 1; /* actual # wds */ wc = (abc + 1) >> 1; /* actual # wds */
awc = (wc + (RP_NUMWD - 1)) & ~(RP_NUMWD - 1); awc = (wc + (RP_NUMWD - 1)) & ~(RP_NUMWD - 1);
for (i = wc; i < awc; i++) /* fill buf */ for (i = wc; i < awc; i++) /* fill buf */
rpxb[i] = 0; rpxb[drv][i] = 0;
if (wc && !err) { /* write buf */ sim_disk_wrsect_a (uptr, da/RP_NUMWD, (void *)rpxb[drv], NULL, awc/RP_NUMWD, rp_io_complete);
fxwrite (rpxb, sizeof (uint16), awc, uptr->fileref); return SCPE_OK;
err = ferror (uptr->fileref);
}
} /* end if wr */ } /* end if wr */
else { /* read or wchk */ else { /* read or wchk */
awc = fxread (rpxb, sizeof (uint16), wc, uptr->fileref); awc = (wc + (RP_NUMWD - 1)) & ~(RP_NUMWD - 1);
err = ferror (uptr->fileref); sim_disk_rdsect_a (uptr, da/RP_NUMWD, (void *)rpxb[drv], (t_seccnt*)&uptr->sectsread, awc/RP_NUMWD, rp_io_complete);
return SCPE_OK;
} /* end if read */
case FNC_WRITEH: /* write headers stub */
mba_set_don (rp_dib.ba); /* set done */
rp_update_ds (0, drv); /* update ds */
break;
} /* end case func */
}
else { /* Bottom End (After I/O processing) */
uptr->io_complete = 0;
err = uptr->io_status;
switch (fnc) { /* case on function */
case FNC_OFFSET: /* offset */
case FNC_RETURN: /* return to centerline */
case FNC_UNLOAD: /* unload */
case FNC_RECAL: /* recalibrate */
case FNC_SEARCH: /* search */
case FNC_SEEK: /* seek */
case FNC_WRITEH: /* write headers stub */
break;
case FNC_WRITE: /* write */
case FNC_WCHK: /* write check */
case FNC_READ: /* read */
case FNC_READH: /* read headers */
mbc = mba_get_bc (rp_dib.ba); /* get byte count */
wc = (mbc + 1) >> 1; /* convert to words */
if (fnc == FNC_WRITE) { /* write? */
} /* end if wr */
else { /* read or wchk */
awc = uptr->sectsread * RP_NUMWD;
for (i = awc; i < wc; i++) /* fill buf */ for (i = awc; i < wc; i++) /* fill buf */
rpxb[i] = 0; rpxb[drv][i] = 0;
if (fnc == FNC_WCHK) /* write check? */ if (fnc == FNC_WCHK) /* write check? */
mba_chbufW (rp_dib.ba, mbc, rpxb); /* check vs mem */ mba_chbufW (rp_dib.ba, mbc, rpxb[drv]); /* check vs mem */
else mba_wrbufW (rp_dib.ba, mbc, rpxb); /* store in mem */ else mba_wrbufW (rp_dib.ba, mbc, rpxb[drv]);/* store in mem */
} /* end if read */ } /* end if read */
da = da + wc + (RP_NUMWD - 1); da = da + wc + (RP_NUMWD - 1);
if (da >= drv_tab[dtype].size) if (da >= drv_tab[dtype].size)
@ -872,15 +921,15 @@ switch (fnc) { /* case on function */
mba_set_exc (rp_dib.ba); /* set exception */ mba_set_exc (rp_dib.ba); /* set exception */
rp_update_ds (DS_ATA, drv); rp_update_ds (DS_ATA, drv);
perror ("RP I/O error"); perror ("RP I/O error");
clearerr (uptr->fileref);
return SCPE_IOERR; return SCPE_IOERR;
} }
case FNC_WRITEH: /* write headers stub */
mba_set_don (rp_dib.ba); /* set done */ mba_set_don (rp_dib.ba); /* set done */
rp_update_ds (0, drv); /* update ds */ rp_update_ds (0, drv); /* update ds */
break; break;
} /* end case func */ } /* end case func */
}
rpds[drv] = (rpds[drv] & ~DS_PIP) | DS_RDY; /* change drive status */
if (DEBUG_PRS (rp_dev)) if (DEBUG_PRS (rp_dev))
fprintf (sim_deb, ">>RP%d DONE: fnc=%s, ds=%o, cyl=%o, da=%o, er=%d\n", fprintf (sim_deb, ">>RP%d DONE: fnc=%s, ds=%o, cyl=%o, da=%o, er=%d\n",
@ -963,11 +1012,11 @@ for (i = 0; i < RP_NUMDR; i++) {
rpec2[i] = 0; rpec2[i] = 0;
rmmr2[i] = 0; rmmr2[i] = 0;
rmhr[i] = 0; rmhr[i] = 0;
} if (rpxb[i] == NULL)
if (rpxb == NULL) rpxb[i] = (uint16 *) calloc (RP_MAXFR, sizeof (uint16));
rpxb = (uint16 *) calloc (RP_MAXFR, sizeof (uint16)); if (rpxb[i] == NULL)
if (rpxb == NULL)
return SCPE_MEM; return SCPE_MEM;
}
return SCPE_OK; return SCPE_OK;
} }
@ -979,7 +1028,9 @@ int32 drv, i, p;
t_stat r; t_stat r;
uptr->capac = drv_tab[GET_DTYPE (uptr->flags)].size; uptr->capac = drv_tab[GET_DTYPE (uptr->flags)].size;
r = attach_unit (uptr, cptr); /* attach unit */ r = sim_disk_attach (uptr, cptr, RP_NUMWD * sizeof (uint16),
sizeof (uint16), TRUE, 0,
drv_tab[GET_DTYPE (uptr->flags)].name, drv_tab[GET_DTYPE (uptr->flags)].sect);
if (r != SCPE_OK) /* error? */ if (r != SCPE_OK) /* error? */
return r; return r;
drv = (int32) (uptr - rp_dev.units); /* get drv number */ drv = (int32) (uptr - rp_dev.units); /* get drv number */
@ -988,14 +1039,9 @@ rpds[drv] = DS_MOL | DS_RDY | DS_DPR | /* upd drv status */
rper1[drv] = 0; rper1[drv] = 0;
rp_update_ds (DS_ATA, drv); /* upd ctlr status */ rp_update_ds (DS_ATA, drv); /* upd ctlr status */
if ((p = sim_fsize (uptr->fileref)) == 0) { /* new disk image? */
if (uptr->flags & UNIT_RO)
return SCPE_OK;
return pdp11_bad_block (uptr,
drv_tab[GET_DTYPE (uptr->flags)].sect, RP_NUMWD);
}
if ((uptr->flags & UNIT_AUTO) == 0) /* autosize? */ if ((uptr->flags & UNIT_AUTO) == 0) /* autosize? */
return SCPE_OK; return SCPE_OK;
p = (int32)sim_disk_size (uptr);
for (i = 0; drv_tab[i].sect != 0; i++) { for (i = 0; drv_tab[i].sect != 0; i++) {
if (p <= (drv_tab[i].size * (int) sizeof (int16))) { if (p <= (drv_tab[i].size * (int) sizeof (int16))) {
uptr->flags = (uptr->flags & ~UNIT_DTYPE) | (i << UNIT_V_DTYPE); uptr->flags = (uptr->flags & ~UNIT_DTYPE) | (i << UNIT_V_DTYPE);
@ -1017,7 +1063,7 @@ if (!(uptr->flags & UNIT_ATT)) /* attached? */
drv = (int32) (uptr - rp_dev.units); /* get drv number */ drv = (int32) (uptr - rp_dev.units); /* get drv number */
rpds[drv] = rpds[drv] & ~(DS_MOL | DS_RDY | DS_WRL | DS_VV | DS_OFM); rpds[drv] = rpds[drv] & ~(DS_MOL | DS_RDY | DS_WRL | DS_VV | DS_OFM);
rp_update_ds (DS_ATA, drv); /* request intr */ rp_update_ds (DS_ATA, drv); /* request intr */
return detach_unit (uptr); return sim_disk_detach (uptr);
} }
/* Set size command validation routine */ /* Set size command validation routine */

291
PDP11/pdp11_rq.c
View file

@ -26,6 +26,19 @@
rq RQDX3 disk controller rq RQDX3 disk controller
07-Mar-11 MP Added working behaviors for removable device types.
This allows physical CDROM's to come online and be
ejected.
02-Mar-11 MP Fixed missing information from save/restore which
caused operations to not complete correctly after
a restore until the OS reset the controller.
02-Feb-11 MP Added Autosize support to rq_attach
28-Jan-11 MP Adopted use of sim_disk disk I/O library
- added support for the multiple formats sim_disk
provides (SimH, RAW, and VHD)
- adjusted to potentially leverage asynch I/O when
available
- Added differing detailed debug output via sim_debug
14-Jan-09 JH Added support for RD32 disc drive 14-Jan-09 JH Added support for RD32 disc drive
18-Jun-07 RMS Added UNIT_IDLE flag to timer thread 18-Jun-07 RMS Added UNIT_IDLE flag to timer thread
31-Oct-05 RMS Fixed address width for large files 31-Oct-05 RMS Fixed address width for large files
@ -97,6 +110,7 @@ extern int32 cpu_opt;
#include "pdp11_uqssp.h" #include "pdp11_uqssp.h"
#include "pdp11_mscp.h" #include "pdp11_mscp.h"
#include "sim_disk.h"
#define UF_MSK (UF_CMR|UF_CMW) /* settable flags */ #define UF_MSK (UF_CMR|UF_CMW) /* settable flags */
@ -129,20 +143,25 @@ extern int32 cpu_opt;
#define UNIT_V_ATP (UNIT_V_UF + 2) /* attn pending */ #define UNIT_V_ATP (UNIT_V_UF + 2) /* attn pending */
#define UNIT_V_DTYPE (UNIT_V_UF + 3) /* drive type */ #define UNIT_V_DTYPE (UNIT_V_UF + 3) /* drive type */
#define UNIT_M_DTYPE 0x1F #define UNIT_M_DTYPE 0x1F
#define UNIT_V_NOAUTO (UNIT_V_UF + 8) /* noautosize */
#define UNIT_ONL (1 << UNIT_V_ONL) #define UNIT_ONL (1 << UNIT_V_ONL)
#define UNIT_WLK (1 << UNIT_V_WLK) #define UNIT_WLK (1 << UNIT_V_WLK)
#define UNIT_ATP (1 << UNIT_V_ATP) #define UNIT_ATP (1 << UNIT_V_ATP)
#define UNIT_NOAUTO (1 << UNIT_V_NOAUTO)
#define UNIT_DTYPE (UNIT_M_DTYPE << UNIT_V_DTYPE) #define UNIT_DTYPE (UNIT_M_DTYPE << UNIT_V_DTYPE)
#define GET_DTYPE(x) (((x) >> UNIT_V_DTYPE) & UNIT_M_DTYPE) #define GET_DTYPE(x) (((x) >> UNIT_V_DTYPE) & UNIT_M_DTYPE)
#define cpkt u3 /* current packet */ #define cpkt u3 /* current packet */
#define pktq u4 /* packet queue */ #define pktq u4 /* packet queue */
#define uf buf /* settable unit flags */ #define uf buf /* settable unit flags */
#define cnum wait /* controller index */ #define cnum wait /* controller index */
#define io_status u5 /* io status from callback */
#define io_complete u6 /* io completion flag */
#define rqxb filebuf /* xfer buffer */
#define UNIT_WPRT (UNIT_WLK | UNIT_RO) /* write prot */ #define UNIT_WPRT (UNIT_WLK | UNIT_RO) /* write prot */
#define RQ_RMV(u) ((drv_tab[GET_DTYPE (u->flags)].flgs & RQDF_RMV)? \ #define RQ_RMV(u) ((drv_tab[GET_DTYPE (u->flags)].flgs & RQDF_RMV)? \
UF_RMV: 0) UF_RMV: 0)
#define RQ_WPH(u) (((drv_tab[GET_DTYPE (u->flags)].flgs & RQDF_RO) || \ #define RQ_WPH(u) (((drv_tab[GET_DTYPE (u->flags)].flgs & RQDF_RO) || \
(u->flags & UNIT_WPRT))? UF_WPH: 0) (u->flags & UNIT_WPRT) || sim_disk_wrp (u))? UF_WPH: 0)
#define CST_S1 0 /* init stage 1 */ #define CST_S1 0 /* init stage 1 */
#define CST_S1_WR 1 /* stage 1 wrap */ #define CST_S1_WR 1 /* stage 1 wrap */
@ -567,7 +586,6 @@ extern FILE *sim_deb;
extern uint32 sim_taddr_64; extern uint32 sim_taddr_64;
extern int32 sim_switches; extern int32 sim_switches;
uint16 *rqxb = NULL; /* xfer buffer */
int32 rq_itime = 200; /* init time, except */ int32 rq_itime = 200; /* init time, except */
int32 rq_itime4 = 10; /* stage 4 */ int32 rq_itime4 = 10; /* stage 4 */
int32 rq_qtime = RQ_QTIME; /* queue time */ int32 rq_qtime = RQ_QTIME; /* queue time */
@ -597,7 +615,56 @@ typedef struct {
struct rqpkt pak[RQ_NPKTS]; /* packet queue */ struct rqpkt pak[RQ_NPKTS]; /* packet queue */
} MSC; } MSC;
DEVICE rq_dev, rqb_dev, rqc_dev,rqd_dev; /* debugging bitmaps */
#define DBG_TRC 0x0001 /* trace routine calls */
#define DBG_INI 0x0002 /* display setup/init sequence info */
#define DBG_REG 0x0004 /* trace read/write registers */
#define DBG_REQ 0x0008 /* display transfer requests */
#define DBG_DSK 0x0010 /* display sim_disk activities */
#define DBG_DAT 0x0020 /* display transfer data */
DEBTAB rq_debug[] = {
{"TRACE", DBG_TRC},
{"INIT", DBG_INI},
{"REG", DBG_REG},
{"REQ", DBG_REQ},
{"DISK", DBG_DSK},
{"DATA", DBG_DAT},
{0}
};
static char *rq_cmdname[] = {
"", /* 0 */
"ABO", /* 1 b: abort */
"GCS", /* 2 b: get command status */
"GUS", /* 3 b: get unit status */
"SCC", /* 4 b: set controller char */
"","","", /* 5-7 */
"AVL", /* 8 b: available */
"ONL", /* 9 b: online */
"SUC", /* 10 b: set unit char */
"DAP", /* 11 b: det acc paths - nop */
"","","","", /* 12-15 */
"ACC", /* 16 b: access */
"CCD", /* 17 d: compare - nop */
"ERS", /* 18 b: erase */
"FLU", /* 19 d: flush - nop */
"","", /* 20-21 */
"ERG", /* 22 t: erase gap */
"","","","","","","","","", /* 23-31 */
"CMP", /* 32 b: compare */
"RD", /* 33 b: read */
"WR", /* 34 b: write */
"", /* 35 */
"WTM", /* 36 t: write tape mark */
"POS", /* 37 t: reposition */
"","","","","","","","","", /* 38-46 */
"FMT", /* 47 d: format */
"","","","","","","","","","","","","","","","", /* 48-63 */
"AVA", /* 64 b: unit now avail */
};
DEVICE rq_dev, rqb_dev, rqc_dev, rqd_dev;
t_stat rq_rd (int32 *data, int32 PA, int32 access); t_stat rq_rd (int32 *data, int32 PA, int32 access);
t_stat rq_wr (int32 data, int32 PA, int32 access); t_stat rq_wr (int32 data, int32 PA, int32 access);
@ -686,9 +753,11 @@ REG rq_reg[] = {
{ GRDATA (SAW, rq_ctx.saw, DEV_RDX, 16, 0) }, { GRDATA (SAW, rq_ctx.saw, DEV_RDX, 16, 0) },
{ GRDATA (S1DAT, rq_ctx.s1dat, DEV_RDX, 16, 0) }, { GRDATA (S1DAT, rq_ctx.s1dat, DEV_RDX, 16, 0) },
{ GRDATA (COMM, rq_ctx.comm, DEV_RDX, 22, 0) }, { GRDATA (COMM, rq_ctx.comm, DEV_RDX, 22, 0) },
{ GRDATA (CQIOFF, rq_ctx.cq.ioff, DEV_RDX, 32, 0) },
{ GRDATA (CQBA, rq_ctx.cq.ba, DEV_RDX, 22, 0) }, { GRDATA (CQBA, rq_ctx.cq.ba, DEV_RDX, 22, 0) },
{ GRDATA (CQLNT, rq_ctx.cq.lnt, DEV_RDX, 8, 2), REG_NZ }, { GRDATA (CQLNT, rq_ctx.cq.lnt, DEV_RDX, 8, 2), REG_NZ },
{ GRDATA (CQIDX, rq_ctx.cq.idx, DEV_RDX, 8, 2) }, { GRDATA (CQIDX, rq_ctx.cq.idx, DEV_RDX, 8, 2) },
{ GRDATA (RQIOFF, rq_ctx.rq.ioff, DEV_RDX, 32, 0) },
{ GRDATA (RQBA, rq_ctx.rq.ba, DEV_RDX, 22, 0) }, { GRDATA (RQBA, rq_ctx.rq.ba, DEV_RDX, 22, 0) },
{ GRDATA (RQLNT, rq_ctx.rq.lnt, DEV_RDX, 8, 2), REG_NZ }, { GRDATA (RQLNT, rq_ctx.rq.lnt, DEV_RDX, 8, 2), REG_NZ },
{ GRDATA (RQIDX, rq_ctx.rq.idx, DEV_RDX, 8, 2) }, { GRDATA (RQIDX, rq_ctx.rq.idx, DEV_RDX, 8, 2) },
@ -774,6 +843,10 @@ MTAB rq_mod[] = {
&rq_set_type, NULL, NULL }, &rq_set_type, NULL, NULL },
{ MTAB_XTD | MTAB_VUN, 0, "TYPE", NULL, { MTAB_XTD | MTAB_VUN, 0, "TYPE", NULL,
NULL, &rq_show_type, NULL }, NULL, &rq_show_type, NULL },
{ UNIT_NOAUTO, UNIT_NOAUTO, "noautosize", "NOAUTOSIZE", NULL },
{ UNIT_NOAUTO, 0, "autosize", "AUTOSIZE", NULL },
{ MTAB_XTD | MTAB_VUN, 0, "FORMAT", "FORMAT",
&sim_disk_set_fmt, &sim_disk_show_fmt, NULL },
#if defined (VM_PDP11) #if defined (VM_PDP11)
{ MTAB_XTD|MTAB_VDV, 004, "ADDRESS", "ADDRESS", { MTAB_XTD|MTAB_VDV, 004, "ADDRESS", "ADDRESS",
&set_addr, &show_addr, NULL }, &set_addr, &show_addr, NULL },
@ -793,7 +866,8 @@ DEVICE rq_dev = {
RQ_NUMDR + 2, DEV_RDX, T_ADDR_W, 2, DEV_RDX, 16, RQ_NUMDR + 2, DEV_RDX, T_ADDR_W, 2, DEV_RDX, 16,
NULL, NULL, &rq_reset, NULL, NULL, &rq_reset,
&rq_boot, &rq_attach, &rq_detach, &rq_boot, &rq_attach, &rq_detach,
&rq_dib, DEV_FLTA | DEV_DISABLE | DEV_UBUS | DEV_QBUS | DEV_DEBUG &rq_dib, DEV_FLTA | DEV_DISABLE | DEV_UBUS | DEV_QBUS | DEV_DEBUG,
0, rq_debug
}; };
/* RQB data structures /* RQB data structures
@ -829,9 +903,11 @@ REG rqb_reg[] = {
{ GRDATA (SAW, rqb_ctx.saw, DEV_RDX, 16, 0) }, { GRDATA (SAW, rqb_ctx.saw, DEV_RDX, 16, 0) },
{ GRDATA (S1DAT, rqb_ctx.s1dat, DEV_RDX, 16, 0) }, { GRDATA (S1DAT, rqb_ctx.s1dat, DEV_RDX, 16, 0) },
{ GRDATA (COMM, rqb_ctx.comm, DEV_RDX, 22, 0) }, { GRDATA (COMM, rqb_ctx.comm, DEV_RDX, 22, 0) },
{ GRDATA (CQIOFF, rqb_ctx.cq.ioff, DEV_RDX, 32, 0) },
{ GRDATA (CQBA, rqb_ctx.cq.ba, DEV_RDX, 22, 0) }, { GRDATA (CQBA, rqb_ctx.cq.ba, DEV_RDX, 22, 0) },
{ GRDATA (CQLNT, rqb_ctx.cq.lnt, DEV_RDX, 8, 2), REG_NZ }, { GRDATA (CQLNT, rqb_ctx.cq.lnt, DEV_RDX, 8, 2), REG_NZ },
{ GRDATA (CQIDX, rqb_ctx.cq.idx, DEV_RDX, 8, 2) }, { GRDATA (CQIDX, rqb_ctx.cq.idx, DEV_RDX, 8, 2) },
{ GRDATA (RQIOFF, rqb_ctx.rq.ioff, DEV_RDX, 32, 0) },
{ GRDATA (RQBA, rqb_ctx.rq.ba, DEV_RDX, 22, 0) }, { GRDATA (RQBA, rqb_ctx.rq.ba, DEV_RDX, 22, 0) },
{ GRDATA (RQLNT, rqb_ctx.rq.lnt, DEV_RDX, 8, 2), REG_NZ }, { GRDATA (RQLNT, rqb_ctx.rq.lnt, DEV_RDX, 8, 2), REG_NZ },
{ GRDATA (RQIDX, rqb_ctx.rq.idx, DEV_RDX, 8, 2) }, { GRDATA (RQIDX, rqb_ctx.rq.idx, DEV_RDX, 8, 2) },
@ -851,7 +927,7 @@ REG rqb_reg[] = {
{ URDATA (CPKT, rqb_unit[0].cpkt, 10, 5, 0, RQ_NUMDR, 0) }, { URDATA (CPKT, rqb_unit[0].cpkt, 10, 5, 0, RQ_NUMDR, 0) },
{ URDATA (PKTQ, rqb_unit[0].pktq, 10, 5, 0, RQ_NUMDR, 0) }, { URDATA (PKTQ, rqb_unit[0].pktq, 10, 5, 0, RQ_NUMDR, 0) },
{ URDATA (UFLG, rqb_unit[0].uf, DEV_RDX, 16, 0, RQ_NUMDR, 0) }, { URDATA (UFLG, rqb_unit[0].uf, DEV_RDX, 16, 0, RQ_NUMDR, 0) },
{ URDATA (CAPAC, rqb_unit[0].capac, 10, 31, 0, RQ_NUMDR, PV_LEFT | REG_HRO) }, { URDATA (CAPAC, rqb_unit[0].capac, 10, T_ADDR_W, 0, RQ_NUMDR, PV_LEFT | REG_HRO) },
{ GRDATA (DEVADDR, rqb_dib.ba, DEV_RDX, 32, 0), REG_HRO }, { GRDATA (DEVADDR, rqb_dib.ba, DEV_RDX, 32, 0), REG_HRO },
{ GRDATA (DEVVEC, rqb_dib.vec, DEV_RDX, 16, 0), REG_HRO }, { GRDATA (DEVVEC, rqb_dib.vec, DEV_RDX, 16, 0), REG_HRO },
{ NULL } { NULL }
@ -862,7 +938,8 @@ DEVICE rqb_dev = {
RQ_NUMDR + 2, DEV_RDX, T_ADDR_W, 2, DEV_RDX, 16, RQ_NUMDR + 2, DEV_RDX, T_ADDR_W, 2, DEV_RDX, 16,
NULL, NULL, &rq_reset, NULL, NULL, &rq_reset,
&rq_boot, &rq_attach, &rq_detach, &rq_boot, &rq_attach, &rq_detach,
&rqb_dib, DEV_FLTA | DEV_DISABLE | DEV_DIS | DEV_UBUS | DEV_QBUS | DEV_DEBUG &rqb_dib, DEV_FLTA | DEV_DISABLE | DEV_DIS | DEV_UBUS | DEV_QBUS | DEV_DEBUG,
0, rq_debug
}; };
/* RQC data structures /* RQC data structures
@ -898,9 +975,11 @@ REG rqc_reg[] = {
{ GRDATA (SAW, rqc_ctx.saw, DEV_RDX, 16, 0) }, { GRDATA (SAW, rqc_ctx.saw, DEV_RDX, 16, 0) },
{ GRDATA (S1DAT, rqc_ctx.s1dat, DEV_RDX, 16, 0) }, { GRDATA (S1DAT, rqc_ctx.s1dat, DEV_RDX, 16, 0) },
{ GRDATA (COMM, rqc_ctx.comm, DEV_RDX, 22, 0) }, { GRDATA (COMM, rqc_ctx.comm, DEV_RDX, 22, 0) },
{ GRDATA (CQIOFF, rqc_ctx.cq.ioff, DEV_RDX, 32, 0) },
{ GRDATA (CQBA, rqc_ctx.cq.ba, DEV_RDX, 22, 0) }, { GRDATA (CQBA, rqc_ctx.cq.ba, DEV_RDX, 22, 0) },
{ GRDATA (CQLNT, rqc_ctx.cq.lnt, DEV_RDX, 8, 2), REG_NZ }, { GRDATA (CQLNT, rqc_ctx.cq.lnt, DEV_RDX, 8, 2), REG_NZ },
{ GRDATA (CQIDX, rqc_ctx.cq.idx, DEV_RDX, 8, 2) }, { GRDATA (CQIDX, rqc_ctx.cq.idx, DEV_RDX, 8, 2) },
{ GRDATA (RQIOFF, rqc_ctx.rq.ioff, DEV_RDX, 32, 0) },
{ GRDATA (RQBA, rqc_ctx.rq.ba, DEV_RDX, 22, 0) }, { GRDATA (RQBA, rqc_ctx.rq.ba, DEV_RDX, 22, 0) },
{ GRDATA (RQLNT, rqc_ctx.rq.lnt, DEV_RDX, 8, 2), REG_NZ }, { GRDATA (RQLNT, rqc_ctx.rq.lnt, DEV_RDX, 8, 2), REG_NZ },
{ GRDATA (RQIDX, rqc_ctx.rq.idx, DEV_RDX, 8, 2) }, { GRDATA (RQIDX, rqc_ctx.rq.idx, DEV_RDX, 8, 2) },
@ -920,7 +999,7 @@ REG rqc_reg[] = {
{ URDATA (CPKT, rqc_unit[0].cpkt, 10, 5, 0, RQ_NUMDR, 0) }, { URDATA (CPKT, rqc_unit[0].cpkt, 10, 5, 0, RQ_NUMDR, 0) },
{ URDATA (PKTQ, rqc_unit[0].pktq, 10, 5, 0, RQ_NUMDR, 0) }, { URDATA (PKTQ, rqc_unit[0].pktq, 10, 5, 0, RQ_NUMDR, 0) },
{ URDATA (UFLG, rqc_unit[0].uf, DEV_RDX, 16, 0, RQ_NUMDR, 0) }, { URDATA (UFLG, rqc_unit[0].uf, DEV_RDX, 16, 0, RQ_NUMDR, 0) },
{ URDATA (CAPAC, rqc_unit[0].capac, 10, 31, 0, RQ_NUMDR, PV_LEFT | REG_HRO) }, { URDATA (CAPAC, rqc_unit[0].capac, 10, T_ADDR_W, 0, RQ_NUMDR, PV_LEFT | REG_HRO) },
{ GRDATA (DEVADDR, rqc_dib.ba, DEV_RDX, 32, 0), REG_HRO }, { GRDATA (DEVADDR, rqc_dib.ba, DEV_RDX, 32, 0), REG_HRO },
{ GRDATA (DEVVEC, rqc_dib.vec, DEV_RDX, 16, 0), REG_HRO }, { GRDATA (DEVVEC, rqc_dib.vec, DEV_RDX, 16, 0), REG_HRO },
{ NULL } { NULL }
@ -931,7 +1010,8 @@ DEVICE rqc_dev = {
RQ_NUMDR + 2, DEV_RDX, T_ADDR_W, 2, DEV_RDX, 16, RQ_NUMDR + 2, DEV_RDX, T_ADDR_W, 2, DEV_RDX, 16,
NULL, NULL, &rq_reset, NULL, NULL, &rq_reset,
&rq_boot, &rq_attach, &rq_detach, &rq_boot, &rq_attach, &rq_detach,
&rqc_dib, DEV_FLTA | DEV_DISABLE | DEV_DIS | DEV_UBUS | DEV_QBUS | DEV_DEBUG &rqc_dib, DEV_FLTA | DEV_DISABLE | DEV_DIS | DEV_UBUS | DEV_QBUS | DEV_DEBUG,
0, rq_debug
}; };
/* RQD data structures /* RQD data structures
@ -967,9 +1047,11 @@ REG rqd_reg[] = {
{ GRDATA (SAW, rqd_ctx.saw, DEV_RDX, 16, 0) }, { GRDATA (SAW, rqd_ctx.saw, DEV_RDX, 16, 0) },
{ GRDATA (S1DAT, rqd_ctx.s1dat, DEV_RDX, 16, 0) }, { GRDATA (S1DAT, rqd_ctx.s1dat, DEV_RDX, 16, 0) },
{ GRDATA (COMM, rqd_ctx.comm, DEV_RDX, 22, 0) }, { GRDATA (COMM, rqd_ctx.comm, DEV_RDX, 22, 0) },
{ GRDATA (CQIOFF, rqd_ctx.cq.ioff, DEV_RDX, 32, 0) },
{ GRDATA (CQBA, rqd_ctx.cq.ba, DEV_RDX, 22, 0) }, { GRDATA (CQBA, rqd_ctx.cq.ba, DEV_RDX, 22, 0) },
{ GRDATA (CQLNT, rqd_ctx.cq.lnt, DEV_RDX, 8, 2), REG_NZ }, { GRDATA (CQLNT, rqd_ctx.cq.lnt, DEV_RDX, 8, 2), REG_NZ },
{ GRDATA (CQIDX, rqd_ctx.cq.idx, DEV_RDX, 8, 2) }, { GRDATA (CQIDX, rqd_ctx.cq.idx, DEV_RDX, 8, 2) },
{ GRDATA (RQIOFF, rqd_ctx.rq.ioff, DEV_RDX, 32, 0) },
{ GRDATA (RQBA, rqd_ctx.rq.ba, DEV_RDX, 22, 0) }, { GRDATA (RQBA, rqd_ctx.rq.ba, DEV_RDX, 22, 0) },
{ GRDATA (RQLNT, rqd_ctx.rq.lnt, DEV_RDX, 8, 2), REG_NZ }, { GRDATA (RQLNT, rqd_ctx.rq.lnt, DEV_RDX, 8, 2), REG_NZ },
{ GRDATA (RQIDX, rqd_ctx.rq.idx, DEV_RDX, 8, 2) }, { GRDATA (RQIDX, rqd_ctx.rq.idx, DEV_RDX, 8, 2) },
@ -989,7 +1071,7 @@ REG rqd_reg[] = {
{ URDATA (CPKT, rqd_unit[0].cpkt, 10, 5, 0, RQ_NUMDR, 0) }, { URDATA (CPKT, rqd_unit[0].cpkt, 10, 5, 0, RQ_NUMDR, 0) },
{ URDATA (PKTQ, rqd_unit[0].pktq, 10, 5, 0, RQ_NUMDR, 0) }, { URDATA (PKTQ, rqd_unit[0].pktq, 10, 5, 0, RQ_NUMDR, 0) },
{ URDATA (UFLG, rqd_unit[0].uf, DEV_RDX, 16, 0, RQ_NUMDR, 0) }, { URDATA (UFLG, rqd_unit[0].uf, DEV_RDX, 16, 0, RQ_NUMDR, 0) },
{ URDATA (CAPAC, rqd_unit[0].capac, 10, 31, 0, RQ_NUMDR, PV_LEFT | REG_HRO) }, { URDATA (CAPAC, rqd_unit[0].capac, 10, T_ADDR_W, 0, RQ_NUMDR, PV_LEFT | REG_HRO) },
{ GRDATA (DEVADDR, rqd_dib.ba, DEV_RDX, 32, 0), REG_HRO }, { GRDATA (DEVADDR, rqd_dib.ba, DEV_RDX, 32, 0), REG_HRO },
{ GRDATA (DEVVEC, rqd_dib.vec, DEV_RDX, 16, 0), REG_HRO }, { GRDATA (DEVVEC, rqd_dib.vec, DEV_RDX, 16, 0), REG_HRO },
{ NULL } { NULL }
@ -1000,7 +1082,8 @@ DEVICE rqd_dev = {
RQ_NUMDR + 2, DEV_RDX, T_ADDR_W, 2, DEV_RDX, 16, RQ_NUMDR + 2, DEV_RDX, T_ADDR_W, 2, DEV_RDX, 16,
NULL, NULL, &rq_reset, NULL, NULL, &rq_reset,
&rq_boot, &rq_attach, &rq_detach, &rq_boot, &rq_attach, &rq_detach,
&rqd_dib, DEV_FLTA | DEV_DISABLE | DEV_DIS | DEV_UBUS | DEV_QBUS | DEV_DEBUG &rqd_dib, DEV_FLTA | DEV_DISABLE | DEV_DIS | DEV_UBUS | DEV_QBUS | DEV_DEBUG,
0, rq_debug
}; };
static DEVICE *rq_devmap[RQ_NUMCT] = { static DEVICE *rq_devmap[RQ_NUMCT] = {
@ -1023,6 +1106,8 @@ int32 cidx = rq_map_pa ((uint32) PA);
MSC *cp = rq_ctxmap[cidx]; MSC *cp = rq_ctxmap[cidx];
DEVICE *dptr = rq_devmap[cidx]; DEVICE *dptr = rq_devmap[cidx];
sim_debug(DBG_REG, dptr, "rq_rd(PA=0x%08X [%s], access=%d)\n", PA, ((PA >> 1) & 01) ? "IP" : "SA", access);
if (cidx < 0) if (cidx < 0)
return SCPE_IERR; return SCPE_IERR;
switch ((PA >> 1) & 01) { /* decode PA<1> */ switch ((PA >> 1) & 01) { /* decode PA<1> */
@ -1032,9 +1117,7 @@ switch ((PA >> 1) & 01) { /* decode PA<1> */
if (cp->csta == CST_S3_PPB) /* waiting for poll? */ if (cp->csta == CST_S3_PPB) /* waiting for poll? */
rq_step4 (cp); rq_step4 (cp);
else if (cp->csta == CST_UP) { /* if up */ else if (cp->csta == CST_UP) { /* if up */
if (DEBUG_PRD (dptr)) sim_debug (DBG_REQ, dptr, "poll started, PC=%X\n", OLDPC);
fprintf (sim_deb, ">>RQ%c: poll started, PC=%X\n",
'A' + cp->cnum, OLDPC);
cp->pip = 1; /* poll host */ cp->pip = 1; /* poll host */
sim_activate (dptr->units + RQ_QUEUE, rq_qtime); sim_activate (dptr->units + RQ_QUEUE, rq_qtime);
} }
@ -1044,7 +1127,6 @@ switch ((PA >> 1) & 01) { /* decode PA<1> */
*data = cp->sa; *data = cp->sa;
break; break;
} }
return SCPE_OK; return SCPE_OK;
} }
@ -1056,13 +1138,14 @@ DEVICE *dptr = rq_devmap[cidx];
if (cidx < 0) if (cidx < 0)
return SCPE_IERR; return SCPE_IERR;
sim_debug(DBG_REG, dptr, "rq_wr(PA=0x%08X [%s], access=%d)\n", PA, ((PA >> 1) & 01) ? "IP" : "SA", access);
switch ((PA >> 1) & 01) { /* decode PA<1> */ switch ((PA >> 1) & 01) { /* decode PA<1> */
case 0: /* IP */ case 0: /* IP */
rq_reset (rq_devmap[cidx]); /* init device */ rq_reset (rq_devmap[cidx]); /* init device */
if (DEBUG_PRD (dptr)) sim_debug (DBG_REQ, dptr, "initialization started\n");
fprintf (sim_deb, ">>RQ%c: initialization started\n",
'A' + cp->cnum);
break; break;
case 1: /* SA */ case 1: /* SA */
@ -1147,7 +1230,12 @@ MSC *cp = rq_ctxmap[uptr->cnum];
DEVICE *dptr = rq_devmap[uptr->cnum]; DEVICE *dptr = rq_devmap[uptr->cnum];
DIB *dibp = (DIB *) dptr->ctxt; DIB *dibp = (DIB *) dptr->ctxt;
sim_debug (DBG_TRC, rq_devmap[cp->cnum], "rq_quesvc\n");
if (cp->csta < CST_UP) { /* still init? */ if (cp->csta < CST_UP) { /* still init? */
sim_debug(DBG_INI, dptr, "CSTA=%d, SAW=0x%X\n", cp->csta, cp->saw);
switch (cp->csta) { /* controller state? */ switch (cp->csta) { /* controller state? */
case CST_S1: /* need S1 reply */ case CST_S1: /* need S1 reply */
@ -1197,8 +1285,7 @@ if (cp->csta < CST_UP) { /* still init? */
case CST_S4: /* need S4 reply */ case CST_S4: /* need S4 reply */
if (cp->saw & SA_S4H_GO) { /* go set? */ if (cp->saw & SA_S4H_GO) { /* go set? */
if (DEBUG_PRD (dptr)) sim_debug (DBG_REQ, dptr, "initialization complete\n");
fprintf (sim_deb, ">>RQ%c: initialization complete\n", 'A' + cp->cnum);
cp->csta = CST_UP; /* we're up */ cp->csta = CST_UP; /* we're up */
cp->sa = 0; /* clear SA */ cp->sa = 0; /* clear SA */
sim_activate (dptr->units + RQ_TIMER, tmr_poll * clk_tps); sim_activate (dptr->units + RQ_TIMER, tmr_poll * clk_tps);
@ -1224,15 +1311,12 @@ if ((pkt == 0) && cp->pip) { /* polling? */
if (!rq_getpkt (cp, &pkt)) /* get host pkt */ if (!rq_getpkt (cp, &pkt)) /* get host pkt */
return SCPE_OK; return SCPE_OK;
if (pkt) { /* got one? */ if (pkt) { /* got one? */
if (DEBUG_PRD (dptr)) { sim_debug (DBG_REQ, dptr, "cmd=%04X(%3s), mod=%04X, unit=%d, bc=%04X%04X, ma=%04X%04X, lbn=%04X%04X\n",
fprintf (sim_deb, ">>RQ%c: cmd=%04X, mod=%04X, unit=%d, ", cp->pak[pkt].d[CMD_OPC], rq_cmdname[cp->pak[pkt].d[CMD_OPC]&0x3f],
'A' + cp->cnum, cp->pak[pkt].d[CMD_OPC], cp->pak[pkt].d[CMD_MOD], cp->pak[pkt].d[CMD_UN],
cp->pak[pkt].d[CMD_MOD], cp->pak[pkt].d[CMD_UN]);
fprintf (sim_deb, "bc=%04X%04X, ma=%04X%04X, lbn=%04X%04X\n",
cp->pak[pkt].d[RW_BCH], cp->pak[pkt].d[RW_BCL], cp->pak[pkt].d[RW_BCH], cp->pak[pkt].d[RW_BCL],
cp->pak[pkt].d[RW_BAH], cp->pak[pkt].d[RW_BAL], cp->pak[pkt].d[RW_BAH], cp->pak[pkt].d[RW_BAL],
cp->pak[pkt].d[RW_LBNH], cp->pak[pkt].d[RW_LBNL]); cp->pak[pkt].d[RW_LBNH], cp->pak[pkt].d[RW_LBNL]);
}
if (GETP (pkt, UQ_HCTC, TYP) != UQ_TYP_SEQ) /* seq packet? */ if (GETP (pkt, UQ_HCTC, TYP) != UQ_TYP_SEQ) /* seq packet? */
return rq_fatal (cp, PE_PIE); /* no, term thread */ return rq_fatal (cp, PE_PIE); /* no, term thread */
cnid = GETP (pkt, UQ_HCTC, CID); /* get conn ID */ cnid = GETP (pkt, UQ_HCTC, CID); /* get conn ID */
@ -1253,6 +1337,7 @@ if (cp->rspq) { /* resp q? */
pkt = rq_deqh (cp, &cp->rspq); /* get top of q */ pkt = rq_deqh (cp, &cp->rspq); /* get top of q */
if (!rq_putpkt (cp, pkt, FALSE)) /* send to host */ if (!rq_putpkt (cp, pkt, FALSE)) /* send to host */
return SCPE_OK; return SCPE_OK;
sim_debug (DBG_TRC, rq_devmap[cp->cnum], "rq_quesvc - rq_putpkt failed - 1\n");
} /* end if resp q */ } /* end if resp q */
if (pkt) /* more to do? */ if (pkt) /* more to do? */
sim_activate (uptr, rq_qtime); sim_activate (uptr, rq_qtime);
@ -1268,6 +1353,7 @@ UNIT *nuptr;
MSC *cp = rq_ctxmap[uptr->cnum]; MSC *cp = rq_ctxmap[uptr->cnum];
DEVICE *dptr = rq_devmap[uptr->cnum]; DEVICE *dptr = rq_devmap[uptr->cnum];
sim_debug (DBG_TRC, rq_devmap[cp->cnum], "rq_tmrsvc\n");
sim_activate (uptr, tmr_poll * clk_tps); /* reactivate */ sim_activate (uptr, tmr_poll * clk_tps); /* reactivate */
for (i = 0; i < RQ_NUMDR; i++) { /* poll */ for (i = 0; i < RQ_NUMDR; i++) { /* poll */
nuptr = dptr->units + i; nuptr = dptr->units + i;
@ -1290,6 +1376,8 @@ t_bool rq_mscp (MSC *cp, int32 pkt, t_bool q)
{ {
uint32 sts, cmd = GETP (pkt, CMD_OPC, OPC); uint32 sts, cmd = GETP (pkt, CMD_OPC, OPC);
sim_debug (DBG_TRC, rq_devmap[cp->cnum], "rq_mscp - %s\n", q? "Queue" : "No Queue");
switch (cmd) { switch (cmd) {
case OP_ABO: /* abort */ case OP_ABO: /* abort */
@ -1351,6 +1439,8 @@ int32 tpkt, prv;
UNIT *uptr; UNIT *uptr;
DEVICE *dptr = rq_devmap[cp->cnum]; DEVICE *dptr = rq_devmap[cp->cnum];
sim_debug (DBG_TRC, rq_devmap[cp->cnum], "rq_abo\n");
tpkt = 0; /* set no mtch */ tpkt = 0; /* set no mtch */
if (uptr = rq_getucb (cp, lu)) { /* get unit */ if (uptr = rq_getucb (cp, lu)) { /* get unit */
if (uptr->cpkt && /* curr pkt? */ if (uptr->cpkt && /* curr pkt? */
@ -1390,15 +1480,20 @@ t_bool rq_avl (MSC *cp, int32 pkt, t_bool q)
{ {
uint32 lu = cp->pak[pkt].d[CMD_UN]; /* unit # */ uint32 lu = cp->pak[pkt].d[CMD_UN]; /* unit # */
uint32 cmd = GETP (pkt, CMD_OPC, OPC); /* opcode */ uint32 cmd = GETP (pkt, CMD_OPC, OPC); /* opcode */
uint32 mdf = cp->pak[pkt].d[CMD_MOD]; /* modifier */
uint32 sts; uint32 sts;
UNIT *uptr; UNIT *uptr;
sim_debug (DBG_TRC, rq_devmap[cp->cnum], "rq_avl\n");
if (uptr = rq_getucb (cp, lu)) { /* unit exist? */ if (uptr = rq_getucb (cp, lu)) { /* unit exist? */
if (q && uptr->cpkt) { /* need to queue? */ if (q && uptr->cpkt) { /* need to queue? */
rq_enqt (cp, &uptr->pktq, pkt); /* do later */ rq_enqt (cp, &uptr->pktq, pkt); /* do later */
return OK; return OK;
} }
uptr->flags = uptr->flags & ~UNIT_ONL; /* not online */ uptr->flags = uptr->flags & ~UNIT_ONL; /* not online */
if ((mdf & MD_SPD) && RQ_RMV (uptr)) /* unload of removable device */
sim_disk_unload (uptr);
uptr->uf = 0; /* clr flags */ uptr->uf = 0; /* clr flags */
sts = ST_SUC; /* success */ sts = ST_SUC; /* success */
} }
@ -1417,6 +1512,8 @@ uint32 ref = GETP32 (pkt, GCS_REFL); /* ref # */
int32 tpkt; int32 tpkt;
UNIT *uptr; UNIT *uptr;
sim_debug (DBG_TRC, rq_devmap[cp->cnum], "rq_gcs\n");
if ((uptr = rq_getucb (cp, lu)) && /* valid lu? */ if ((uptr = rq_getucb (cp, lu)) && /* valid lu? */
(tpkt = uptr->cpkt) && /* queued pkt? */ (tpkt = uptr->cpkt) && /* queued pkt? */
(GETP32 (tpkt, CMD_REFL) == ref) && /* match ref? */ (GETP32 (tpkt, CMD_REFL) == ref) && /* match ref? */
@ -1441,6 +1538,8 @@ uint32 cmd = GETP (pkt, CMD_OPC, OPC); /* opcode */
uint32 dtyp, sts, rbpar; uint32 dtyp, sts, rbpar;
UNIT *uptr; UNIT *uptr;
sim_debug (DBG_TRC, rq_devmap[cp->cnum], "rq_gus\n");
if (cp->pak[pkt].d[CMD_MOD] & MD_NXU) { /* next unit? */ if (cp->pak[pkt].d[CMD_MOD] & MD_NXU) { /* next unit? */
if (lu >= (cp->ubase + RQ_NUMDR)) { /* end of range? */ if (lu >= (cp->ubase + RQ_NUMDR)) { /* end of range? */
lu = 0; /* reset to 0 */ lu = 0; /* reset to 0 */
@ -1482,6 +1581,8 @@ uint32 cmd = GETP (pkt, CMD_OPC, OPC); /* opcode */
uint32 sts; uint32 sts;
UNIT *uptr; UNIT *uptr;
sim_debug (DBG_TRC, rq_devmap[cp->cnum], "rq_onl\n");
if (uptr = rq_getucb (cp, lu)) { /* unit exist? */ if (uptr = rq_getucb (cp, lu)) { /* unit exist? */
if (q && uptr->cpkt) { /* need to queue? */ if (q && uptr->cpkt) { /* need to queue? */
rq_enqt (cp, &uptr->pktq, pkt); /* do later */ rq_enqt (cp, &uptr->pktq, pkt); /* do later */
@ -1491,11 +1592,14 @@ if (uptr = rq_getucb (cp, lu)) { /* unit exist? */
sts = ST_OFL | SB_OFL_NV; /* offl no vol */ sts = ST_OFL | SB_OFL_NV; /* offl no vol */
else if (uptr->flags & UNIT_ONL) /* already online? */ else if (uptr->flags & UNIT_ONL) /* already online? */
sts = ST_SUC | SB_SUC_ON; sts = ST_SUC | SB_SUC_ON;
else { /* mark online */ else if (sim_disk_isavailable (uptr))
{ /* mark online */
sts = ST_SUC; sts = ST_SUC;
uptr->flags = uptr->flags | UNIT_ONL; uptr->flags = uptr->flags | UNIT_ONL;
rq_setf_unit (cp, pkt, uptr); /* hack flags */ rq_setf_unit (cp, pkt, uptr); /* hack flags */
} }
else
sts = ST_OFL | SB_OFL_NV; /* offl no vol */
rq_putr_unit (cp, pkt, uptr, lu, TRUE); /* set fields */ rq_putr_unit (cp, pkt, uptr, lu, TRUE); /* set fields */
} }
else sts = ST_OFL; /* offline */ else sts = ST_OFL; /* offline */
@ -1511,6 +1615,8 @@ t_bool rq_scc (MSC *cp, int32 pkt, t_bool q)
{ {
int32 sts, cmd; int32 sts, cmd;
sim_debug (DBG_TRC, rq_devmap[cp->cnum], "rq_scc\n");
if (cp->pak[pkt].d[SCC_MSV]) { /* MSCP ver = 0? */ if (cp->pak[pkt].d[SCC_MSV]) { /* MSCP ver = 0? */
sts = ST_CMD | I_VRSN; /* no, lose */ sts = ST_CMD | I_VRSN; /* no, lose */
cmd = 0; cmd = 0;
@ -1547,6 +1653,8 @@ uint32 cmd = GETP (pkt, CMD_OPC, OPC); /* opcode */
uint32 sts; uint32 sts;
UNIT *uptr; UNIT *uptr;
sim_debug (DBG_TRC, rq_devmap[cp->cnum], "rq_suc\n");
if (uptr = rq_getucb (cp, lu)) { /* unit exist? */ if (uptr = rq_getucb (cp, lu)) { /* unit exist? */
if (q && uptr->cpkt) { /* need to queue? */ if (q && uptr->cpkt) { /* need to queue? */
rq_enqt (cp, &uptr->pktq, pkt); /* do later */ rq_enqt (cp, &uptr->pktq, pkt); /* do later */
@ -1576,6 +1684,8 @@ uint32 cmd = GETP (pkt, CMD_OPC, OPC); /* opcode */
uint32 sts; uint32 sts;
UNIT *uptr; UNIT *uptr;
sim_debug (DBG_TRC, rq_devmap[cp->cnum], "rq_fmt\n");
if (uptr = rq_getucb (cp, lu)) { /* unit exist? */ if (uptr = rq_getucb (cp, lu)) { /* unit exist? */
if (q && uptr->cpkt) { /* need to queue? */ if (q && uptr->cpkt) { /* need to queue? */
rq_enqt (cp, &uptr->pktq, pkt); /* do later */ rq_enqt (cp, &uptr->pktq, pkt); /* do later */
@ -1610,8 +1720,11 @@ uint32 cmd = GETP (pkt, CMD_OPC, OPC); /* opcode */
uint32 sts; uint32 sts;
UNIT *uptr; UNIT *uptr;
sim_debug (DBG_TRC, rq_devmap[cp->cnum], "rq_rw(lu=%d, pkt=%d, queue=%s)\n", lu, pkt, q?"yes" : "no");
if (uptr = rq_getucb (cp, lu)) { /* unit exist? */ if (uptr = rq_getucb (cp, lu)) { /* unit exist? */
if (q && uptr->cpkt) { /* need to queue? */ if (q && uptr->cpkt) { /* need to queue? */
sim_debug (DBG_TRC, rq_devmap[cp->cnum], "rq_rw - queued\n");
rq_enqt (cp, &uptr->pktq, pkt); /* do later */ rq_enqt (cp, &uptr->pktq, pkt); /* do later */
return OK; return OK;
} }
@ -1624,7 +1737,9 @@ if (uptr = rq_getucb (cp, lu)) { /* unit exist? */
cp->pak[pkt].d[RW_WBCH] = cp->pak[pkt].d[RW_BCH]; cp->pak[pkt].d[RW_WBCH] = cp->pak[pkt].d[RW_BCH];
cp->pak[pkt].d[RW_WBLL] = cp->pak[pkt].d[RW_LBNL]; cp->pak[pkt].d[RW_WBLL] = cp->pak[pkt].d[RW_LBNL];
cp->pak[pkt].d[RW_WBLH] = cp->pak[pkt].d[RW_LBNH]; cp->pak[pkt].d[RW_WBLH] = cp->pak[pkt].d[RW_LBNH];
sim_activate (uptr, rq_xtime); /* activate */ uptr->iostarttime = sim_grtime();
sim_activate (uptr, 0); /* activate */
sim_debug (DBG_TRC, rq_devmap[cp->cnum], "rq_rw - started\n");
return OK; /* done */ return OK; /* done */
} }
} }
@ -1674,12 +1789,28 @@ if ((cmd == OP_WR) || (cmd == OP_ERS)) { /* write op? */
return 0; /* success! */ return 0; /* success! */
} }
/* I/O completion callback */
void rq_io_complete (UNIT *uptr, t_stat status)
{
MSC *cp = rq_ctxmap[uptr->cnum];
int32 elapsed = sim_grtime()-uptr->iostarttime;
sim_debug (DBG_TRC, rq_devmap[cp->cnum], "rq_io_complete(status=%d)\n", status);
uptr->io_status = status;
uptr->io_complete = 1;
if (elapsed > rq_xtime)
sim_activate (uptr, 0);
else
sim_activate (uptr, rq_xtime-elapsed);
}
/* Unit service for data transfer commands */ /* Unit service for data transfer commands */
t_stat rq_svc (UNIT *uptr) t_stat rq_svc (UNIT *uptr)
{ {
MSC *cp = rq_ctxmap[uptr->cnum]; MSC *cp = rq_ctxmap[uptr->cnum];
uint32 i, t, tbc, abc, wwc; uint32 i, t, tbc, abc, wwc;
uint32 err = 0; uint32 err = 0;
int32 pkt = uptr->cpkt; /* get packet */ int32 pkt = uptr->cpkt; /* get packet */
@ -1687,7 +1818,10 @@ uint32 cmd = GETP (pkt, CMD_OPC, OPC); /* get cmd */
uint32 ba = GETP32 (pkt, RW_WBAL); /* buf addr */ uint32 ba = GETP32 (pkt, RW_WBAL); /* buf addr */
uint32 bc = GETP32 (pkt, RW_WBCL); /* byte count */ uint32 bc = GETP32 (pkt, RW_WBCL); /* byte count */
uint32 bl = GETP32 (pkt, RW_WBLL); /* block addr */ uint32 bl = GETP32 (pkt, RW_WBLL); /* block addr */
t_addr da = ((t_addr) bl) * RQ_NUMBY; /* disk addr */
sim_debug (DBG_TRC, rq_devmap[cp->cnum], "rq_svc(unit=%d, pkt=%d, cmd=%s, lbn=%0X, bc=%0x, phase=%s)\n",
uptr-rq_devmap[cp->cnum]->units, pkt, rq_cmdname[cp->pak[pkt].d[CMD_OPC]&0x3f], bl, bc,
uptr->io_complete ? "bottom" : "top");
if ((cp == NULL) || (pkt == 0)) /* what??? */ if ((cp == NULL) || (pkt == 0)) /* what??? */
return STOP_RQ; return STOP_RQ;
@ -1713,27 +1847,39 @@ if ((cmd == OP_ERS) || (cmd == OP_WR)) { /* write op? */
} }
} }
if (cmd == OP_ERS) { /* erase? */ if (!uptr->io_complete) { /* Top End (I/O Initiation) Processing */
if (cmd == OP_ERS) { /* erase? */
wwc = ((tbc + (RQ_NUMBY - 1)) & ~(RQ_NUMBY - 1)) >> 1; wwc = ((tbc + (RQ_NUMBY - 1)) & ~(RQ_NUMBY - 1)) >> 1;
for (i = 0; i < wwc; i++) /* clr buf */ memset (uptr->rqxb, 0, wwc * sizeof(uint16)); /* clr buf */
rqxb[i] = 0; sim_disk_data_trace(uptr, uptr->rqxb, bl, wwc << 1, "sim_disk_wrsect-ERS", DBG_DAT & rq_devmap[cp->cnum]->dctrl, DBG_REQ);
err = sim_fseek (uptr->fileref, da, SEEK_SET); /* set pos */ err = sim_disk_wrsect_a (uptr, bl, uptr->rqxb, NULL, (wwc << 1) / RQ_NUMBY, rq_io_complete);
if (!err)
sim_fwrite (rqxb, sizeof (int16), wwc, uptr->fileref);
err = ferror (uptr->fileref); /* end if erase */
} }
else if (cmd == OP_WR) { /* write? */ else if (cmd == OP_WR) { /* write? */
t = Map_ReadW (ba, tbc, rqxb); /* fetch buffer */ t = Map_ReadW (ba, tbc, uptr->rqxb); /* fetch buffer */
if (abc = tbc - t) { /* any xfer? */ if (abc = tbc - t) { /* any xfer? */
wwc = ((abc + (RQ_NUMBY - 1)) & ~(RQ_NUMBY - 1)) >> 1; wwc = ((abc + (RQ_NUMBY - 1)) & ~(RQ_NUMBY - 1)) >> 1;
for (i = (abc >> 1); i < wwc; i++) for (i = (abc >> 1); i < wwc; i++)
rqxb[i] = 0; ((uint16 *)(uptr->rqxb))[i] = 0;
err = sim_fseek (uptr->fileref, da, SEEK_SET); sim_disk_data_trace(uptr, uptr->rqxb, bl, wwc << 1, "sim_disk_wrsect-WR", DBG_DAT & rq_devmap[cp->cnum]->dctrl, DBG_REQ);
if (!err) err = sim_disk_wrsect_a (uptr, bl, uptr->rqxb, NULL, (wwc << 1) / RQ_NUMBY, rq_io_complete);
sim_fwrite (rqxb, sizeof (int16), wwc, uptr->fileref);
err = ferror (uptr->fileref);
} }
}
else { /* OP_RD & OP_CMP */
err = sim_disk_rdsect_a (uptr, bl, uptr->rqxb, NULL, (tbc + RQ_NUMBY - 1) / RQ_NUMBY, rq_io_complete);
} /* end else read */
return SCPE_OK; /* done for now until callback */
}
else { /* Bottom End (After I/O processing) */
uptr->io_complete = 0;
err = uptr->io_status;
if (cmd == OP_ERS) { /* erase? */
}
else if (cmd == OP_WR) { /* write? */
t = Map_ReadW (ba, tbc, uptr->rqxb); /* fetch buffer */
abc = tbc - t; /* any xfer? */
if (t) { /* nxm? */ if (t) { /* nxm? */
PUTP32 (pkt, RW_WBCL, bc - abc); /* adj bc */ PUTP32 (pkt, RW_WBCL, bc - abc); /* adj bc */
PUTP32 (pkt, RW_WBAL, ba + abc); /* adj ba */ PUTP32 (pkt, RW_WBAL, ba + abc); /* adj ba */
@ -1743,16 +1889,10 @@ else if (cmd == OP_WR) { /* write? */
} }
} }
else { else {
err = sim_fseek (uptr->fileref, da, SEEK_SET); /* set pos */ sim_disk_data_trace(uptr, uptr->rqxb, bl, tbc, "sim_disk_rdsect", DBG_DAT & rq_devmap[cp->cnum]->dctrl, DBG_REQ);
if (!err) {
i = sim_fread (rqxb, sizeof (int16), tbc >> 1, uptr->fileref);
for ( ; i < (tbc >> 1); i++) /* fill */
rqxb[i] = 0;
err = ferror (uptr->fileref);
}
if ((cmd == OP_RD) && !err) { /* read? */ if ((cmd == OP_RD) && !err) { /* read? */
if (t = Map_WriteW (ba, tbc, rqxb)) { /* store, nxm? */ if (t = Map_WriteW (ba, tbc, uptr->rqxb)) { /* store, nxm? */
PUTP32 (pkt, RW_WBCL, bc - (tbc - t)); /* adj bc */ PUTP32 (pkt, RW_WBCL, bc - (tbc - t)); /* adj bc */
PUTP32 (pkt, RW_WBAL, ba + (tbc - t)); /* adj ba */ PUTP32 (pkt, RW_WBAL, ba + (tbc - t)); /* adj ba */
if (rq_hbe (cp, uptr)) /* post err log */ if (rq_hbe (cp, uptr)) /* post err log */
@ -1770,7 +1910,7 @@ else {
rq_rw_end (cp, uptr, EF_LOG, ST_HST | SB_HST_NXM); rq_rw_end (cp, uptr, EF_LOG, ST_HST | SB_HST_NXM);
return SCPE_OK; return SCPE_OK;
} }
dby = (rqxb[i >> 1] >> ((i & 1)? 8: 0)) & 0xFF; dby = (((uint16 *)(uptr->rqxb))[i >> 1] >> ((i & 1)? 8: 0)) & 0xFF;
if (mby != dby) { /* cmp err? */ if (mby != dby) { /* cmp err? */
PUTP32 (pkt, RW_WBCL, bc - i); /* adj bc */ PUTP32 (pkt, RW_WBCL, bc - i); /* adj bc */
rq_rw_end (cp, uptr, 0, ST_CMP); /* done */ rq_rw_end (cp, uptr, 0, ST_CMP); /* done */
@ -1779,10 +1919,12 @@ else {
} /* end for */ } /* end for */
} /* end else if */ } /* end else if */
} /* end else read */ } /* end else read */
} /* end else bottom end */
if (err != 0) { /* error? */ if (err != 0) { /* error? */
if (rq_dte (cp, uptr, ST_DRV)) /* post err log */ if (rq_dte (cp, uptr, ST_DRV)) /* post err log */
rq_rw_end (cp, uptr, EF_LOG, ST_DRV); /* if ok, report err */ rq_rw_end (cp, uptr, EF_LOG, ST_DRV); /* if ok, report err */
perror ("RQ I/O error"); perror ("RQ I/O error");
if (!(uptr->flags | UNIT_RAW))
clearerr (uptr->fileref); clearerr (uptr->fileref);
return SCPE_IOERR; return SCPE_IOERR;
} }
@ -1793,7 +1935,7 @@ PUTP32 (pkt, RW_WBAL, ba); /* update pkt */
PUTP32 (pkt, RW_WBCL, bc); PUTP32 (pkt, RW_WBCL, bc);
PUTP32 (pkt, RW_WBLL, bl); PUTP32 (pkt, RW_WBLL, bl);
if (bc) /* more? resched */ if (bc) /* more? resched */
sim_activate (uptr, rq_xtime); sim_activate (uptr, 0);
else rq_rw_end (cp, uptr, 0, ST_SUC); /* done! */ else rq_rw_end (cp, uptr, 0, ST_SUC); /* done! */
return SCPE_OK; return SCPE_OK;
} }
@ -1808,6 +1950,8 @@ uint32 bc = GETP32 (pkt, RW_BCL); /* init bc */
uint32 wbc = GETP32 (pkt, RW_WBCL); /* work bc */ uint32 wbc = GETP32 (pkt, RW_WBCL); /* work bc */
DEVICE *dptr = rq_devmap[uptr->cnum]; DEVICE *dptr = rq_devmap[uptr->cnum];
sim_debug (DBG_TRC, rq_devmap[cp->cnum], "rq_rw_end\n");
uptr->cpkt = 0; /* done */ uptr->cpkt = 0; /* done */
PUTP32 (pkt, RW_BCL, bc - wbc); /* bytes processed */ PUTP32 (pkt, RW_BCL, bc - wbc); /* bytes processed */
cp->pak[pkt].d[RW_WBAL] = 0; /* clear temps */ cp->pak[pkt].d[RW_WBAL] = 0; /* clear temps */
@ -1831,6 +1975,8 @@ t_bool rq_dte (MSC *cp, UNIT *uptr, uint32 err)
int32 pkt, tpkt; int32 pkt, tpkt;
uint32 lu, dtyp, lbn, ccyl, csurf, csect, t; uint32 lu, dtyp, lbn, ccyl, csurf, csect, t;
sim_debug (DBG_TRC, rq_devmap[cp->cnum], "rq_dte\n");
if ((cp->cflgs & CF_THS) == 0) /* logging? */ if ((cp->cflgs & CF_THS) == 0) /* logging? */
return OK; return OK;
if (!rq_deqf (cp, &pkt)) /* get log pkt */ if (!rq_deqf (cp, &pkt)) /* get log pkt */
@ -1883,6 +2029,8 @@ t_bool rq_hbe (MSC *cp, UNIT *uptr)
{ {
int32 pkt, tpkt; int32 pkt, tpkt;
sim_debug (DBG_TRC, rq_devmap[cp->cnum], "rq_hbe\n");
if ((cp->cflgs & CF_THS) == 0) /* logging? */ if ((cp->cflgs & CF_THS) == 0) /* logging? */
return OK; return OK;
if (!rq_deqf (cp, &pkt)) /* get log pkt */ if (!rq_deqf (cp, &pkt)) /* get log pkt */
@ -1912,6 +2060,8 @@ t_bool rq_plf (MSC *cp, uint32 err)
{ {
int32 pkt; int32 pkt;
sim_debug (DBG_TRC, rq_devmap[cp->cnum], "rq_plf\n");
if (!rq_deqf (cp, &pkt)) /* get log pkt */ if (!rq_deqf (cp, &pkt)) /* get log pkt */
return ERR; return ERR;
cp->pak[pkt].d[ELP_REFL] = 0; /* ref = 0 */ cp->pak[pkt].d[ELP_REFL] = 0; /* ref = 0 */
@ -1933,12 +2083,13 @@ return rq_putpkt (cp, pkt, TRUE);
/* Unit now available attention packet */ /* Unit now available attention packet */
int32 rq_una (MSC *cp, int32 un) t_bool rq_una (MSC *cp, int32 un)
{ {
int32 pkt; int32 pkt;
uint32 lu = cp->ubase + un; uint32 lu = cp->ubase + un;
UNIT *uptr = rq_getucb (cp, lu); UNIT *uptr = rq_getucb (cp, lu);
sim_debug (DBG_TRC, rq_devmap[cp->cnum], "rq_una (Unit=%d)\n", lu);
if (uptr == NULL) /* huh? */ if (uptr == NULL) /* huh? */
return OK; return OK;
if (!rq_deqf (cp, &pkt)) /* get log pkt */ if (!rq_deqf (cp, &pkt)) /* get log pkt */
@ -2039,8 +2190,7 @@ DEVICE *dptr = rq_devmap[cp->cnum];
if (pkt == 0) /* any packet? */ if (pkt == 0) /* any packet? */
return OK; return OK;
if (DEBUG_PRD (dptr)) sim_debug (DBG_REQ, dptr, "rsp=%04X, sts=%04X\n",
fprintf (sim_deb, ">>RQ%c: rsp=%04X, sts=%04X\n", 'A' + cp->cnum,
cp->pak[pkt].d[RSP_OPF], cp->pak[pkt].d[RSP_STS]); cp->pak[pkt].d[RSP_OPF], cp->pak[pkt].d[RSP_STS]);
if (!rq_getdesc (cp, &cp->rq, &desc)) /* get rsp desc */ if (!rq_getdesc (cp, &cp->rq, &desc)) /* get rsp desc */
return ERR; return ERR;
@ -2146,6 +2296,8 @@ void rq_putr_unit (MSC *cp, int32 pkt, UNIT *uptr, uint32 lu, t_bool all)
uint32 dtyp = GET_DTYPE (uptr->flags); /* get drive type */ uint32 dtyp = GET_DTYPE (uptr->flags); /* get drive type */
uint32 maxlbn = (uint32) (uptr->capac / RQ_NUMBY); /* get max lbn */ uint32 maxlbn = (uint32) (uptr->capac / RQ_NUMBY); /* get max lbn */
sim_debug (DBG_TRC, rq_devmap[cp->cnum], "rq_putr_unit\n");
cp->pak[pkt].d[ONL_MLUN] = lu; /* unit */ cp->pak[pkt].d[ONL_MLUN] = lu; /* unit */
cp->pak[pkt].d[ONL_UFL] = uptr->uf | UF_RPL | RQ_WPH (uptr) | RQ_RMV (uptr); cp->pak[pkt].d[ONL_UFL] = uptr->uf | UF_RPL | RQ_WPH (uptr) | RQ_RMV (uptr);
cp->pak[pkt].d[ONL_RSVL] = 0; /* reserved */ cp->pak[pkt].d[ONL_RSVL] = 0; /* reserved */
@ -2205,6 +2357,8 @@ return;
void rq_setint (MSC *cp) void rq_setint (MSC *cp)
{ {
sim_debug (DBG_TRC, rq_devmap[cp->cnum], "rq_setint\n");
cp->irq = 1; /* set ctrl int */ cp->irq = 1; /* set ctrl int */
SET_INT (RQ); /* set master int */ SET_INT (RQ); /* set master int */
return; return;
@ -2217,6 +2371,8 @@ void rq_clrint (MSC *cp)
int32 i; int32 i;
MSC *ncp; MSC *ncp;
sim_debug (DBG_TRC, rq_devmap[cp->cnum], "rq_clrint\n");
cp->irq = 0; /* clr ctrl int */ cp->irq = 0; /* clr ctrl int */
for (i = 0; i < RQ_NUMCT; i++) { /* loop thru ctrls */ for (i = 0; i < RQ_NUMCT; i++) { /* loop thru ctrls */
ncp = rq_ctxmap[i]; /* get context */ ncp = rq_ctxmap[i]; /* get context */
@ -2256,8 +2412,9 @@ t_bool rq_fatal (MSC *cp, uint32 err)
{ {
DEVICE *dptr = rq_devmap[cp->cnum]; DEVICE *dptr = rq_devmap[cp->cnum];
if (DEBUG_PRD (dptr)) sim_debug (DBG_TRC, rq_devmap[cp->cnum], "rq_fatal\n");
fprintf (sim_deb, ">>RQ%c: fatal err=%X\n", 'A' + cp->cnum, err);
sim_debug (DBG_REQ, dptr, "fatal err=%X\n", err);
rq_reset (rq_devmap[cp->cnum]); /* reset device */ rq_reset (rq_devmap[cp->cnum]); /* reset device */
cp->sa = SA_ER | err; /* SA = dead code */ cp->sa = SA_ER | err; /* SA = dead code */
cp->csta = CST_DEAD; /* state = dead */ cp->csta = CST_DEAD; /* state = dead */
@ -2330,10 +2487,11 @@ t_stat rq_attach (UNIT *uptr, char *cptr)
MSC *cp = rq_ctxmap[uptr->cnum]; MSC *cp = rq_ctxmap[uptr->cnum];
t_stat r; t_stat r;
r = attach_unit (uptr, cptr); r = sim_disk_attach (uptr, cptr, RQ_NUMBY, sizeof (uint16), (uptr->flags & UNIT_NOAUTO), DBG_DSK, drv_tab[GET_DTYPE (uptr->flags)].name, 0);
if (r != SCPE_OK) if (r != SCPE_OK)
return r; return r;
if (cp->csta == CST_UP)
if ((cp->csta == CST_UP) && sim_disk_isavailable (uptr))
uptr->flags = uptr->flags | UNIT_ATP; uptr->flags = uptr->flags | UNIT_ATP;
return SCPE_OK; return SCPE_OK;
} }
@ -2344,7 +2502,7 @@ t_stat rq_detach (UNIT *uptr)
{ {
t_stat r; t_stat r;
r = detach_unit (uptr); /* detach unit */ r = sim_disk_detach (uptr); /* detach unit */
if (r != SCPE_OK) if (r != SCPE_OK)
return r; return r;
uptr->flags = uptr->flags & ~(UNIT_ONL | UNIT_ATP); /* clr onl, atn pend */ uptr->flags = uptr->flags & ~(UNIT_ONL | UNIT_ATP); /* clr onl, atn pend */
@ -2361,6 +2519,8 @@ UNIT *uptr;
MSC *cp; MSC *cp;
DIB *dibp = (DIB *) dptr->ctxt; DIB *dibp = (DIB *) dptr->ctxt;
sim_debug (DBG_TRC, dptr, "rq_reset\n");
for (i = 0, cidx = -1; i < RQ_NUMCT; i++) { /* find ctrl num */ for (i = 0, cidx = -1; i < RQ_NUMCT; i++) { /* find ctrl num */
if (rq_devmap[i] == dptr) if (rq_devmap[i] == dptr)
cidx = i; cidx = i;
@ -2408,11 +2568,10 @@ for (i = 0; i < (RQ_NUMDR + 2); i++) { /* init units */
uptr->flags = uptr->flags & ~(UNIT_ONL | UNIT_ATP); uptr->flags = uptr->flags & ~(UNIT_ONL | UNIT_ATP);
uptr->uf = 0; /* clr unit flags */ uptr->uf = 0; /* clr unit flags */
uptr->cpkt = uptr->pktq = 0; /* clr pkt q's */ uptr->cpkt = uptr->pktq = 0; /* clr pkt q's */
} uptr->rqxb = (uint16 *) realloc (uptr->rqxb, (RQ_MAXFR >> 1) * sizeof (uint16));
if (rqxb == NULL) if (uptr->rqxb == NULL)
rqxb = (uint16 *) calloc (RQ_MAXFR >> 1, sizeof (uint16));
if (rqxb == NULL)
return SCPE_MEM; return SCPE_MEM;
}
return auto_config (0, 0); /* run autoconfig */ return auto_config (0, 0); /* run autoconfig */
} }

2
PDP11/pdp11_rx.c
View file

@ -130,7 +130,7 @@ t_stat rx_wr (int32 data, int32 PA, int32 access);
t_stat rx_svc (UNIT *uptr); t_stat rx_svc (UNIT *uptr);
t_stat rx_reset (DEVICE *dptr); t_stat rx_reset (DEVICE *dptr);
t_stat rx_boot (int32 unitno, DEVICE *dptr); t_stat rx_boot (int32 unitno, DEVICE *dptr);
void rx_done (int esr_flags, int new_ecode); void rx_done (int32 esr_flags, int32 new_ecode);
/* RX11 data structures /* RX11 data structures

2
PDP11/pdp11_ry.c
View file

@ -161,7 +161,7 @@ t_stat ry_wr (int32 data, int32 PA, int32 access);
t_stat ry_svc (UNIT *uptr); t_stat ry_svc (UNIT *uptr);
t_stat ry_reset (DEVICE *dptr); t_stat ry_reset (DEVICE *dptr);
t_stat ry_boot (int32 unitno, DEVICE *dptr); t_stat ry_boot (int32 unitno, DEVICE *dptr);
void ry_done (int esr_flags, int new_ecode); void ry_done (int32 esr_flags, int32 new_ecode);
t_stat ry_set_size (UNIT *uptr, int32 val, char *cptr, void *desc); t_stat ry_set_size (UNIT *uptr, int32 val, char *cptr, void *desc);
t_stat ry_attach (UNIT *uptr, char *cptr); t_stat ry_attach (UNIT *uptr, char *cptr);

442
PDP11/pdp11_tq.c
View file

@ -25,20 +25,23 @@
tq TQK50 tape controller tq TQK50 tape controller
05-Mar-11 MP Added missing state for proper save/restore
01-Mar-11 MP - Migrated complex physical tape activities to sim_tape
- adopted use of asynch I/O interfaces from sim_tape
- Added differing detailed debug output via sim_debug
14-Jan-11 MP Various fixes discovered while exploring Ultrix issue: 14-Jan-11 MP Various fixes discovered while exploring Ultrix issue:
- Set UNIT_SXC flag when a tape mark is encountered - Set UNIT_SXC flag when a tape mark is encountered
during forward motion read operations during forward motion read operations.
- Fixed logic which clears UNIT_SXC to check command - Fixed logic which clears UNIT_SXC to check command
modifier modifier.
- Added CMF_WR flag to tq_cmf entry for OP_WTM - Added CMF_WR flag to tq_cmf entry for OP_WTM.
- Made non-immediate rewind positioning operations - Made Non-immediate rewind positioning operations
take 2 seconds take 2 seconds.
- Added UNIT_IDLE flag to tq units - Added UNIT_IDLE flag to tq units.
- Fixed debug output of tape file positions when they - Fixed debug output of tape file positions when they
are 64b are 64b. Added more debug output after positioning
- Added more debug output after positioning operations. operations. Also, added textual display of the
- Added textual display of the command being performed command being performed (GUS,POS,RD,WR,etc…)
23-Dec-10 RMS Fixed comments about register addresses
18-Jun-07 RMS Added UNIT_IDLE flag to timer thread 18-Jun-07 RMS Added UNIT_IDLE flag to timer thread
16-Feb-06 RMS Revised for new magtape capacity checking 16-Feb-06 RMS Revised for new magtape capacity checking
31-Oct-05 RMS Fixed address width for large files 31-Oct-05 RMS Fixed address width for large files
@ -115,7 +118,10 @@ extern int32 cpu_opt;
#define pktq u4 /* packet queue */ #define pktq u4 /* packet queue */
#define uf buf /* settable unit flags */ #define uf buf /* settable unit flags */
#define objp wait /* object position */ #define objp wait /* object position */
#define io_status u5 /* io status from callback */
#define io_complete u6 /* io completion flag */
#define TQ_WPH(u) ((sim_tape_wrp (u))? UF_WPH: 0) #define TQ_WPH(u) ((sim_tape_wrp (u))? UF_WPH: 0)
#define results up7 /* xfer buffer & results */
#define CST_S1 0 /* init stage 1 */ #define CST_S1 0 /* init stage 1 */
#define CST_S1_WR 1 /* stage 1 wrap */ #define CST_S1_WR 1 /* stage 1 wrap */
@ -240,7 +246,6 @@ extern int32 tmr_poll, clk_tps;
extern FILE *sim_deb; extern FILE *sim_deb;
extern uint32 sim_taddr_64; extern uint32 sim_taddr_64;
uint8 *tqxb = NULL; /* xfer buffer */
uint32 tq_sa = 0; /* status, addr */ uint32 tq_sa = 0; /* status, addr */
uint32 tq_saw = 0; /* written data */ uint32 tq_saw = 0; /* written data */
uint32 tq_s1dat = 0; /* S1 data */ uint32 tq_s1dat = 0; /* S1 data */
@ -340,7 +345,7 @@ DEVICE tq_dev;
t_stat tq_rd (int32 *data, int32 PA, int32 access); t_stat tq_rd (int32 *data, int32 PA, int32 access);
t_stat tq_wr (int32 data, int32 PA, int32 access); t_stat tq_wr (int32 data, int32 PA, int32 access);
t_stat tq_inta (void); int32 tq_inta (void);
t_stat tq_svc (UNIT *uptr); t_stat tq_svc (UNIT *uptr);
t_stat tq_tmrsvc (UNIT *uptr); t_stat tq_tmrsvc (UNIT *uptr);
t_stat tq_quesvc (UNIT *uptr); t_stat tq_quesvc (UNIT *uptr);
@ -374,12 +379,10 @@ t_bool tq_dte (UNIT *uptr, uint32 err);
t_bool tq_hbe (UNIT *uptr, uint32 ba); t_bool tq_hbe (UNIT *uptr, uint32 ba);
t_bool tq_una (UNIT *uptr); t_bool tq_una (UNIT *uptr);
uint32 tq_map_status (UNIT *uptr, t_stat st); uint32 tq_map_status (UNIT *uptr, t_stat st);
uint32 tq_spacef (UNIT *uptr, uint32 cnt, uint32 *skipped, t_bool qrec); void tq_rdbuff_top (UNIT *uptr, t_mtrlnt *tbc);
uint32 tq_skipff (UNIT *uptr, uint32 cnt, uint32 *skipped); uint32 tq_rdbuff_bottom (UNIT *uptr, t_mtrlnt *tbc);
uint32 tq_rdbuff (UNIT *uptr, t_mtrlnt *tbc); void tq_rdbufr_top (UNIT *uptr, t_mtrlnt *tbc);
uint32 tq_spacer (UNIT *uptr, uint32 cnt, uint32 *skipped, t_bool qrec); uint32 tq_rdbufr_bottom (UNIT *uptr, t_mtrlnt *tbc);
uint32 tq_skipfr (UNIT *uptr, uint32 cnt, uint32 *skipped);
uint32 tq_rdbufr (UNIT *uptr, t_mtrlnt *tbc);
t_bool tq_deqf (int32 *pkt); t_bool tq_deqf (int32 *pkt);
int32 tq_deqh (int32 *lh); int32 tq_deqh (int32 *lh);
void tq_enqh (int32 *lh, int32 pkt); void tq_enqh (int32 *lh, int32 pkt);
@ -429,9 +432,11 @@ REG tq_reg[] = {
{ GRDATA (SA, tq_sa, DEV_RDX, 16, 0) }, { GRDATA (SA, tq_sa, DEV_RDX, 16, 0) },
{ GRDATA (SAW, tq_saw, DEV_RDX, 16, 0) }, { GRDATA (SAW, tq_saw, DEV_RDX, 16, 0) },
{ GRDATA (S1DAT, tq_s1dat, DEV_RDX, 16, 0) }, { GRDATA (S1DAT, tq_s1dat, DEV_RDX, 16, 0) },
{ GRDATA (CQIOFF, tq_cq.ioff, DEV_RDX, 32, 0) },
{ GRDATA (CQBA, tq_cq.ba, DEV_RDX, 22, 0) }, { GRDATA (CQBA, tq_cq.ba, DEV_RDX, 22, 0) },
{ GRDATA (CQLNT, tq_cq.lnt, DEV_RDX, 8, 2), REG_NZ }, { GRDATA (CQLNT, tq_cq.lnt, DEV_RDX, 8, 2), REG_NZ },
{ GRDATA (CQIDX, tq_cq.idx, DEV_RDX, 8, 2) }, { GRDATA (CQIDX, tq_cq.idx, DEV_RDX, 8, 2) },
{ GRDATA (TQIOFF, tq_rq.ioff, DEV_RDX, 32, 0) },
{ GRDATA (TQBA, tq_rq.ba, DEV_RDX, 22, 0) }, { GRDATA (TQBA, tq_rq.ba, DEV_RDX, 22, 0) },
{ GRDATA (TQLNT, tq_rq.lnt, DEV_RDX, 8, 2), REG_NZ }, { GRDATA (TQLNT, tq_rq.lnt, DEV_RDX, 8, 2), REG_NZ },
{ GRDATA (TQIDX, tq_rq.idx, DEV_RDX, 8, 2) }, { GRDATA (TQIDX, tq_rq.idx, DEV_RDX, 8, 2) },
@ -504,12 +509,44 @@ MTAB tq_mod[] = {
{ 0 } { 0 }
}; };
/* debugging bitmaps */
#define DBG_TRC 0x0001 /* trace routine calls */
#define DBG_INI 0x0002 /* display setup/init sequence info */
#define DBG_REG 0x0004 /* trace read/write registers */
#define DBG_REQ 0x0008 /* display transfer requests */
#define DBG_TAP 0x0010 /* display sim_tape activities */
#define DBG_DAT 0x0020 /* display transfer data */
DEBTAB tq_debug[] = {
{"TRACE", DBG_TRC},
{"INIT", DBG_INI},
{"REG", DBG_REG},
{"REQ", DBG_REQ},
{"TAPE", DBG_TAP},
{"DATA", DBG_DAT},
{0}
};
DEVICE tq_dev = { DEVICE tq_dev = {
"TQ", tq_unit, tq_reg, tq_mod, "TQ", tq_unit, tq_reg, tq_mod,
TQ_NUMDR + 2, 10, T_ADDR_W, 1, DEV_RDX, 8, TQ_NUMDR + 2, 10, T_ADDR_W, 1, DEV_RDX, 8,
NULL, NULL, &tq_reset, NULL, NULL, &tq_reset,
&tq_boot, &tq_attach, &tq_detach, &tq_boot, &tq_attach, &tq_detach,
&tq_dib, DEV_DISABLE | DEV_UBUS | DEV_QBUS | DEV_DEBUG &tq_dib, DEV_DISABLE | DEV_UBUS | DEV_QBUS | DEV_DEBUG,
0, tq_debug
};
struct tq_req_results { /* intermediate State during tape motion commands */
t_stat io_status;
int32 io_complete;
int rewind_done;
uint32 sts;
uint32 sktmk;
uint32 skrec;
t_mtrlnt tbc;
int32 objupd;
uint8 tqxb[TQ_MAXFR];
}; };
/* I/O dispatch routines, I/O addresses 17774500 - 17774502 /* I/O dispatch routines, I/O addresses 17774500 - 17774502
@ -520,6 +557,8 @@ DEVICE tq_dev = {
t_stat tq_rd (int32 *data, int32 PA, int32 access) t_stat tq_rd (int32 *data, int32 PA, int32 access)
{ {
sim_debug(DBG_REG, &tq_dev, "tq_rd(PA=0x%08X [%s], access=%d)\n", PA, ((PA >> 1) & 01) ? "IP" : "SA", access);
switch ((PA >> 1) & 01) { /* decode PA<1> */ switch ((PA >> 1) & 01) { /* decode PA<1> */
case 0: /* IP */ case 0: /* IP */
*data = 0; /* reads zero */ *data = 0; /* reads zero */
@ -541,13 +580,13 @@ return SCPE_OK;
t_stat tq_wr (int32 data, int32 PA, int32 access) t_stat tq_wr (int32 data, int32 PA, int32 access)
{ {
sim_debug(DBG_REG, &tq_dev, "tq_wr(PA=0x%08X [%s], access=%d)\n", PA, ((PA >> 1) & 01) ? "IP" : "SA", access);
switch ((PA >> 1) & 01) { /* decode PA<1> */ switch ((PA >> 1) & 01) { /* decode PA<1> */
case 0: /* IP */ case 0: /* IP */
tq_reset (&tq_dev); /* init device */ tq_reset (&tq_dev); /* init device */
if (DEBUG_PRS (tq_dev)) sim_debug (DBG_REQ, &tq_dev, "initialization started\n");
fprintf (sim_deb, ">>TQ: initialization started, time=%.0f\n",
sim_gtime ());
break; break;
case 1: /* SA */ case 1: /* SA */
@ -611,9 +650,12 @@ int32 i, cnid;
int32 pkt = 0; int32 pkt = 0;
UNIT *nuptr; UNIT *nuptr;
if (tq_csta < CST_UP) { /* still init? */ sim_debug(DBG_TRC, &tq_dev, "tq_quesvc\n");
switch (tq_csta) { /* controller state? */
if (tq_csta < CST_UP) { /* still init? */
sim_debug(DBG_INI, &tq_dev, "CSTA=%d, SAW=0x%X\n", tq_csta, tq_saw);
switch (tq_csta) { /* controller state? */
case CST_S1: /* need S1 reply */ case CST_S1: /* need S1 reply */
if (tq_saw & SA_S1H_VL) { /* valid? */ if (tq_saw & SA_S1H_VL) { /* valid? */
if (tq_saw & SA_S1H_WR) { /* wrap? */ if (tq_saw & SA_S1H_WR) { /* wrap? */
@ -661,8 +703,7 @@ if (tq_csta < CST_UP) { /* still init? */
case CST_S4: /* need S4 reply */ case CST_S4: /* need S4 reply */
if (tq_saw & SA_S4H_GO) { /* go set? */ if (tq_saw & SA_S4H_GO) { /* go set? */
if (DEBUG_PRS (tq_dev)) sim_debug (DBG_REQ, &tq_dev, "initialization complete\n");
fprintf (sim_deb, ">>TQ: initialization complete\n");
tq_csta = CST_UP; /* we're up */ tq_csta = CST_UP; /* we're up */
tq_sa = 0; /* clear SA */ tq_sa = 0; /* clear SA */
sim_activate (&tq_unit[TQ_TIMER], tmr_poll * clk_tps); sim_activate (&tq_unit[TQ_TIMER], tmr_poll * clk_tps);
@ -687,21 +728,22 @@ if ((pkt == 0) && tq_pip) { /* polling? */
if (!tq_getpkt (&pkt)) /* get host pkt */ if (!tq_getpkt (&pkt)) /* get host pkt */
return SCPE_OK; return SCPE_OK;
if (pkt) { /* got one? */ if (pkt) { /* got one? */
if (DEBUG_PRS (tq_dev)) {
UNIT *up = tq_getucb (tq_pkt[pkt].d[CMD_UN]); UNIT *up = tq_getucb (tq_pkt[pkt].d[CMD_UN]);
fprintf (sim_deb, ">>TQ: cmd=%04X(%3s), mod=%04X, unit=%d, ",
tq_pkt[pkt].d[CMD_OPC], tq_cmdname[tq_pkt[pkt].d[CMD_OPC]&0x3f], tq_pkt[pkt].d[CMD_MOD], tq_pkt[pkt].d[CMD_UN]); if (up)
fprintf (sim_deb, "bc=%04X%04X, ma=%04X%04X", sim_debug (DBG_REQ, &tq_dev, "cmd=%04X(%3s), mod=%04X, unit=%d, bc=%04X%04X, ma=%04X%04X, obj=%d, pos=0x%X\n",
tq_pkt[pkt].d[CMD_OPC], tq_cmdname[tq_pkt[pkt].d[CMD_OPC]&0x3f],
tq_pkt[pkt].d[CMD_MOD], tq_pkt[pkt].d[CMD_UN],
tq_pkt[pkt].d[RW_BCH], tq_pkt[pkt].d[RW_BCL],
tq_pkt[pkt].d[RW_BAH], tq_pkt[pkt].d[RW_BAL],
up->objp, up->pos);
else
sim_debug (DBG_REQ, &tq_dev, "cmd=%04X(%3s), mod=%04X, unit=%d, bc=%04X%04X, ma=%04X%04X\n",
tq_pkt[pkt].d[CMD_OPC], tq_cmdname[tq_pkt[pkt].d[CMD_OPC]&0x3f],
tq_pkt[pkt].d[CMD_MOD], tq_pkt[pkt].d[CMD_UN],
tq_pkt[pkt].d[RW_BCH], tq_pkt[pkt].d[RW_BCL], tq_pkt[pkt].d[RW_BCH], tq_pkt[pkt].d[RW_BCL],
tq_pkt[pkt].d[RW_BAH], tq_pkt[pkt].d[RW_BAL]); tq_pkt[pkt].d[RW_BAH], tq_pkt[pkt].d[RW_BAL]);
if (up) {
fprintf (sim_deb, ", pos=");
fprint_val (sim_deb, up->pos, 10, T_ADDR_W, PV_LEFT);
fprintf (sim_deb, ", obj=%d\n", up->objp);
}
else fprintf (sim_deb, "\n");
fflush (sim_deb);
}
if (GETP (pkt, UQ_HCTC, TYP) != UQ_TYP_SEQ) /* seq packet? */ if (GETP (pkt, UQ_HCTC, TYP) != UQ_TYP_SEQ) /* seq packet? */
return tq_fatal (PE_PIE); /* no, term thread */ return tq_fatal (PE_PIE); /* no, term thread */
cnid = GETP (pkt, UQ_HCTC, CID); /* get conn ID */ cnid = GETP (pkt, UQ_HCTC, CID); /* get conn ID */
@ -735,6 +777,8 @@ t_stat tq_tmrsvc (UNIT *uptr)
int32 i; int32 i;
UNIT *nuptr; UNIT *nuptr;
sim_debug(DBG_TRC, &tq_dev, "tq_tmrsvc\n");
sim_activate (uptr, tmr_poll * clk_tps); /* reactivate */ sim_activate (uptr, tmr_poll * clk_tps); /* reactivate */
for (i = 0; i < TQ_NUMDR; i++) { /* poll */ for (i = 0; i < TQ_NUMDR; i++) { /* poll */
nuptr = tq_dev.units + i; nuptr = tq_dev.units + i;
@ -762,6 +806,8 @@ uint32 mdf = tq_pkt[pkt].d[CMD_MOD]; /* modifier */
uint32 lu = tq_pkt[pkt].d[CMD_UN]; /* unit # */ uint32 lu = tq_pkt[pkt].d[CMD_UN]; /* unit # */
UNIT *uptr; UNIT *uptr;
sim_debug(DBG_TRC, &tq_dev, "tq_mscp\n");
if ((cmd >= 64) || (tq_cmf[cmd] == 0)) { /* invalid cmd? */ if ((cmd >= 64) || (tq_cmf[cmd] == 0)) { /* invalid cmd? */
cmd = OP_END; /* set end op */ cmd = OP_END; /* set end op */
sts = ST_CMD | I_OPCD; /* ill op */ sts = ST_CMD | I_OPCD; /* ill op */
@ -785,6 +831,7 @@ else { /* valid cmd */
/* uptr->flags = uptr->flags & ~UNIT_CDL; */ /* uptr->flags = uptr->flags & ~UNIT_CDL; */
if ((mdf & MD_CSE) && (uptr->flags & UNIT_SXC)) /* clr ser exc? */ if ((mdf & MD_CSE) && (uptr->flags & UNIT_SXC)) /* clr ser exc? */
uptr->flags = uptr->flags & ~UNIT_SXC; uptr->flags = uptr->flags & ~UNIT_SXC;
memset (uptr->results, 0, sizeof (struct tq_req_results)); /* init request state */
} }
switch (cmd) { switch (cmd) {
@ -852,6 +899,8 @@ uint32 ref = GETP32 (pkt, ABO_REFL); /* cmd ref # */
int32 tpkt, prv; int32 tpkt, prv;
UNIT *uptr; UNIT *uptr;
sim_debug(DBG_TRC, &tq_dev, "tq_abo\n");
tpkt = 0; /* set no mtch */ tpkt = 0; /* set no mtch */
if (uptr = tq_getucb (lu)) { /* get unit */ if (uptr = tq_getucb (lu)) { /* get unit */
if (uptr->cpkt && /* curr pkt? */ if (uptr->cpkt && /* curr pkt? */
@ -895,6 +944,8 @@ uint32 mdf = tq_pkt[pkt].d[CMD_MOD]; /* modifiers */
uint32 sts; uint32 sts;
UNIT *uptr; UNIT *uptr;
sim_debug(DBG_TRC, &tq_dev, "tq_avl\n");
if (uptr = tq_getucb (lu)) { /* unit exist? */ if (uptr = tq_getucb (lu)) { /* unit exist? */
if (uptr->flags & UNIT_SXC) /* ser exc pending? */ if (uptr->flags & UNIT_SXC) /* ser exc pending? */
sts = ST_SXC; sts = ST_SXC;
@ -924,6 +975,8 @@ uint32 ref = GETP32 (pkt, GCS_REFL); /* ref # */
int32 tpkt; int32 tpkt;
UNIT *uptr; UNIT *uptr;
sim_debug(DBG_TRC, &tq_dev, "tq_gcs\n");
if ((uptr = tq_getucb (lu)) && /* valid lu? */ if ((uptr = tq_getucb (lu)) && /* valid lu? */
(tpkt = uptr->cpkt) && /* queued pkt? */ (tpkt = uptr->cpkt) && /* queued pkt? */
(GETP32 (tpkt, CMD_REFL) == ref) && /* match ref? */ (GETP32 (tpkt, CMD_REFL) == ref) && /* match ref? */
@ -944,6 +997,8 @@ uint32 lu = tq_pkt[pkt].d[CMD_UN]; /* unit # */
uint32 sts; uint32 sts;
UNIT *uptr; UNIT *uptr;
sim_debug(DBG_TRC, &tq_dev, "tq_gus\n");
if (tq_pkt[pkt].d[CMD_MOD] & MD_NXU) { /* next unit? */ if (tq_pkt[pkt].d[CMD_MOD] & MD_NXU) { /* next unit? */
if (lu >= TQ_NUMDR) { /* end of range? */ if (lu >= TQ_NUMDR) { /* end of range? */
lu = 0; /* reset to 0 */ lu = 0; /* reset to 0 */
@ -975,6 +1030,8 @@ uint32 lu = tq_pkt[pkt].d[CMD_UN]; /* unit # */
uint32 sts; uint32 sts;
UNIT *uptr; UNIT *uptr;
sim_debug(DBG_TRC, &tq_dev, "tq_onl\n");
if (uptr = tq_getucb (lu)) { /* unit exist? */ if (uptr = tq_getucb (lu)) { /* unit exist? */
if ((uptr->flags & UNIT_ATT) == 0) /* not attached? */ if ((uptr->flags & UNIT_ATT) == 0) /* not attached? */
sts = ST_OFL | SB_OFL_NV; /* offl no vol */ sts = ST_OFL | SB_OFL_NV; /* offl no vol */
@ -999,6 +1056,8 @@ return tq_putpkt (pkt, TRUE);
t_bool tq_scc (int32 pkt) t_bool tq_scc (int32 pkt)
{ {
sim_debug(DBG_TRC, &tq_dev, "tq_scc\n");
if (tq_pkt[pkt].d[SCC_MSV]) /* MSCP ver = 0? */ if (tq_pkt[pkt].d[SCC_MSV]) /* MSCP ver = 0? */
tq_putr (pkt, 0, 0, ST_CMD | I_VRSN, SCC_LNT, UQ_TYP_SEQ); tq_putr (pkt, 0, 0, ST_CMD | I_VRSN, SCC_LNT, UQ_TYP_SEQ);
else { else {
@ -1028,6 +1087,8 @@ uint32 lu = tq_pkt[pkt].d[CMD_UN]; /* unit # */
uint32 sts; uint32 sts;
UNIT *uptr; UNIT *uptr;
sim_debug(DBG_TRC, &tq_dev, "tq_suc\n");
if (uptr = tq_getucb (lu)) { /* unit exist? */ if (uptr = tq_getucb (lu)) { /* unit exist? */
if ((uptr->flags & UNIT_ATT) == 0) /* not attached? */ if ((uptr->flags & UNIT_ATT) == 0) /* not attached? */
sts = ST_OFL | SB_OFL_NV; /* offl no vol */ sts = ST_OFL | SB_OFL_NV; /* offl no vol */
@ -1050,6 +1111,8 @@ uint32 lu = tq_pkt[pkt].d[CMD_UN]; /* unit # */
uint32 sts; uint32 sts;
UNIT *uptr; UNIT *uptr;
sim_debug(DBG_TRC, &tq_dev, "tq_flu\n");
if (uptr = tq_getucb (lu)) /* unit exist? */ if (uptr = tq_getucb (lu)) /* unit exist? */
sts = tq_mot_valid (uptr, OP_FLU); /* validate req */ sts = tq_mot_valid (uptr, OP_FLU); /* validate req */
else sts = ST_OFL; /* offline */ else sts = ST_OFL; /* offline */
@ -1066,11 +1129,14 @@ uint32 cmd = GETP (pkt, CMD_OPC, OPC); /* opcode */
uint32 sts; uint32 sts;
UNIT *uptr; UNIT *uptr;
sim_debug(DBG_TRC, &tq_dev, "tq_erase\n");
if (uptr = tq_getucb (lu)) { /* unit exist? */ if (uptr = tq_getucb (lu)) { /* unit exist? */
sts = tq_mot_valid (uptr, cmd); /* validity checks */ sts = tq_mot_valid (uptr, cmd); /* validity checks */
if (sts == ST_SUC) { /* ok? */ if (sts == ST_SUC) { /* ok? */
uptr->cpkt = pkt; /* op in progress */ uptr->cpkt = pkt; /* op in progress */
sim_activate (uptr, tq_xtime); /* activate */ uptr->iostarttime = sim_grtime();
sim_activate (uptr, 0); /* activate */
return OK; /* done */ return OK; /* done */
} }
} }
@ -1087,12 +1153,15 @@ uint32 lu = tq_pkt[pkt].d[CMD_UN]; /* unit # */
uint32 sts, objp = 0; uint32 sts, objp = 0;
UNIT *uptr; UNIT *uptr;
sim_debug(DBG_TRC, &tq_dev, "tq_wtm\n");
if (uptr = tq_getucb (lu)) { /* unit exist? */ if (uptr = tq_getucb (lu)) { /* unit exist? */
objp = uptr->objp; /* position op */ objp = uptr->objp; /* position op */
sts = tq_mot_valid (uptr, OP_WTM); /* validity checks */ sts = tq_mot_valid (uptr, OP_WTM); /* validity checks */
if (sts == ST_SUC) { /* ok? */ if (sts == ST_SUC) { /* ok? */
uptr->cpkt = pkt; /* op in progress */ uptr->cpkt = pkt; /* op in progress */
sim_activate (uptr, tq_xtime); /* activate */ uptr->iostarttime = sim_grtime();
sim_activate (uptr, 0); /* activate */
return OK; /* done */ return OK; /* done */
} }
} }
@ -1110,6 +1179,8 @@ uint32 lu = tq_pkt[pkt].d[CMD_UN]; /* unit # */
uint32 sts, objp = 0; uint32 sts, objp = 0;
UNIT *uptr; UNIT *uptr;
sim_debug(DBG_TRC, &tq_dev, "tq_pos\n");
if (uptr = tq_getucb (lu)) { /* unit exist? */ if (uptr = tq_getucb (lu)) { /* unit exist? */
objp = uptr->objp; /* position op */ objp = uptr->objp; /* position op */
sts = tq_mot_valid (uptr, OP_POS); /* validity checks */ sts = tq_mot_valid (uptr, OP_POS); /* validity checks */
@ -1119,8 +1190,10 @@ if (uptr = tq_getucb (lu)) { /* unit exist? */
if ((tq_pkt[pkt].d[CMD_MOD] & MD_RWD) && /* rewind? */ if ((tq_pkt[pkt].d[CMD_MOD] & MD_RWD) && /* rewind? */
(!(tq_pkt[pkt].d[CMD_MOD] & MD_IMM))) /* !immediate? */ (!(tq_pkt[pkt].d[CMD_MOD] & MD_IMM))) /* !immediate? */
sim_activate (uptr, tq_rwtime); /* use 2 sec rewind execute time */ sim_activate (uptr, tq_rwtime); /* use 2 sec rewind execute time */
else /* otherwise */ else { /* otherwise */
sim_activate (uptr, tq_xtime); /* use normal execute time */ uptr->iostarttime = sim_grtime();
sim_activate (uptr, 0); /* use normal execute time */
}
return OK; /* done */ return OK; /* done */
} }
} }
@ -1142,6 +1215,8 @@ uint32 bc = GETP32 (pkt, RW_BCL); /* byte count */
uint32 sts, objp = 0; uint32 sts, objp = 0;
UNIT *uptr; UNIT *uptr;
sim_debug(DBG_TRC, &tq_dev, "tq_rw\n");
if (uptr = tq_getucb (lu)) { /* unit exist? */ if (uptr = tq_getucb (lu)) { /* unit exist? */
objp = uptr->objp; /* position op */ objp = uptr->objp; /* position op */
sts = tq_mot_valid (uptr, cmd); /* validity checks */ sts = tq_mot_valid (uptr, cmd); /* validity checks */
@ -1152,7 +1227,8 @@ if (uptr = tq_getucb (lu)) { /* unit exist? */
} }
else { else {
uptr->cpkt = pkt; /* op in progress */ uptr->cpkt = pkt; /* op in progress */
sim_activate (uptr, tq_xtime); /* activate */ uptr->iostarttime = sim_grtime();
sim_activate (uptr, 0); /* activate */
return OK; /* done */ return OK; /* done */
} }
} }
@ -1169,6 +1245,8 @@ return tq_putpkt (pkt, TRUE);
int32 tq_mot_valid (UNIT *uptr, uint32 cmd) int32 tq_mot_valid (UNIT *uptr, uint32 cmd)
{ {
sim_debug(DBG_TRC, &tq_dev, "tq_mot_valid\n");
if (uptr->flags & UNIT_SXC) /* ser exc pend? */ if (uptr->flags & UNIT_SXC) /* ser exc pend? */
return ST_SXC; return ST_SXC;
if ((uptr->flags & UNIT_ATT) == 0) /* not attached? */ if ((uptr->flags & UNIT_ATT) == 0) /* not attached? */
@ -1190,10 +1268,28 @@ return ST_SUC; /* success! */
/* Unit service for motion commands */ /* Unit service for motion commands */
/* I/O completion callback */
void tq_io_complete (UNIT *uptr, t_stat status)
{
struct tq_req_results *res = (struct tq_req_results *)uptr->results;
int32 elapsed = sim_grtime()-uptr->iostarttime;
sim_debug(DBG_TRC, &tq_dev, "tq_io_complete(status=%d)\n", status);
res->io_status = status;
res->io_complete = 1;
if (elapsed > tq_xtime)
sim_activate (uptr, 0);
else
sim_activate (uptr, tq_xtime-elapsed);
}
t_stat tq_svc (UNIT *uptr) t_stat tq_svc (UNIT *uptr)
{ {
uint32 t, sts, sktmk, skrec; uint32 t;
t_mtrlnt i, tbc, wbc; t_mtrlnt wbc;
int32 pkt = uptr->cpkt; /* get packet */ int32 pkt = uptr->cpkt; /* get packet */
uint32 cmd = GETP (pkt, CMD_OPC, OPC); /* get cmd */ uint32 cmd = GETP (pkt, CMD_OPC, OPC); /* get cmd */
uint32 mdf = tq_pkt[pkt].d[CMD_MOD]; /* modifier */ uint32 mdf = tq_pkt[pkt].d[CMD_MOD]; /* modifier */
@ -1201,7 +1297,14 @@ uint32 ba = GETP32 (pkt, RW_BAL); /* buf addr */
t_mtrlnt bc = GETP32 (pkt, RW_BCL); /* byte count */ t_mtrlnt bc = GETP32 (pkt, RW_BCL); /* byte count */
uint32 nrec = GETP32 (pkt, POS_RCL); /* #rec to skip */ uint32 nrec = GETP32 (pkt, POS_RCL); /* #rec to skip */
uint32 ntmk = GETP32 (pkt, POS_TMCL); /* #tmk to skp */ uint32 ntmk = GETP32 (pkt, POS_TMCL); /* #tmk to skp */
struct tq_req_results *res = (struct tq_req_results *)uptr->results;
int32 io_complete = res->io_complete;
sim_debug (DBG_TRC, &tq_dev, "tq_svc(unit=%d, pkt=%d, cmd=%s, mdf=0x%0X, bc=0x%0x, phase=%s)\n",
uptr-tq_dev.units, pkt, tq_cmdname[tq_pkt[pkt].d[CMD_OPC]&0x3f], mdf, bc,
uptr->io_complete ? "bottom" : "top");
res->io_complete = 0;
if (pkt == 0) /* what??? */ if (pkt == 0) /* what??? */
return SCPE_IERR; return SCPE_IERR;
if ((uptr->flags & UNIT_ATT) == 0) { /* not attached? */ if ((uptr->flags & UNIT_ATT) == 0) { /* not attached? */
@ -1221,60 +1324,71 @@ if (tq_cmf[cmd] & CMF_WR) { /* write op? */
return SCPE_OK; return SCPE_OK;
} }
} }
sts = ST_SUC; /* assume success */ if (!io_complete) {
tbc = 0; /* assume zero rec */ res->sts = ST_SUC; /* assume success */
res->tbc = 0; /* assume zero rec */
}
switch (cmd) { /* case on command */ switch (cmd) { /* case on command */
case OP_RD:case OP_ACC:case OP_CMP: /* read-like op */ case OP_RD:case OP_ACC:case OP_CMP: /* read-like op */
if (!io_complete) {
if (mdf & MD_REV) /* read record */ if (mdf & MD_REV) /* read record */
sts = tq_rdbufr (uptr, &tbc); tq_rdbufr_top (uptr, &res->tbc);
else sts = tq_rdbuff (uptr, &tbc); else
if (sts == ST_DRV) { /* read error? */ tq_rdbuff_top (uptr, &res->tbc);
PUTP32 (pkt, RW_BCL, 0); /* no bytes processed */ return SCPE_OK;
return tq_mot_err (uptr, tbc); /* log, done */
} }
if ((sts != ST_SUC) || (cmd == OP_ACC)) { /* error or access? */ if (mdf & MD_REV) /* read record */
if (sts == ST_TMK) res->sts = tq_rdbufr_bottom (uptr, &res->tbc);
else
res->sts = tq_rdbuff_bottom (uptr, &res->tbc);
if (res->sts == ST_DRV) { /* read error? */
PUTP32 (pkt, RW_BCL, 0); /* no bytes processed */
return tq_mot_err (uptr, res->tbc); /* log, done */
}
if ((res->sts != ST_SUC) || (cmd == OP_ACC)) { /* error or access? */
if (res->sts == ST_TMK)
uptr->flags = uptr->flags | UNIT_SXC; /* set ser exc */ uptr->flags = uptr->flags | UNIT_SXC; /* set ser exc */
PUTP32 (pkt, RW_BCL, 0); /* no bytes processed */ PUTP32 (pkt, RW_BCL, 0); /* no bytes processed */
break; break;
} }
if (tbc > bc) { /* tape rec > buf? */ if (res->tbc > bc) { /* tape rec > buf? */
uptr->flags = uptr->flags | UNIT_SXC; /* serious exc */ uptr->flags = uptr->flags | UNIT_SXC; /* serious exc */
sts = ST_RDT; /* data truncated */ res->sts = ST_RDT; /* data truncated */
wbc = bc; /* set working bc */ wbc = bc; /* set working bc */
} }
else wbc = tbc; else wbc = res->tbc;
if (cmd == OP_RD) { /* read? */ if (cmd == OP_RD) { /* read? */
if (t = Map_WriteB (ba, wbc, tqxb)) { /* store, nxm? */ if (t = Map_WriteB (ba, wbc, res->tqxb)) { /* store, nxm? */
PUTP32 (pkt, RW_BCL, wbc - t); /* adj bc */ PUTP32 (pkt, RW_BCL, wbc - t); /* adj bc */
if (tq_hbe (uptr, ba + wbc - t)) /* post err log */ if (tq_hbe (uptr, ba + wbc - t)) /* post err log */
tq_mot_end (uptr, EF_LOG, ST_HST | SB_HST_NXM, tbc); tq_mot_end (uptr, EF_LOG, ST_HST | SB_HST_NXM, res->tbc);
return SCPE_OK; /* end if nxm */ return SCPE_OK; /* end if nxm */
} }
} /* end if read */ } /* end if read */
else { /* compare */ else { /* compare */
uint8 mby, dby; uint8 mby, dby;
uint32 mba; uint32 mba;
t_mtrlnt i;
for (i = 0; i < wbc; i++) { /* loop */ for (i = 0; i < wbc; i++) { /* loop */
if (mdf & MD_REV) { /* reverse? */ if (mdf & MD_REV) { /* reverse? */
mba = ba + bc - 1 - i; /* mem addr */ mba = ba + bc - 1 - i; /* mem addr */
dby = tqxb[tbc - 1 - i]; /* byte */ dby = ((uint8 *)res->tqxb)[res->tbc - 1 - i]; /* byte */
} }
else { else {
mba = ba + i; mba = ba + i;
dby = tqxb[i]; dby = ((uint8 *)res->tqxb)[i];
} }
if (Map_ReadB (mba, 1, &mby)) { /* fetch, nxm? */ if (Map_ReadB (mba, 1, &mby)) { /* fetch, nxm? */
PUTP32 (pkt, RW_BCL, i); /* adj bc */ PUTP32 (pkt, RW_BCL, i); /* adj bc */
if (tq_hbe (uptr, mba)) /* post err log */ if (tq_hbe (uptr, mba)) /* post err log */
tq_mot_end (uptr, EF_LOG, ST_HST | SB_HST_NXM, tbc); tq_mot_end (uptr, EF_LOG, ST_HST | SB_HST_NXM, res->tbc);
return SCPE_OK; return SCPE_OK;
} }
if (mby != dby) { /* cmp err? */ if (mby != dby) { /* cmp err? */
uptr->flags = uptr->flags | UNIT_SXC; /* ser exc */ uptr->flags = uptr->flags | UNIT_SXC; /* ser exc */
PUTP32 (pkt, RW_BCL, i); /* adj bc */ PUTP32 (pkt, RW_BCL, i); /* adj bc */
tq_mot_end (uptr, 0, ST_CMP, tbc); tq_mot_end (uptr, 0, ST_CMP, res->tbc);
return SCPE_OK; /* exit */ return SCPE_OK; /* exit */
} }
} /* end for */ } /* end for */
@ -1283,23 +1397,31 @@ switch (cmd) { /* case on command */
break; break;
case OP_WR: /* write */ case OP_WR: /* write */
if (t = Map_ReadB (ba, bc, tqxb)) { /* fetch buf, nxm? */ if (!io_complete) { /* Top half processing */
if (t = Map_ReadB (ba, bc, res->tqxb)) { /* fetch buf, nxm? */
PUTP32 (pkt, RW_BCL, 0); /* no bytes xfer'd */ PUTP32 (pkt, RW_BCL, 0); /* no bytes xfer'd */
if (tq_hbe (uptr, ba + bc - t)) /* post err log */ if (tq_hbe (uptr, ba + bc - t)) /* post err log */
tq_mot_end (uptr, EF_LOG, ST_HST | SB_HST_NXM, bc); tq_mot_end (uptr, EF_LOG, ST_HST | SB_HST_NXM, bc);
return SCPE_OK; /* end else wr */ return SCPE_OK; /* end else wr */
} }
if (sim_tape_wrrecf (uptr, tqxb, bc)) /* write rec fwd, err? */ sim_tape_wrrecf_a (uptr, res->tqxb, bc, tq_io_complete); /* write rec fwd */
return SCPE_OK;
}
if (res->io_status)
return tq_mot_err (uptr, bc); /* log, end */ return tq_mot_err (uptr, bc); /* log, end */
uptr->objp = uptr->objp + 1; /* upd obj pos */ uptr->objp = uptr->objp + 1; /* upd obj pos */
if (TEST_EOT (uptr)) /* EOT on write? */ if (TEST_EOT (uptr)) /* EOT on write? */
uptr->flags = uptr->flags | UNIT_SXC; uptr->flags = uptr->flags | UNIT_SXC;
uptr->flags = uptr->flags & ~UNIT_TMK; /* disable LEOT */ uptr->flags = uptr->flags & ~UNIT_TMK; /* disable LEOT */
tbc = bc; /* RW_BC is ok */ res->tbc = bc; /* RW_BC is ok */
break; break;
case OP_WTM: /* write tape mark */ case OP_WTM: /* write tape mark */
if (sim_tape_wrtmk (uptr)) /* write tmk, err? */ if (!io_complete) { /* Top half processing */
sim_tape_wrtmk_a (uptr, tq_io_complete); /* write tmk, err? */
return SCPE_OK;
}
if (res->io_status)
return tq_mot_err (uptr, 0); /* log, end */ return tq_mot_err (uptr, 0); /* log, end */
uptr->objp = uptr->objp + 1; /* incr obj cnt */ uptr->objp = uptr->objp + 1; /* incr obj cnt */
case OP_ERG: /* erase gap */ case OP_ERG: /* erase gap */
@ -1309,51 +1431,47 @@ switch (cmd) { /* case on command */
break; break;
case OP_ERS: /* erase */ case OP_ERS: /* erase */
if (sim_tape_wreom (uptr)) /* write eom, err? */ if (!io_complete) { /* Top half processing */
sim_tape_wreomrw_a (uptr, tq_io_complete); /* write eom, err? */
return SCPE_OK;
}
if (res->io_status)
return tq_mot_err (uptr, 0); /* log, end */ return tq_mot_err (uptr, 0); /* log, end */
sim_tape_rewind (uptr); /* rewind */
uptr->objp = 0; uptr->objp = 0;
uptr->flags = uptr->flags & ~(UNIT_TMK | UNIT_POL); uptr->flags = uptr->flags & ~(UNIT_TMK | UNIT_POL);
break; break;
case OP_POS: /* position */ case OP_POS: /* position */
sktmk = skrec = 0; /* clr skipped */ if (!io_complete) { /* Top half processing */
res->sktmk = res->skrec = 0; /* clr skipped */
if (mdf & MD_RWD) { /* rewind? */ if (mdf & MD_RWD) { /* rewind? */
sim_tape_rewind (uptr);
uptr->objp = 0; /* clr flags */ uptr->objp = 0; /* clr flags */
uptr->flags = uptr->flags & ~(UNIT_TMK | UNIT_POL); uptr->flags = uptr->flags & ~(UNIT_TMK | UNIT_POL);
} }
if (mdf & MD_OBC) { /* skip obj? */ sim_tape_position_a (uptr,
if (mdf & MD_REV) /* reverse? */ ((mdf & MD_RWD) ? MTPOS_M_REW : 0) |
sts = tq_spacer (uptr, nrec, &skrec, FALSE); ((mdf & MD_REV) ? MTPOS_M_REV : 0) |
else sts = tq_spacef (uptr, nrec, &skrec, FALSE); ((mdf & MD_OBC) ? MTPOS_M_OBJ : 0) ,
nrec, &res->skrec, ntmk, &res->sktmk, (uint32 *)&res->objupd, tq_io_complete);
return SCPE_OK;
} }
else { /* skip tmk, rec */ if (res->io_status)
return tq_mot_err (uptr, 0); /* log, end */
sim_debug (DBG_REQ, &tq_dev, "Position Done: mdf=0x%04X, nrec=%d, ntmk=%d, skrec=%d, sktmk=%d, skobj=%d\n",
mdf, nrec, ntmk, res->skrec, res->sktmk, res->objupd);
if (mdf & MD_REV) if (mdf & MD_REV)
sts = tq_skipfr (uptr, ntmk, &sktmk); uptr->objp = uptr->objp - res->objupd;
else sts = tq_skipff (uptr, ntmk, &sktmk); else
if (sts == ST_SUC) { /* tmk succeed? */ uptr->objp = uptr->objp + res->objupd;
if (mdf & MD_REV) /* reverse? */ PUTP32 (pkt, POS_RCL, res->skrec); /* #rec skipped */
sts = tq_spacer (uptr, nrec, &skrec, TRUE); PUTP32 (pkt, POS_TMCL, res->sktmk); /* #tmk skipped */
else sts = tq_spacef (uptr, nrec, &skrec, TRUE);
if (sts == ST_TMK)
sktmk = sktmk + 1;
}
}
PUTP32 (pkt, POS_RCL, skrec); /* #rec skipped */
PUTP32 (pkt, POS_TMCL, sktmk); /* #tmk skipped */
if (DEBUG_PRS (tq_dev)) {
fprintf (sim_deb, ">>TQ: Position Done: mdf=%04X, nrec=%04X, ntmk=%04X, skrec=%04X, sktmk=%04X\n",
mdf, nrec, ntmk, skrec, sktmk);
fflush (sim_deb);
}
break; break;
default: default:
return SCPE_IERR; return SCPE_IERR;
} }
tq_mot_end (uptr, 0, sts, tbc); /* done */ tq_mot_end (uptr, 0, res->sts, res->tbc); /* done */
return SCPE_OK; return SCPE_OK;
} }
@ -1445,90 +1563,21 @@ switch (st) {
return ST_SUC; return ST_SUC;
} }
uint32 tq_spacef (UNIT *uptr, uint32 cnt, uint32 *skipped, t_bool qrec)
{
t_stat st;
t_mtrlnt tbc;
*skipped = 0;
while (*skipped < cnt) { /* loop */
st = sim_tape_sprecf (uptr, &tbc); /* space rec fwd */
if ((st != MTSE_OK) && (st != MTSE_TMK)) /* real error? */
return tq_map_status (uptr, st); /* map status */
uptr->objp = uptr->objp + 1; /* upd obj cnt */
if (st == MTSE_TMK) { /* tape mark? */
int32 pkt = uptr->cpkt; /* get pkt */
if ((tq_pkt[pkt].d[CMD_MOD] & MD_DLE) && /* LEOT? */
(uptr->flags & UNIT_TMK)) {
sim_tape_sprecr (uptr, &tbc); /* rev over tmk */
uptr->flags = uptr->flags | UNIT_SXC; /* serious exc */
return ST_LED;
}
uptr->flags = uptr->flags | UNIT_TMK; /* set TM seen */
if (qrec) /* rec spc? stop */
return ST_TMK;
}
else uptr->flags = uptr->flags & ~UNIT_TMK; /* clr TM seen */
*skipped = *skipped + 1; /* # obj skipped */
}
return ST_SUC;
}
uint32 tq_skipff (UNIT *uptr, uint32 cnt, uint32 *skipped)
{
uint32 st, skrec;
*skipped = 0;
while (*skipped < cnt) { /* loop */
st = tq_spacef (uptr, 0x7FFFFFFF, &skrec, TRUE); /* rec spc fwd */
if (st == ST_TMK) /* count files */
*skipped = *skipped + 1;
else if (st != ST_SUC)
return st;
}
return ST_SUC;
}
uint32 tq_spacer (UNIT *uptr, uint32 cnt, uint32 *skipped, t_bool qrec)
{
t_stat st;
t_mtrlnt tbc;
*skipped = 0;
while (*skipped < cnt) { /* loop */
st = sim_tape_sprecr (uptr, &tbc); /* spc rec rev */
if ((st != MTSE_OK) && (st != MTSE_TMK)) /* real error? */
return tq_map_status (uptr, st); /* map status */
uptr->objp = uptr->objp - 1; /* upd obj cnt */
if ((st == MTSE_TMK) && qrec) /* tape mark, stop? */
return ST_TMK;
*skipped = *skipped + 1; /* # obj skipped */
}
return ST_SUC;
}
uint32 tq_skipfr (UNIT *uptr, uint32 cnt, uint32 *skipped)
{
uint32 st, skrec;
*skipped = 0;
while (*skipped < cnt) { /* loopo */
st = tq_spacer (uptr, 0x7FFFFFFF, &skrec, TRUE); /* rec spc rev */
if (st == ST_TMK) /* tape mark? */
*skipped = *skipped + 1;
else if (st != 0) /* error? */
return st;
}
return ST_SUC;
}
/* Read buffer - can return ST_TMK, ST_FMT, or ST_DRV */ /* Read buffer - can return ST_TMK, ST_FMT, or ST_DRV */
uint32 tq_rdbuff (UNIT *uptr, t_mtrlnt *tbc) void tq_rdbuff_top (UNIT *uptr, t_mtrlnt *tbc)
{
struct tq_req_results *res = (struct tq_req_results *)uptr->results;
sim_tape_rdrecf_a (uptr, res->tqxb, tbc, MT_MAXFR, tq_io_complete);/* read rec fwd */
}
uint32 tq_rdbuff_bottom (UNIT *uptr, t_mtrlnt *tbc)
{ {
t_stat st; t_stat st;
struct tq_req_results *res = (struct tq_req_results *)uptr->results;
st = sim_tape_rdrecf (uptr, tqxb, tbc, MT_MAXFR); /* read rec fwd */ st = res->io_status; /* read rec fwd io status */
if (st == MTSE_TMK) { /* tape mark? */ if (st == MTSE_TMK) { /* tape mark? */
uptr->flags = uptr->flags | UNIT_SXC | UNIT_TMK; /* serious exc */ uptr->flags = uptr->flags | UNIT_SXC | UNIT_TMK; /* serious exc */
uptr->objp = uptr->objp + 1; /* update obj cnt */ uptr->objp = uptr->objp + 1; /* update obj cnt */
@ -1541,11 +1590,19 @@ uptr->objp = uptr->objp + 1; /* upd obj cnt */
return ST_SUC; return ST_SUC;
} }
uint32 tq_rdbufr (UNIT *uptr, t_mtrlnt *tbc) void tq_rdbufr_top (UNIT *uptr, t_mtrlnt *tbc)
{
struct tq_req_results *res = (struct tq_req_results *)uptr->results;
sim_tape_rdrecr_a (uptr, res->tqxb, tbc, MT_MAXFR, tq_io_complete); /* read rec rev */
}
uint32 tq_rdbufr_bottom (UNIT *uptr, t_mtrlnt *tbc)
{ {
t_stat st; t_stat st;
struct tq_req_results *res = (struct tq_req_results *)uptr->results;
st = sim_tape_rdrecr (uptr, tqxb, tbc, MT_MAXFR); /* read rec rev */ st = res->io_status; /* read rec rev io status */
if (st == MTSE_TMK) { /* tape mark? */ if (st == MTSE_TMK) { /* tape mark? */
uptr->flags = uptr->flags | UNIT_SXC; /* serious exc */ uptr->flags = uptr->flags | UNIT_SXC; /* serious exc */
uptr->objp = uptr->objp - 1; /* update obj cnt */ uptr->objp = uptr->objp - 1; /* update obj cnt */
@ -1645,7 +1702,7 @@ return tq_putpkt (pkt, TRUE);
/* Unit now available attention packet */ /* Unit now available attention packet */
int32 tq_una (UNIT *uptr) t_bool tq_una (UNIT *uptr)
{ {
int32 pkt; int32 pkt;
uint32 lu; uint32 lu;
@ -1744,21 +1801,17 @@ return tq_putdesc (&tq_cq, desc); /* release desc */
t_bool tq_putpkt (int32 pkt, t_bool qt) t_bool tq_putpkt (int32 pkt, t_bool qt)
{ {
uint32 addr, desc, lnt, cr; uint32 addr, desc, lnt, cr;
UNIT *up = tq_getucb (tq_pkt[pkt].d[CMD_UN]);
if (pkt == 0) /* any packet? */ if (pkt == 0) /* any packet? */
return OK; return OK;
if (DEBUG_PRS (tq_dev)) { if (up)
UNIT *up = tq_getucb (tq_pkt[pkt].d[CMD_UN]); sim_debug (DBG_REQ, &tq_dev, "rsp=%04X, sts=%04X, rszl=%04X, obj=%d, pos=%d\n",
fprintf (sim_deb, ">>TQ: rsp=%04X, sts=%04X", tq_pkt[pkt].d[RSP_OPF], tq_pkt[pkt].d[RSP_STS], tq_pkt[pkt].d[RW_RSZL],
up->objp, up->pos);
else
sim_debug (DBG_REQ, &tq_dev, "rsp=%04X, sts=%04X\n",
tq_pkt[pkt].d[RSP_OPF], tq_pkt[pkt].d[RSP_STS]); tq_pkt[pkt].d[RSP_OPF], tq_pkt[pkt].d[RSP_STS]);
if (up) {
fprintf (sim_deb, ", pos=");
fprint_val (sim_deb, up->pos, 10, T_ADDR_W, PV_LEFT);
fprintf (sim_deb, ", obj=%d\n", up->objp);
}
else fprintf (sim_deb, "\n");
fflush (sim_deb);
}
if (!tq_getdesc (&tq_rq, &desc)) /* get rsp desc */ if (!tq_getdesc (&tq_rq, &desc)) /* get rsp desc */
return ERR; return ERR;
if ((desc & UQ_DESC_OWN) == 0) { /* not valid? */ if ((desc & UQ_DESC_OWN) == 0) { /* not valid? */
@ -1944,8 +1997,9 @@ return tq_dib.vec; /* prog vector */
t_bool tq_fatal (uint32 err) t_bool tq_fatal (uint32 err)
{ {
if (DEBUG_PRS (tq_dev)) sim_debug (DBG_TRC, &tq_dev, "tq_fatal\n");
fprintf (sim_deb, ">>TQ: fatal err=%X\n", err);
sim_debug (DBG_REQ, &tq_dev, "fatal err=%X\n", err);
tq_reset (&tq_dev); /* reset device */ tq_reset (&tq_dev); /* reset device */
tq_sa = SA_ER | err; /* SA = dead code */ tq_sa = SA_ER | err; /* SA = dead code */
tq_csta = CST_DEAD; /* state = dead */ tq_csta = CST_DEAD; /* state = dead */
@ -1959,7 +2013,7 @@ t_stat tq_attach (UNIT *uptr, char *cptr)
{ {
t_stat r; t_stat r;
r = sim_tape_attach (uptr, cptr); r = sim_tape_attach_ex (uptr, cptr, DBG_TAP);
if (r != SCPE_OK) if (r != SCPE_OK)
return r; return r;
if (tq_csta == CST_UP) if (tq_csta == CST_UP)
@ -2020,11 +2074,11 @@ for (i = 0; i < TQ_NUMDR + 2; i++) { /* init units */
~(UNIT_ONL|UNIT_ATP|UNIT_SXC|UNIT_POL|UNIT_TMK); ~(UNIT_ONL|UNIT_ATP|UNIT_SXC|UNIT_POL|UNIT_TMK);
uptr->uf = 0; /* clr unit flags */ uptr->uf = 0; /* clr unit flags */
uptr->cpkt = uptr->pktq = 0; /* clr pkt q's */ uptr->cpkt = uptr->pktq = 0; /* clr pkt q's */
} if (uptr->results == NULL)
if (tqxb == NULL) uptr->results = calloc (1, sizeof (struct tq_req_results));
tqxb = (uint8 *) calloc (TQ_MAXFR, sizeof (uint8)); if (uptr->results == NULL)
if (tqxb == NULL)
return SCPE_MEM; return SCPE_MEM;
}
return SCPE_OK; return SCPE_OK;
} }

2
PDP11/pdp11_tu.c
View file

@ -598,7 +598,7 @@ return MBE_GOE;
/* Abort transfer */ /* Abort transfer */
t_stat tu_abort (void) int32 tu_abort (void)
{ {
return tu_reset (&tu_dev); return tu_reset (&tu_dev);
} }

2
PDP11/pdp11_xq.h
View file

@ -294,7 +294,7 @@ struct xq_device {
ETH_PACK read_buffer; ETH_PACK read_buffer;
ETH_PACK write_buffer; ETH_PACK write_buffer;
ETH_QUE ReadQ; ETH_QUE ReadQ;
uint32 idtmr; /* countdown for ID Timer */ int32 idtmr; /* countdown for ID Timer */
uint32 must_poll; /* receiver must poll instead of counting on asynch polls */ uint32 must_poll; /* receiver must poll instead of counting on asynch polls */
}; };

2
PDP18B/pdp18b_cpu.c
View file

@ -1989,7 +1989,7 @@ else *ea = (PC & BLKMASK) | (t & IAMASK); /* within 32K */
return sta; return sta;
} }
t_stat Incr_addr (int32 ma) int32 Incr_addr (int32 ma)
{ {
if (memm) if (memm)
return ((ma & B_EPCMASK) | ((ma + 1) & B_DAMASK)); return ((ma & B_EPCMASK) | ((ma + 1) & B_DAMASK));

2
PDP18B/pdp18b_fpp.c
View file

@ -159,7 +159,7 @@ t_stat fp15_fmul (int32 ir, UFP *a, UFP *b);
t_stat fp15_fdiv (int32 ir, UFP *a, UFP *b); t_stat fp15_fdiv (int32 ir, UFP *a, UFP *b);
t_stat fp15_fix (int32 ir, UFP *a); t_stat fp15_fix (int32 ir, UFP *a);
t_stat fp15_norm (int32 ir, UFP *a, UFP *b, t_bool rnd); t_stat fp15_norm (int32 ir, UFP *a, UFP *b, t_bool rnd);
t_stat fp15_exc (int32 sta); t_stat fp15_exc (t_stat sta);
void fp15_asign (int32 ir, UFP *a); void fp15_asign (int32 ir, UFP *a);
void dp_add (UFP *a, UFP *b); void dp_add (UFP *a, UFP *b);
void dp_sub (UFP *a, UFP *b); void dp_sub (UFP *a, UFP *b);

10
S3/s3_cpu.c
View file

@ -398,13 +398,13 @@ extern t_stat sim_activate (UNIT *uptr, int32 delay);
extern int32 fprint_sym (FILE *of, int32 addr, uint32 *val, extern int32 fprint_sym (FILE *of, int32 addr, uint32 *val,
UNIT *uptr, int32 sw); UNIT *uptr, int32 sw);
int32 nulldev (int32 opcode, int32 m, int32 n, int32 data); int32 nulldev (int32 opcode, int32 m, int32 n, int32 data);
int add_zoned (int32 addr1, int32 len1, int32 addr2, int32 len2); int32 add_zoned (int32 addr1, int32 len1, int32 addr2, int32 len2);
int32 subtract_zoned (int32 addr1, int32 len1, int32 addr2, int32 len2); int32 subtract_zoned (int32 addr1, int32 len1, int32 addr2, int32 len2);
static int32 compare(int32 byte1, int32 byte2, int32 cond); static int32 compare(int32 byte1, int32 byte2, int32 cond);
static int32 condition(int32 qbyte); static int32 condition(int32 qbyte);
static void store_decimal (int32 addr, int32 len, uint8 *dec, int sign); static void store_decimal (int32 addr, int32 len, uint8 *dec, int sign);
static void load_decimal (int32 addr, int32 len, uint8 *result, int32 *count, int32 *sign); static void load_decimal (int32 addr, int32 len, uint8 *result, int *count, int *sign);
static void add_decimal (uint8 *dec1, uint8 *dec2, uint8 *result, int32 *count); static void add_decimal (uint8 *dec1, uint8 *dec2, uint8 *result, int *count);
static void subtract_decimal (uint8 *dec1, uint8 *dec2, uint8 *result, int *count, int *sign); static void subtract_decimal (uint8 *dec1, uint8 *dec2, uint8 *result, int *count, int *sign);
int32 GetMem(int32 addr); int32 GetMem(int32 addr);
int32 PutMem(int32 addr, int32 data); int32 PutMem(int32 addr, int32 data);
@ -1541,7 +1541,7 @@ int sign1, sign2, sign3; /* Sign of operands & result */
/* This field is set to zero if the result is all zero, */ /* This field is set to zero if the result is all zero, */
/* or to MAX_DECIMAL_DIGITS+1 if overflow occurred. */ /* or to MAX_DECIMAL_DIGITS+1 if overflow occurred. */
/*-------------------------------------------------------------------*/ /*-------------------------------------------------------------------*/
static void add_decimal (uint8 *dec1, uint8 *dec2, uint8 *result, int32 *count) static void add_decimal (uint8 *dec1, uint8 *dec2, uint8 *result, int *count)
{ {
int d; /* Decimal digit */ int d; /* Decimal digit */
int i; /* Array subscript */ int i; /* Array subscript */
@ -1684,7 +1684,7 @@ uint8 *lower; /* -> Lower value operand */
/* exception, or if the operand causes a data exception */ /* exception, or if the operand causes a data exception */
/* because of invalid decimal digits or sign. */ /* because of invalid decimal digits or sign. */
/*-------------------------------------------------------------------*/ /*-------------------------------------------------------------------*/
static void load_decimal (int32 addr, int32 len, uint8 *result, int32 *count, int32 *sign) static void load_decimal (int32 addr, int32 len, uint8 *result, int *count, int *sign)
{ {
int h; /* Hexadecimal digit */ int h; /* Hexadecimal digit */
int i, j; /* Array subscripts */ int i, j; /* Array subscripts */

2
S3/s3_defs.h
View file

@ -67,7 +67,7 @@
struct ndev { struct ndev {
int32 level; /* interrupt level */ int32 level; /* interrupt level */
int32 pri; /* Device priority */ int32 pri; /* Device priority */
int32 (*routine)(); /* dispatch routine */ int32 (*routine)(int32, int32, int32, int32); /* dispatch routine */
}; };
/* Structure to define operation codes */ /* Structure to define operation codes */

2
VAX/vax780_fload.c
View file

@ -88,7 +88,7 @@ uint32 rtfile_find (uint32 block, uint32 sector);
/* FLOAD file_name {file_origin} */ /* FLOAD file_name {file_origin} */
t_stat vax780_fload (int flag, char *cptr) t_stat vax780_fload (int32 flag, char *cptr)
{ {
char gbuf[CBUFSIZE]; char gbuf[CBUFSIZE];
uint16 file_name[3], blkbuf[BLK_SIZE]; uint16 file_name[3], blkbuf[BLK_SIZE];

4
VAX/vax780_sbi.c
View file

@ -28,6 +28,7 @@
sbi bus controller sbi bus controller
21-Mar-2011 RMS Added autoreboot capability (from Mark Pizzalato) 21-Mar-2011 RMS Added autoreboot capability (from Mark Pizzalato)
04-Feb-2011 MP Added RQB, RQC, and RQD as bootable controllers
31-May-2008 RMS Fixed machine_check calling sequence (found by Peter Schorn) 31-May-2008 RMS Fixed machine_check calling sequence (found by Peter Schorn)
03-May-2006 RMS Fixed writes to ACCS 03-May-2006 RMS Fixed writes to ACCS
28-May-2008 RMS Inlined physical memory routines 28-May-2008 RMS Inlined physical memory routines
@ -111,6 +112,9 @@ static struct boot_dev boot_tab[] = {
{ "HK", BOOT_HK, 0 }, { "HK", BOOT_HK, 0 },
{ "RL", BOOT_RL, 0 }, { "RL", BOOT_RL, 0 },
{ "RQ", BOOT_UDA, 1 << 24 }, { "RQ", BOOT_UDA, 1 << 24 },
{ "RQB", BOOT_UDA, 1 << 24 },
{ "RQC", BOOT_UDA, 1 << 24 },
{ "RQD", BOOT_UDA, 1 << 24 },
{ "TQ", BOOT_TK, 1 << 24 }, { "TQ", BOOT_TK, 1 << 24 },
{ NULL } { NULL }
}; };

5
VAX/vax780_stddev.c
View file

@ -287,6 +287,10 @@ REG clk_reg[] = {
{ DRDATA (TODR, todr_reg, 32), PV_LEFT }, { DRDATA (TODR, todr_reg, 32), PV_LEFT },
{ DRDATA (TIME, clk_unit.wait, 24), REG_NZ + PV_LEFT }, { DRDATA (TIME, clk_unit.wait, 24), REG_NZ + PV_LEFT },
{ DRDATA (TPS, clk_tps, 8), REG_HIDDEN + REG_NZ + PV_LEFT }, { DRDATA (TPS, clk_tps, 8), REG_HIDDEN + REG_NZ + PV_LEFT },
#if defined (SIM_ASYNCH_IO)
{ DRDATA (LATENCY, sim_asynch_latency, 32), PV_LEFT },
{ DRDATA (INST_LATENCY, sim_asynch_inst_latency, 32), PV_LEFT },
#endif
{ NULL } { NULL }
}; };
@ -573,6 +577,7 @@ t_stat clk_svc (UNIT *uptr)
tmr_poll = sim_rtcn_calb (clk_tps, TMR_CLK); /* calibrate clock */ tmr_poll = sim_rtcn_calb (clk_tps, TMR_CLK); /* calibrate clock */
sim_activate (&clk_unit, tmr_poll); /* reactivate unit */ sim_activate (&clk_unit, tmr_poll); /* reactivate unit */
tmxr_poll = tmr_poll * TMXR_MULT; /* set mux poll */ tmxr_poll = tmr_poll * TMXR_MULT; /* set mux poll */
AIO_SET_INTERRUPT_LATENCY(tmr_poll*clk_tps); /* set interrrupt latency */
todr_reg = todr_reg + 1; /* incr TODR */ todr_reg = todr_reg + 1; /* incr TODR */
if ((tmr_iccs & TMR_CSR_RUN) && tmr_use_100hz) /* timer on, std intvl? */ if ((tmr_iccs & TMR_CSR_RUN) && tmr_use_100hz) /* timer on, std intvl? */
tmr_incr (TMR_INC); /* do timer service */ tmr_incr (TMR_INC); /* do timer service */

2
VAX/vax_cpu.c
View file

@ -26,6 +26,7 @@
cpu VAX central processor cpu VAX central processor
23-Mar-11 RMS Revised for new idle design (from Mark Pizzolato) 23-Mar-11 RMS Revised for new idle design (from Mark Pizzolato)
05-Jan-11 MP Added Asynch I/O support
24-Apr-10 RMS Added OLDVMS idle timer option 24-Apr-10 RMS Added OLDVMS idle timer option
Fixed bug in SET CPU IDLE Fixed bug in SET CPU IDLE
21-May-08 RMS Removed inline support 21-May-08 RMS Removed inline support
@ -612,6 +613,7 @@ for ( ;; ) {
} }
fault_PC = PC; fault_PC = PC;
recqptr = 0; /* clr recovery q */ recqptr = 0; /* clr recovery q */
AIO_CHECK_EVENT;
if (sim_interval <= 0) { /* chk clock queue */ if (sim_interval <= 0) { /* chk clock queue */
temp = sim_process_event (); temp = sim_process_event ();
if (temp) if (temp)

5
VAX/vax_stddev.c
View file

@ -27,6 +27,7 @@
tto terminal output tto terminal output
clk 100Hz and TODR clock clk 100Hz and TODR clock
05-Jan-11 MP Added Asynch I/O support
17-Aug-08 RMS Resync TODR on any clock reset 17-Aug-08 RMS Resync TODR on any clock reset
18-Jun-07 RMS Added UNIT_IDLE flag to console input, clock 18-Jun-07 RMS Added UNIT_IDLE flag to console input, clock
17-Oct-06 RMS Synced keyboard poll to real-time clock for idling 17-Oct-06 RMS Synced keyboard poll to real-time clock for idling
@ -178,6 +179,10 @@ REG clk_reg[] = {
{ DRDATA (TIME, clk_unit.wait, 24), REG_NZ + PV_LEFT }, { DRDATA (TIME, clk_unit.wait, 24), REG_NZ + PV_LEFT },
{ DRDATA (POLL, tmr_poll, 24), REG_NZ + PV_LEFT + REG_HRO }, { DRDATA (POLL, tmr_poll, 24), REG_NZ + PV_LEFT + REG_HRO },
{ DRDATA (TPS, clk_tps, 8), REG_NZ + PV_LEFT }, { DRDATA (TPS, clk_tps, 8), REG_NZ + PV_LEFT },
#if defined (SIM_ASYNCH_IO)
{ DRDATA (LATENCY, sim_asynch_latency, 32), PV_LEFT },
{ DRDATA (INST_LATENCY, sim_asynch_inst_latency, 32), PV_LEFT },
#endif
{ NULL } { NULL }
}; };

33
Visual Studio Projects/0ReadMe_Projects.txt Normal file
View file

@ -0,0 +1,33 @@
This dirctory contains a set of Visual Studio 2008 build projects for the current simh code base. When used (with Visual Studio Express 2008 or Visual Studio Express 2010) it populates a directory tree under the BIN directory of the Simh distribution for temporary build files and produces resulting executables in the BIN/NT/Win32-Debug or BIN/NT/Win32-Release directories (depending on whether you target a Debug or Release build). It expects that a winpcap developer pack zip file is expanded in a directory parallel to the simh directory.
For Example, the directory structure should look like:
.../simh/simhv38-2-rc1/VAX/vax_cpu.c
.../simh/simhv38-2-rc1/scp.c
.../simh/simhv38-2-rc1/Visual Studio Projects/simh.sln
.../simh/simhv38-2-rc1/Visual Studio Projects/VAX.vcproj
.../simh/simhv38-2-rc1/BIN/Nt/Win32-Release/vax.exe
.../simh/winpcap/WpdPack/Include/pcap.h
The winpcap developer pack can be found at:
http://www.winpcap.org/devel.htm
Some features can be enabled if the pthreads API is available and contained also in a parallel place in the directory structure.
.../simh/pthreads/Pre-built.2/include/include/pthreads.h
To install pthreads API, create the directory:
.../simh/pthreads/
download the file: ftp://sourceware.org/pub/pthreads-win32/pthreads-w32-2-8-0-release.exe
to that directory and execute it. Click on the Extract button.
Once installed, When running a simulator with pthreads support enabled, you will need a copy of the DLL file (simh\pthreads\Pre-built.2\lib\pthreadVC2.dll) to exist in either the %windir%\System32 directory or your working directory while running a simh simulator. The default working directory for included project files is the "Visual Studio Projects" directory.
Only network devices are capable of using pthreads to enhance their performance. Build the desire simulator with USE_READER_THREAD defined. The relevant simulators which have network support are VAX, VAX780, PDP11 and PDP10.

295
Visual Studio Projects/ALTAIR.vcproj Normal file
View file

@ -0,0 +1,295 @@
<?xml version="1.0" encoding="Windows-1252"?>
<VisualStudioProject
ProjectType="Visual C++"
Version="9.00"
Name="Altair"
ProjectGUID="{1C602310-C406-4446-85C3-E5AE0E836120}"
RootNamespace="Altair"
Keyword="Win32Proj"
TargetFrameworkVersion="131072"
>
<Platforms>
<Platform
Name="Win32"
/>
</Platforms>
<ToolFiles>
</ToolFiles>
<Configurations>
<Configuration
Name="Debug|Win32"
OutputDirectory="..\BIN\NT\$(PlatformName)-$(ConfigurationName)"
IntermediateDirectory="..\BIN\NT\Project\simh\ALTAIR\$(PlatformName)-$(ConfigurationName)"
ConfigurationType="1"
InheritedPropertySheets="$(VCInstallDir)VCProjectDefaults\UpgradeFromVC71.vsprops"
CharacterSet="2"
>
<Tool
Name="VCPreBuildEventTool"
/>
<Tool
Name="VCCustomBuildTool"
/>
<Tool
Name="VCXMLDataGeneratorTool"
/>
<Tool
Name="VCWebServiceProxyGeneratorTool"
/>
<Tool
Name="VCMIDLTool"
/>
<Tool
Name="VCCLCompilerTool"
Optimization="0"
AdditionalIncludeDirectories="./;../"
PreprocessorDefinitions="_CRT_SECURE_NO_WARNINGS"
MinimalRebuild="true"
BasicRuntimeChecks="3"
RuntimeLibrary="1"
UsePrecompiledHeader="0"
WarningLevel="3"
Detect64BitPortabilityProblems="false"
DebugInformationFormat="4"
/>
<Tool
Name="VCManagedResourceCompilerTool"
/>
<Tool
Name="VCResourceCompilerTool"
/>
<Tool
Name="VCPreLinkEventTool"
/>
<Tool
Name="VCLinkerTool"
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322
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290
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398
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310
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468
Visual Studio Projects/PDP11.vcproj Normal file
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322
Visual Studio Projects/PDP15.vcproj Normal file
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322
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322
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Name="VCPreBuildEventTool"
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Name="VCCustomBuildTool"
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Name="VCXMLDataGeneratorTool"
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Name="VCWebServiceProxyGeneratorTool"
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Name="VCCLCompilerTool"
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294
Visual Studio Projects/SWTP.vcproj Normal file
View file

@ -0,0 +1,294 @@
<?xml version="1.0" encoding="Windows-1252"?>
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Name="SWTP"
ProjectGUID="{0ABAF350-853E-4A8F-8435-B583E29FB78C}"
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182
Visual Studio Projects/Simh.sln Normal file
View file

@ -0,0 +1,182 @@

Microsoft Visual Studio Solution File, Format Version 10.00
# Visual C++ Express 2008
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Project("{8BC9CEB8-8B4A-11D0-8D11-00A0C91BC942}") = "VAX780", "VAX780.vcproj", "{D5D873F7-D286-43E7-958A-3D83DEADBEEF}"
EndProject
Project("{8BC9CEB8-8B4A-11D0-8D11-00A0C91BC942}") = "AltairZ80", "AltairZ80.vcproj", "{BC7F37AD-7414-43C3-829D-214CD1113D67}"
EndProject
Project("{8BC9CEB8-8B4A-11D0-8D11-00A0C91BC942}") = "Altair", "ALTAIR.vcproj", "{1C602310-C406-4446-85C3-E5AE0E836120}"
EndProject
Project("{8BC9CEB8-8B4A-11D0-8D11-00A0C91BC942}") = "GRI", "GRI.vcproj", "{611E140C-8403-4FD8-AF53-CE01C8452B34}"
EndProject
Project("{8BC9CEB8-8B4A-11D0-8D11-00A0C91BC942}") = "HP2100", "HP2100.vcproj", "{7A9428F5-593C-4217-B8FE-980E249D3DB9}"
EndProject
Project("{8BC9CEB8-8B4A-11D0-8D11-00A0C91BC942}") = "H316", "H316.vcproj", "{C915B408-80D8-4925-BF7B-0469436B33BF}"
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Project("{8BC9CEB8-8B4A-11D0-8D11-00A0C91BC942}") = "ID16", "ID16.vcproj", "{D90C77B3-A3E7-40D3-BB88-18A4EF1C001D}"
EndProject
Project("{8BC9CEB8-8B4A-11D0-8D11-00A0C91BC942}") = "ID32", "ID32.vcproj", "{324EF17B-1683-48B5-824D-FACF17AEB27B}"
EndProject
Project("{8BC9CEB8-8B4A-11D0-8D11-00A0C91BC942}") = "PDP8", "PDP8.vcproj", "{5EB65E13-1E6A-46A4-B7FE-EC87F8702067}"
EndProject
Project("{8BC9CEB8-8B4A-11D0-8D11-00A0C91BC942}") = "PDP10", "PDP10.vcproj", "{A39C0AFE-BDE5-4236-B740-AC710FCA1DA2}"
EndProject
Project("{8BC9CEB8-8B4A-11D0-8D11-00A0C91BC942}") = "S3", "S3.vcproj", "{927C3BD9-BD0C-4A23-99F9-573A40236509}"
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Project("{8BC9CEB8-8B4A-11D0-8D11-00A0C91BC942}") = "SDS", "SDS.vcproj", "{750762C6-A2AF-40BA-A006-5E68002C1E87}"
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Project("{8BC9CEB8-8B4A-11D0-8D11-00A0C91BC942}") = "PDP11", "PDP11.vcproj", "{49499E1B-5019-4B98-9DC7-2E73306D5578}"
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Project("{8BC9CEB8-8B4A-11D0-8D11-00A0C91BC942}") = "PDP1", "PDP1.vcproj", "{CB017838-5DC5-4B9D-A8F7-7B36AA4A3331}"
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Project("{8BC9CEB8-8B4A-11D0-8D11-00A0C91BC942}") = "I1401", "I1401.vcproj", "{C92737AD-07CC-492F-AA76-D169CEF5BBAB}"
EndProject
Project("{8BC9CEB8-8B4A-11D0-8D11-00A0C91BC942}") = "I1620", "I1620.vcproj", "{089C9C0B-C4F7-4923-86C4-F14BF5D61821}"
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Project("{8BC9CEB8-8B4A-11D0-8D11-00A0C91BC942}") = "IBM1130", "IBM1130.vcproj", "{D593C954-5115-4D15-ABDB-01B66006FF6F}"
EndProject
Project("{8BC9CEB8-8B4A-11D0-8D11-00A0C91BC942}") = "PDP18B", "PDP18B.vcproj", "{0A3FD54C-E497-4B2D-AD32-D83EAF996D59}"
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Project("{8BC9CEB8-8B4A-11D0-8D11-00A0C91BC942}") = "PDP15", "PDP15.vcproj", "{44C07AA4-6D56-45ED-8393-18A23E76B758}"
EndProject
Project("{8BC9CEB8-8B4A-11D0-8D11-00A0C91BC942}") = "PDP9", "PDP9.vcproj", "{9D589BCA-9E10-4FFA-B43F-DDFA91C1C098}"
EndProject
Project("{8BC9CEB8-8B4A-11D0-8D11-00A0C91BC942}") = "PDP7", "PDP7.vcproj", "{0F8B9E39-56A7-45BE-A68F-04F7EB8EF8A3}"
EndProject
Project("{8BC9CEB8-8B4A-11D0-8D11-00A0C91BC942}") = "PDP4", "PDP4.vcproj", "{C51841F3-BD47-41C3-946C-20F893FB5A23}"
EndProject
Project("{8BC9CEB8-8B4A-11D0-8D11-00A0C91BC942}") = "NOVA", "NOVA.vcproj", "{9B55ACBB-C29A-40EB-98BF-D1047912389E}"
EndProject
Project("{8BC9CEB8-8B4A-11D0-8D11-00A0C91BC942}") = "ECLIPSE", "ECLIPSE.vcproj", "{FF632F3D-9F62-481D-A5C7-AD090F46143C}"
EndProject
Project("{8BC9CEB8-8B4A-11D0-8D11-00A0C91BC942}") = "lgp", "lgp.vcproj", "{927C3BD9-BD0C-4A23-99F9-5ABC40236509}"
EndProject
Project("{8BC9CEB8-8B4A-11D0-8D11-00A0C91BC942}") = "I7094", "I7094.vcproj", "{927C3BD9-BD0C-4A23-99F9-DEAD402BEEF9}"
EndProject
Project("{8BC9CEB8-8B4A-11D0-8D11-00A0C91BC942}") = "SWTP", "SWTP.vcproj", "{0ABAF350-853E-4A8F-8435-B583E29FB78C}"
EndProject
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443
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</File>
<File
RelativePath="..\PDP11\pdp11_io_lib.c"
>
</File>
<File
RelativePath="..\PDP11\pdp11_lp.c"
>
</File>
<File
RelativePath="..\PDP11\pdp11_pt.c"
>
</File>
<File
RelativePath="..\PDP11\pdp11_rl.c"
>
</File>
<File
RelativePath="..\PDP11\pdp11_rp.c"
>
</File>
<File
RelativePath="..\PDP11\pdp11_rq.c"
>
</File>
<File
RelativePath="..\PDP11\pdp11_ry.c"
>
</File>
<File
RelativePath="..\PDP11\pdp11_tq.c"
>
</File>
<File
RelativePath="..\PDP11\pdp11_ts.c"
>
</File>
<File
RelativePath="..\PDP11\pdp11_tu.c"
>
</File>
<File
RelativePath="..\PDP11\pdp11_xu.c"
>
</File>
<File
RelativePath="..\scp.c"
>
</File>
<File
RelativePath="..\sim_console.c"
>
</File>
<File
RelativePath="..\sim_disk.c"
>
</File>
<File
RelativePath="..\sim_ether.c"
>
</File>
<File
RelativePath="..\sim_fio.c"
>
</File>
<File
RelativePath="..\sim_sock.c"
>
</File>
<File
RelativePath="..\sim_tape.c"
>
</File>
<File
RelativePath="..\sim_timer.c"
>
</File>
<File
RelativePath="..\sim_tmxr.c"
>
</File>
<File
RelativePath="..\VAX\vax780_fload.c"
>
</File>
<File
RelativePath="..\VAX\vax780_mba.c"
>
</File>
<File
RelativePath="..\VAX\vax780_mem.c"
>
</File>
<File
RelativePath="..\VAX\vax780_sbi.c"
>
</File>
<File
RelativePath="..\VAX\vax780_stddev.c"
>
</File>
<File
RelativePath="..\VAX\vax780_syslist.c"
>
</File>
<File
RelativePath="..\VAX\vax780_uba.c"
>
</File>
<File
RelativePath="..\VAX\vax_cis.c"
>
</File>
<File
RelativePath="..\VAX\vax_cmode.c"
>
</File>
<File
RelativePath="..\VAX\vax_cpu.c"
>
</File>
<File
RelativePath="..\VAX\vax_cpu1.c"
>
</File>
<File
RelativePath="..\VAX\vax_fpa.c"
>
</File>
<File
RelativePath="..\VAX\vax_mmu.c"
>
</File>
<File
RelativePath="..\VAX\vax_octa.c"
>
</File>
<File
RelativePath="..\VAX\vax_sys.c"
>
</File>
<File
RelativePath="..\VAX\vax_syscm.c"
>
</File>
</Filter>
<Filter
Name="Header Files"
Filter="h;hpp;hxx;hm;inl;inc"
>
<File
RelativePath="..\dec_dz.h"
>
</File>
<File
RelativePath="..\PDP11\pdp11_io_lib.h"
>
</File>
<File
RelativePath="..\PDP11\pdp11_mscp.h"
>
</File>
<File
RelativePath="..\PDP11\pdp11_uqssp.h"
>
</File>
<File
RelativePath="..\PDP11\pdp11_xu.h"
>
</File>
<File
RelativePath="..\scp.h"
>
</File>
<File
RelativePath="..\sim_console.h"
>
</File>
<File
RelativePath="..\sim_defs.h"
>
</File>
<File
RelativePath="..\sim_disk.h"
>
</File>
<File
RelativePath="..\sim_ether.h"
>
</File>
<File
RelativePath="..\sim_fio.h"
>
</File>
<File
RelativePath="..\sim_rev.h"
>
</File>
<File
RelativePath="..\sim_sock.h"
>
</File>
<File
RelativePath="..\sim_tape.h"
>
</File>
<File
RelativePath="..\sim_timer.h"
>
</File>
<File
RelativePath="..\sim_tmxr.h"
>
</File>
<File
RelativePath="..\VAX\vax780_defs.h"
>
</File>
<File
RelativePath="..\VAX\vax_defs.h"
>
</File>
<File
RelativePath="..\VAX\vaxmod_defs.h"
>
</File>
</Filter>
<Filter
Name="Resource Files"
Filter="rc;ico;cur;bmp;dlg;rc2;rct;bin;rgs;gif;jpg;jpeg;jpe"
>
</Filter>
</Files>
<Globals>
</Globals>
</VisualStudioProject>

290
Visual Studio Projects/lgp.vcproj Normal file
View file

@ -0,0 +1,290 @@
<?xml version="1.0" encoding="Windows-1252"?>
<VisualStudioProject
ProjectType="Visual C++"
Version="9.00"
Name="lgp"
ProjectGUID="{927C3BD9-BD0C-4A23-99F9-5ABC40236509}"
RootNamespace="lgp"
Keyword="Win32Proj"
TargetFrameworkVersion="131072"
>
<Platforms>
<Platform
Name="Win32"
/>
</Platforms>
<ToolFiles>
</ToolFiles>
<Configurations>
<Configuration
Name="Debug|Win32"
OutputDirectory="..\BIN\NT\$(PlatformName)-$(ConfigurationName)"
IntermediateDirectory="..\BIN\NT\Project\simh\lgp\$(PlatformName)-$(ConfigurationName)"
ConfigurationType="1"
InheritedPropertySheets="$(VCInstallDir)VCProjectDefaults\UpgradeFromVC71.vsprops"
CharacterSet="2"
>
<Tool
Name="VCPreBuildEventTool"
/>
<Tool
Name="VCCustomBuildTool"
/>
<Tool
Name="VCXMLDataGeneratorTool"
/>
<Tool
Name="VCWebServiceProxyGeneratorTool"
/>
<Tool
Name="VCMIDLTool"
/>
<Tool
Name="VCCLCompilerTool"
Optimization="0"
AdditionalIncludeDirectories="./;../"
PreprocessorDefinitions="_CRT_SECURE_NO_WARNINGS"
MinimalRebuild="true"
BasicRuntimeChecks="3"
RuntimeLibrary="1"
UsePrecompiledHeader="0"
WarningLevel="3"
Detect64BitPortabilityProblems="false"
DebugInformationFormat="4"
/>
<Tool
Name="VCManagedResourceCompilerTool"
/>
<Tool
Name="VCResourceCompilerTool"
/>
<Tool
Name="VCPreLinkEventTool"
/>
<Tool
Name="VCLinkerTool"
AdditionalDependencies="wsock32.lib winmm.lib"
OutputFile="$(OutDir)\lgp.exe"
LinkIncremental="2"
GenerateDebugInformation="true"
ProgramDatabaseFile="$(OutDir)\lgp.pdb"
SubSystem="1"
RandomizedBaseAddress="1"
DataExecutionPrevention="0"
TargetMachine="1"
/>
<Tool
Name="VCALinkTool"
/>
<Tool
Name="VCManifestTool"
/>
<Tool
Name="VCXDCMakeTool"
/>
<Tool
Name="VCBscMakeTool"
/>
<Tool
Name="VCFxCopTool"
/>
<Tool
Name="VCAppVerifierTool"
/>
<Tool
Name="VCPostBuildEventTool"
/>
</Configuration>
<Configuration
Name="Release|Win32"
OutputDirectory="..\BIN\NT\$(PlatformName)-$(ConfigurationName)"
IntermediateDirectory="..\BIN\NT\Project\simh\lgp\$(PlatformName)-$(ConfigurationName)"
ConfigurationType="1"
InheritedPropertySheets="$(VCInstallDir)VCProjectDefaults\UpgradeFromVC71.vsprops"
CharacterSet="2"
>
<Tool
Name="VCPreBuildEventTool"
/>
<Tool
Name="VCCustomBuildTool"
/>
<Tool
Name="VCXMLDataGeneratorTool"
/>
<Tool
Name="VCWebServiceProxyGeneratorTool"
/>
<Tool
Name="VCMIDLTool"
/>
<Tool
Name="VCCLCompilerTool"
Optimization="2"
InlineFunctionExpansion="1"
OmitFramePointers="true"
AdditionalIncludeDirectories="./;../"
PreprocessorDefinitions="_CRT_SECURE_NO_WARNINGS"
StringPooling="true"
RuntimeLibrary="0"
EnableFunctionLevelLinking="true"
UsePrecompiledHeader="0"
WarningLevel="3"
Detect64BitPortabilityProblems="false"
DebugInformationFormat="3"
/>
<Tool
Name="VCManagedResourceCompilerTool"
/>
<Tool
Name="VCResourceCompilerTool"
/>
<Tool
Name="VCPreLinkEventTool"
/>
<Tool
Name="VCLinkerTool"
AdditionalDependencies="wsock32.lib winmm.lib"
OutputFile="$(OutDir)\lgp.exe"
LinkIncremental="1"
GenerateDebugInformation="true"
SubSystem="1"
OptimizeReferences="2"
EnableCOMDATFolding="2"
RandomizedBaseAddress="1"
DataExecutionPrevention="0"
TargetMachine="1"
/>
<Tool
Name="VCALinkTool"
/>
<Tool
Name="VCManifestTool"
/>
<Tool
Name="VCXDCMakeTool"
/>
<Tool
Name="VCBscMakeTool"
/>
<Tool
Name="VCFxCopTool"
/>
<Tool
Name="VCAppVerifierTool"
/>
<Tool
Name="VCPostBuildEventTool"
/>
</Configuration>
</Configurations>
<References>
</References>
<Files>
<Filter
Name="Source Files"
Filter="cpp;c;cxx;def;odl;idl;hpj;bat;asm"
>
<File
RelativePath="..\LGP\lgp_cpu.c"
>
</File>
<File
RelativePath="..\LGP\lgp_stddev.c"
>
</File>
<File
RelativePath="..\LGP\lgp_sys.c"
>
</File>
<File
RelativePath="..\scp.c"
>
</File>
<File
RelativePath="..\sim_console.c"
>
</File>
<File
RelativePath="..\sim_ether.c"
>
</File>
<File
RelativePath="..\sim_fio.c"
>
</File>
<File
RelativePath="..\sim_sock.c"
>
</File>
<File
RelativePath="..\sim_tape.c"
>
</File>
<File
RelativePath="..\sim_timer.c"
>
</File>
<File
RelativePath="..\sim_tmxr.c"
>
</File>
</Filter>
<Filter
Name="Header Files"
Filter="h;hpp;hxx;hm;inl;inc"
>
<File
RelativePath="..\LGP\lgp_defs.h"
>
</File>
<File
RelativePath="..\scp.h"
>
</File>
<File
RelativePath="..\sim_console.h"
>
</File>
<File
RelativePath="..\sim_defs.h"
>
</File>
<File
RelativePath="..\sim_ether.h"
>
</File>
<File
RelativePath="..\sim_fio.h"
>
</File>
<File
RelativePath="..\sim_rev.h"
>
</File>
<File
RelativePath="..\sim_sock.h"
>
</File>
<File
RelativePath="..\sim_tape.h"
>
</File>
<File
RelativePath="..\sim_timer.h"
>
</File>
<File
RelativePath="..\sim_tmxr.h"
>
</File>
</Filter>
<Filter
Name="Resource Files"
Filter="rc;ico;cur;bmp;dlg;rc2;rct;bin;rgs;gif;jpg;jpeg;jpe"
>
</Filter>
</Files>
<Globals>
</Globals>
</VisualStudioProject>

292
descrip.mms
View file

@ -6,9 +6,9 @@
# #
# This MMS/MMK build script is used to compile the various simulators in # This MMS/MMK build script is used to compile the various simulators in
# the SIMH package for OpenVMS using DEC C v6.0-001(AXP), v6.5-001(AXP), # the SIMH package for OpenVMS using DEC C v6.0-001(AXP), v6.5-001(AXP),
# HP C V7.2-001 (IA64) and v6.4-005(VAX). # HP C V7.3-009-48GBT (AXP), HP C V7.2-001 (IA64) and v6.4-005(VAX).
# #
# Notes: On VAX, the PDP-10 and Eclipse simulators will not be built # Notes: On VAX, the PDP-10and IBM 7094 simulators will not be built
# due to the fact that INT64 is required for that simulator. # due to the fact that INT64 is required for that simulator.
# #
# This build script will accept the following build options. # This build script will accept the following build options.
@ -23,6 +23,7 @@
# HP2100 Just Build The Hewlett-Packard HP-2100. # HP2100 Just Build The Hewlett-Packard HP-2100.
# I1401 Just Build The IBM 1401. # I1401 Just Build The IBM 1401.
# I1620 Just Build The IBM 1620. # I1620 Just Build The IBM 1620.
# I7094 Just Build The IBM 7094.
# IBM1130 Just Build The IBM 1130. # IBM1130 Just Build The IBM 1130.
# ID16 Just Build The Interdata 16-bit CPU. # ID16 Just Build The Interdata 16-bit CPU.
# ID32 Just Build The Interdata 32-bit CPU. # ID32 Just Build The Interdata 32-bit CPU.
@ -37,6 +38,7 @@
# PDP15 Just Build The DEC PDP-15. # PDP15 Just Build The DEC PDP-15.
# S3 Just Build The IBM System 3. # S3 Just Build The IBM System 3.
# SDS Just Build The SDS 940. # SDS Just Build The SDS 940.
# SWTP Just Build The SWTP.
# VAX Just Build The DEC VAX. # VAX Just Build The DEC VAX.
# VAX780 Just Build The DEC VAX780. # VAX780 Just Build The DEC VAX780.
# CLEAN Will Clean Files Back To Base Kit. # CLEAN Will Clean Files Back To Base Kit.
@ -46,6 +48,11 @@
# #
# MMK/MACRO=(DEBUG=1) # MMK/MACRO=(DEBUG=1)
# #
# To build on older Alpha VMS platforms, SIM_ASYNCH_IO must be disabled.
# use..
#
# MMK/MACRO=(NOASYNCH=1)
#
# This will produce an executable named {Simulator}-{I64|VAX|AXP}-DBG.EXE # This will produce an executable named {Simulator}-{I64|VAX|AXP}-DBG.EXE
# #
@ -62,19 +69,23 @@ CC_OPTIMIZE = /NOOPTIMIZE
.IFDEF MMSALPHA .IFDEF MMSALPHA
ALPHA_OR_IA64 = 1 ALPHA_OR_IA64 = 1
CC_FLAGS = /PREF=ALL CC_FLAGS = /PREF=ALL
ARCH = AXP-DBG .IFDEF NOASYNCH
ARCH = AXP-NOASYNCH-DBG
CC_DEFS = "_LARGEFILE" CC_DEFS = "_LARGEFILE"
.ELSE
ARCH = AXP-DBG
CC_DEFS = "_LARGEFILE","SIM_ASYNCH_IO=1"
.ENDIF
.ENDIF .ENDIF
.IFDEF MMSIA64 .IFDEF MMSIA64
ALPHA_OR_IA64 = 1 ALPHA_OR_IA64 = 1
CC_FLAGS = /PREF=ALL CC_FLAGS = /PREF=ALL
ARCH = I64-DBG ARCH = I64-DBG
CC_DEFS = "_LARGEFILE" CC_DEFS = "_LARGEFILE","SIM_ASYNCH_IO=1"
.ENDIF .ENDIF
.IFDEF MMSVAX .IFDEF MMSVAX
ALPHA_OR_IA64 = 0
CC_FLAGS = $(CC_FLAGS) CC_FLAGS = $(CC_FLAGS)
ARCH = VAX-DBG ARCH = VAX-DBG
CC_DEFS = "__VAX" CC_DEFS = "__VAX"
@ -87,8 +98,13 @@ LINK_DEBUG = /NODEBUG/NOTRACEBACK
ALPHA_OR_IA64 = 1 ALPHA_OR_IA64 = 1
CC_OPTIMIZE = /OPT=(LEV=5)/ARCH=HOST CC_OPTIMIZE = /OPT=(LEV=5)/ARCH=HOST
CC_FLAGS = /PREF=ALL CC_FLAGS = /PREF=ALL
ARCH = AXP .IFDEF NOASYNCH
ARCH = AXP-NOASYNCH
CC_DEFS = "_LARGEFILE" CC_DEFS = "_LARGEFILE"
.ELSE
ARCH = AXP
CC_DEFS = "_LARGEFILE","SIM_ASYNCH_IO=1"
.ENDIF
LINK_SECTION_BINDING = /SECTION_BINDING LINK_SECTION_BINDING = /SECTION_BINDING
.ENDIF .ENDIF
@ -97,11 +113,10 @@ ALPHA_OR_IA64 = 1
CC_OPTIMIZE = /OPT=(LEV=5) CC_OPTIMIZE = /OPT=(LEV=5)
CC_FLAGS = /PREF=ALL CC_FLAGS = /PREF=ALL
ARCH = I64 ARCH = I64
CC_DEFS = "_LARGEFILE" CC_DEFS = "_LARGEFILE","SIM_ASYNCH_IO=1"
.ENDIF .ENDIF
.IFDEF MMSVAX .IFDEF MMSVAX
ALPHA_OR_IA64 = 0
CC_OPTIMIZE = /OPTIMIZE CC_OPTIMIZE = /OPTIMIZE
CC_FLAGS = $(CC_FLAGS) CC_FLAGS = $(CC_FLAGS)
ARCH = VAX ARCH = VAX
@ -120,15 +135,18 @@ CC = CC/DECC$(OUR_CC_FLAGS)
# Define The platform specific Build Directory Where The Objects Will Go. # Define The platform specific Build Directory Where The Objects Will Go.
# #
BIN_DIR = SYS$DISK:[.BIN] BIN_DIR = SYS$DISK:[.BIN]
LIB_DIR = SYS$DISK:[.LIB] LIB_DIR = SYS$DISK:[.BIN.VMS.LIB]
BLD_DIR = SYS$DISK:[.LIB.BLD-$(ARCH)] BLD_DIR = SYS$DISK:[.BIN.VMS.LIB.BLD-$(ARCH)]
# Check To Make Sure We Have SYS$DISK:[.BIN] & SYS$DISK:[.LIB] Directory. # Check To Make Sure We Have SYS$DISK:[.BIN] & SYS$DISK:[.LIB] Directory.
# #
.FIRST .FIRST
@ IF ((F$GETSYI("ARCH_NAME").EQS."Alpha").AND.(F$GETSYI("VERSION").LES."V8.0").AND.("$(NOASYNCH)".EQS."")) THEN WRITE SYS$OUTPUT "*** WARNING **** Build should be invoked with /MACRO=NOASYNCH=1 on this platform"
@ IF ((F$GETSYI("ARCH_NAME").EQS."Alpha").AND.(F$GETSYI("VERSION").LES."V8.0").AND.("$(NOASYNCH)".EQS."")) THEN EXIT %x10000000
@ IF (F$SEARCH("SYS$DISK:[]BIN.DIR").EQS."") THEN CREATE/DIRECTORY $(BIN_DIR) @ IF (F$SEARCH("SYS$DISK:[]BIN.DIR").EQS."") THEN CREATE/DIRECTORY $(BIN_DIR)
@ IF (F$SEARCH("SYS$DISK:[]LIB.DIR").EQS."") THEN CREATE/DIRECTORY $(LIB_DIR) @ IF (F$SEARCH("SYS$DISK:[.BIN]VMS.DIR").EQS."") THEN CREATE/DIRECTORY $(LIB_DIR)
@ IF (F$SEARCH("SYS$DISK:[.LIB]BLD-$(ARCH).DIR").EQS."") THEN CREATE/DIRECTORY $(BLD_DIR) @ IF (F$SEARCH("SYS$DISK:[.BIN.VMS]LIB.DIR").EQS."") THEN CREATE/DIRECTORY $(LIB_DIR)
@ IF (F$SEARCH("SYS$DISK:[.BIN.VMS.LIB]BLD-$(ARCH).DIR").EQS."") THEN CREATE/DIRECTORY $(BLD_DIR)
@ IF (F$SEARCH("$(BLD_DIR)*.*").NES."") THEN DELETE/NOLOG/NOCONFIRM $(BLD_DIR)*.*;* @ IF (F$SEARCH("$(BLD_DIR)*.*").NES."") THEN DELETE/NOLOG/NOCONFIRM $(BLD_DIR)*.*;*
@ IF "".NES."''CC'" THEN DELETE/SYMBOL/GLOBAL CC @ IF "".NES."''CC'" THEN DELETE/SYMBOL/GLOBAL CC
@ -139,7 +157,11 @@ SIMH_LIB = $(LIB_DIR)SIMH-$(ARCH).OLB
SIMH_SOURCE = $(SIMH_DIR)SIM_CONSOLE.C,$(SIMH_DIR)SIM_SOCK.C,\ SIMH_SOURCE = $(SIMH_DIR)SIM_CONSOLE.C,$(SIMH_DIR)SIM_SOCK.C,\
$(SIMH_DIR)SIM_TMXR.C,$(SIMH_DIR)SIM_ETHER.C,\ $(SIMH_DIR)SIM_TMXR.C,$(SIMH_DIR)SIM_ETHER.C,\
$(SIMH_DIR)SIM_TAPE.C,$(SIMH_DIR)SIM_FIO.C,\ $(SIMH_DIR)SIM_TAPE.C,$(SIMH_DIR)SIM_FIO.C,\
$(SIMH_DIR)SIM_TIMER.C $(SIMH_DIR)SIM_TIMER.C,$(SIMH_DIR)SIM_DISK.C
SIMH_MAIN = SCP.C
.IFDEF ALPHA_OR_IA64
SIMH_LIB64 = $(LIB_DIR)SIMH64-$(ARCH).OLB
.ENDIF
# VMS PCAP File Definitions. # VMS PCAP File Definitions.
# #
@ -227,7 +249,7 @@ ECLIPSE_SOURCE = $(NOVA_DIR)ECLIPSE_CPU.C,$(NOVA_DIR)ECLIPSE_TT.C,\
$(NOVA_DIR)NOVA_PT.C,$(NOVA_DIR)NOVA_CLK.C,\ $(NOVA_DIR)NOVA_PT.C,$(NOVA_DIR)NOVA_CLK.C,\
$(NOVA_DIR)NOVA_TT1.C,$(NOVA_DIR)NOVA_QTY.C $(NOVA_DIR)NOVA_TT1.C,$(NOVA_DIR)NOVA_QTY.C
ECLIPSE_OPTIONS = /INCL=($(SIMH_DIR),$(NOVA_DIR))\ ECLIPSE_OPTIONS = /INCL=($(SIMH_DIR),$(NOVA_DIR))\
/DEF=($(CC_DEFS),"USE_INT64=1","ECLIPSE=1") /DEF=($(CC_DEFS),"ECLIPSE=1")
# #
# GRI Corporation GRI-909 Simulator Definitions. # GRI Corporation GRI-909 Simulator Definitions.
@ -275,7 +297,7 @@ HP2100_SOURCE1 = $(HP2100_DIR)HP2100_STDDEV.C,$(HP2100_DIR)HP2100_DP.C,\
HP2100_LIB2 = $(LIB_DIR)HP2100L2-$(ARCH).OLB HP2100_LIB2 = $(LIB_DIR)HP2100L2-$(ARCH).OLB
HP2100_SOURCE2 = $(HP2100_DIR)HP2100_FP1.C,$(HP2100_DIR)HP2100_BACI.C,\ HP2100_SOURCE2 = $(HP2100_DIR)HP2100_FP1.C,$(HP2100_DIR)HP2100_BACI.C,\
$(HP2100_DIR)HP2100_MPX.C,$(HP2100_DIR)HP2100_PIF.C $(HP2100_DIR)HP2100_MPX.C,$(HP2100_DIR)HP2100_PIF.C
.IF ALPHA_OR_IA64 .IFDEF ALPHA_OR_IA64
HP2100_OPTIONS = /INCL=($(SIMH_DIR),$(HP2100_DIR))\ HP2100_OPTIONS = /INCL=($(SIMH_DIR),$(HP2100_DIR))\
/DEF=($(CC_DEFS),"HAVE_INT64=1") /DEF=($(CC_DEFS),"HAVE_INT64=1")
.ELSE .ELSE
@ -453,6 +475,15 @@ SDS_SOURCE = $(SDS_DIR)SDS_CPU.C,$(SDS_DIR)SDS_DRM.C,$(SDS_DIR)SDS_DSK.C,\
$(SDS_DIR)SDS_SYS.C $(SDS_DIR)SDS_SYS.C
SDS_OPTIONS = /INCL=($(SIMH_DIR),$(SDS_DIR))/DEF=($(CC_DEFS)) SDS_OPTIONS = /INCL=($(SIMH_DIR),$(SDS_DIR))/DEF=($(CC_DEFS))
#
# SWTP 6800
#
SWTP_DIR = SYS$DISK:[.SWTP]
SWTP_LIB = $(LIB_DIR)SWTP-$(ARCH).OLB
SWTP_SOURCE = $(SWTP_DIR)SWTP_CPU.C,$(SWTP_DIR)SWTP_DSK.C,$(SWTP_DIR)SWTP_SIO.C,\
$(SWTP_DIR)SWTP_SYS.C
SWTP_OPTIONS = /INCL=($(SIMH_DIR),$(SWTP_DIR))/DEF=($(CC_DEFS))
# #
# Digital Equipment VAX Simulator Definitions. # Digital Equipment VAX Simulator Definitions.
# #
@ -470,8 +501,15 @@ VAX_SOURCE = $(VAX_DIR)VAX_CIS.C,$(VAX_DIR)VAX_CMODE.C,\
$(PDP11_DIR)PDP11_LP.C,$(PDP11_DIR)PDP11_TQ.C,\ $(PDP11_DIR)PDP11_LP.C,$(PDP11_DIR)PDP11_TQ.C,\
$(PDP11_DIR)PDP11_XQ.C,$(PDP11_DIR)PDP11_CR.C,\ $(PDP11_DIR)PDP11_XQ.C,$(PDP11_DIR)PDP11_CR.C,\
$(PDP11_DIR)PDP11_RY.C,$(PDP11_DIR)PDP11_VH.C $(PDP11_DIR)PDP11_RY.C,$(PDP11_DIR)PDP11_VH.C
.IFDEF ALPHA_OR_IA64
VAX_OPTIONS = /INCL=($(SIMH_DIR),$(VAX_DIR),$(PDP11_DIR)$(PCAP_INC))\
/DEF=($(CC_DEFS),"VM_VAX=1","USE_ADDR64=1","USE_INT64=1"$(PCAP_DEFS))
VAX_SIMH_LIB = $(SIMH_LIB64)
.ELSE
VAX_OPTIONS = /INCL=($(SIMH_DIR),$(VAX_DIR),$(PDP11_DIR)$(PCAP_INC))\ VAX_OPTIONS = /INCL=($(SIMH_DIR),$(VAX_DIR),$(PDP11_DIR)$(PCAP_INC))\
/DEF=($(CC_DEFS),"VM_VAX=1"$(PCAP_DEFS)) /DEF=($(CC_DEFS),"VM_VAX=1"$(PCAP_DEFS))
VAX_SIMH_LIB = $(SIMH_LIB)
.ENDIF
# Digital Equipment VAX780 Simulator Definitions. # Digital Equipment VAX780 Simulator Definitions.
# #
@ -493,8 +531,15 @@ VAX780_SOURCE2 = $(PDP11_DIR)PDP11_RL.C,$(PDP11_DIR)PDP11_RQ.C,\
$(PDP11_DIR)PDP11_CR.C,$(PDP11_DIR)PDP11_RP.C,\ $(PDP11_DIR)PDP11_CR.C,$(PDP11_DIR)PDP11_RP.C,\
$(PDP11_DIR)PDP11_TU.C,$(PDP11_DIR)PDP11_HK.C,\ $(PDP11_DIR)PDP11_TU.C,$(PDP11_DIR)PDP11_HK.C,\
$(PDP11_DIR)PDP11_IO_LIB.C $(PDP11_DIR)PDP11_IO_LIB.C
.IFDEF ALPHA_OR_IA64
VAX780_OPTIONS = /INCL=($(SIMH_DIR),$(VAX780_DIR),$(PDP11_DIR)$(PCAP_INC))\
/DEF=($(CC_DEFS),"VM_VAX=1","USE_ADDR64=1","USE_INT64=1"$(PCAP_DEFS),"VAX_780=1")
VAX780_SIMH_LIB = $(SIMH_LIB64)
.ELSE
VAX780_OPTIONS = /INCL=($(SIMH_DIR),$(VAX780_DIR),$(PDP11_DIR)$(PCAP_INC))\ VAX780_OPTIONS = /INCL=($(SIMH_DIR),$(VAX780_DIR),$(PDP11_DIR)$(PCAP_INC))\
/DEF=($(CC_DEFS),"VM_VAX=1"$(PCAP_DEFS),"VAX_780=1") /DEF=($(CC_DEFS),"VM_VAX=1"$(PCAP_DEFS),"VAX_780=1")
VAX780_SIMH_LIB = $(SIMH_LIB)
.ENDIF
# IBM 7094 Simulator Definitions. # IBM 7094 Simulator Definitions.
# #
@ -510,17 +555,17 @@ I7094_OPTIONS = /INCL=($(SIMH_DIR),$(I7094_DIR))/DEF=($(CC_DEFS))
# If we're not a VAX, Build Everything # If we're not a VAX, Build Everything
# #
.IF ALPHA_OR_IA64 .IFDEF ALPHA_OR_IA64
ALL : ALTAIR ALTAIRZ80 ECLIPSE GRI LGP H316 HP2100 I1401 I1620 IBM1130 ID16 \ ALL : ALTAIR ALTAIRZ80 ECLIPSE GRI LGP H316 HP2100 I1401 I1620 IBM1130 ID16 \
ID32 NOVA PDP1 PDP4 PDP7 PDP8 PDP9 PDP10 PDP11 PDP15 S3 VAX VAX780 SDS \ ID32 NOVA PDP1 PDP4 PDP7 PDP8 PDP9 PDP10 PDP11 PDP15 S3 VAX VAX780 SDS \
I7094 I7094 SWTP
$! No further actions necessary $! No further actions necessary
.ELSE .ELSE
# #
# Else We Are On VAX And Build Everything EXCEPT the 64b simulators # Else We Are On VAX And Build Everything EXCEPT the 64b simulators
# #
ALL : ALTAIR ALTAIRZ80 GRI H316 HP2100 I1401 I1620 IBM1130 ID16 ID32 \ ALL : ALTAIR ALTAIRZ80 ECLIPSE GRI H316 HP2100 I1401 I1620 IBM1130 ID16 ID32 \
NOVA PDP1 PDP4 PDP7 PDP8 PDP9 PDP11 PDP15 S3 VAX VAX780 SDS NOVA PDP1 PDP4 PDP7 PDP8 PDP9 PDP11 PDP15 S3 VAX VAX780 SDS SWTP
$! No further actions necessary $! No further actions necessary
.ENDIF .ENDIF
@ -553,6 +598,19 @@ $(SIMH_LIB) : $(SIMH_SOURCE)
$ LIBRARY/REPLACE $(MMS$TARGET) $(BLD_DIR)*.OBJ $ LIBRARY/REPLACE $(MMS$TARGET) $(BLD_DIR)*.OBJ
$ DELETE/NOLOG/NOCONFIRM $(BLD_DIR)*.OBJ;* $ DELETE/NOLOG/NOCONFIRM $(BLD_DIR)*.OBJ;*
.IFDEF ALPHA_OR_IA64
$(SIMH_LIB64) : $(SIMH_SOURCE)
$!
$! Building The $(SIMH_LIB64) Library.
$!
$ $(CC)/DEF=($(CC_DEFS)$(PCAP_DEFS),"USE_ADDR64=1","USE_INT64=1")$(PCAP_SIMH_INC) -
/OBJ=$(BLD_DIR) $(MMS$CHANGED_LIST)
$ IF (F$SEARCH("$(MMS$TARGET)").EQS."") THEN -
LIBRARY/CREATE $(MMS$TARGET)
$ LIBRARY/REPLACE $(MMS$TARGET) $(BLD_DIR)*.OBJ
$ DELETE/NOLOG/NOCONFIRM $(BLD_DIR)*.OBJ;*
.ENDIF
$(ALTAIR_LIB) : $(ALTAIR_SOURCE) $(ALTAIR_LIB) : $(ALTAIR_SOURCE)
$! $!
$! Building The $(ALTAIR_LIB) Library. $! Building The $(ALTAIR_LIB) Library.
@ -586,10 +644,6 @@ $(ALTAIRZ80_LIB2) : $(ALTAIRZ80_SOURCE2)
$ LIBRARY/REPLACE $(MMS$TARGET) $(BLD_DIR)*.OBJ $ LIBRARY/REPLACE $(MMS$TARGET) $(BLD_DIR)*.OBJ
$ DELETE/NOLOG/NOCONFIRM $(BLD_DIR)*.OBJ;* $ DELETE/NOLOG/NOCONFIRM $(BLD_DIR)*.OBJ;*
#
# If Not On VAX, Build The Eclipse Library.
#
.IF ALPHA_OR_IA64
$(ECLIPSE_LIB) : $(ECLIPSE_SOURCE) $(ECLIPSE_LIB) : $(ECLIPSE_SOURCE)
$! $!
$! Building The $(ECLIPSE_LIB) Library. $! Building The $(ECLIPSE_LIB) Library.
@ -600,16 +654,6 @@ $(ECLIPSE_LIB) : $(ECLIPSE_SOURCE)
LIBRARY/CREATE $(MMS$TARGET) LIBRARY/CREATE $(MMS$TARGET)
$ LIBRARY/REPLACE $(MMS$TARGET) $(BLD_DIR)*.OBJ $ LIBRARY/REPLACE $(MMS$TARGET) $(BLD_DIR)*.OBJ
$ DELETE/NOLOG/NOCONFIRM $(BLD_DIR)*.OBJ;* $ DELETE/NOLOG/NOCONFIRM $(BLD_DIR)*.OBJ;*
.ELSE
#
# We Are On VAX And Due To The Use of INT64 We Can't Build It.
#
$(ECLIPSE_LIB) :
$!
$! Due To The Use Of INT64 We Can't Build The
$! $(LIB_DIR)ECLIPSE-$(ARCH).OLB Library On VAX.
$!
.ENDIF
$(GRI_LIB) : $(GRI_SOURCE) $(GRI_LIB) : $(GRI_SOURCE)
$! $!
@ -790,7 +834,7 @@ $(PDP9_LIB) : $(PDP18B_SOURCE)
# #
# If Not On VAX, Build The PDP-10 Library. # If Not On VAX, Build The PDP-10 Library.
# #
.IF ALPHA_OR_IA64 .IFDEF ALPHA_OR_IA64
$(PDP10_LIB) : $(PDP10_SOURCE) $(PDP10_LIB) : $(PDP10_SOURCE)
$! $!
$! Building The $(PDP10_LIB) Library. $! Building The $(PDP10_LIB) Library.
@ -807,7 +851,7 @@ $(PDP10_LIB) : $(PDP10_SOURCE)
# #
$(PDP10_LIB) : $(PDP10_LIB) :
$! Due To The Use Of INT64 We Can't Build The $! Due To The Use Of INT64 We Can't Build The
$! $(LIB_DIR)PDP10-$(ARCH).OLB Library On VAX. $! $(MMS$TARGET) Library On VAX.
.ENDIF .ENDIF
$(PDP11_LIB1) : $(PDP11_SOURCE1) $(PDP11_LIB1) : $(PDP11_SOURCE1)
@ -865,6 +909,17 @@ $(SDS_LIB) : $(SDS_SOURCE)
$ LIBRARY/REPLACE $(MMS$TARGET) $(BLD_DIR)*.OBJ $ LIBRARY/REPLACE $(MMS$TARGET) $(BLD_DIR)*.OBJ
$ DELETE/NOLOG/NOCONFIRM $(BLD_DIR)*.OBJ;* $ DELETE/NOLOG/NOCONFIRM $(BLD_DIR)*.OBJ;*
$(SWTP_LIB) : $(SWTP_SOURCE)
$!
$! Building The $(SWTP_LIB) Library.
$!
$ $(CC)$(SWTP_OPTIONS) -
/OBJ=$(BLD_DIR) $(MMS$CHANGED_LIST)
$ IF (F$SEARCH("$(MMS$TARGET)").EQS."") THEN -
LIBRARY/CREATE $(MMS$TARGET)
$ LIBRARY/REPLACE $(MMS$TARGET) $(BLD_DIR)*.OBJ
$ DELETE/NOLOG/NOCONFIRM $(BLD_DIR)*.OBJ;*
$(VAX_LIB) : $(VAX_SOURCE) $(VAX_LIB) : $(VAX_SOURCE)
$! $!
$! Building The $(VAX_LIB) Library. $! Building The $(VAX_LIB) Library.
@ -913,7 +968,7 @@ $(PCAP_LIB) : $(PCAP_SOURCE)
# #
# If Not On VAX, Build The IBM 7094 Library. # If Not On VAX, Build The IBM 7094 Library.
# #
.IF ALPHA_OR_IA64 .IFDEF ALPHA_OR_IA64
$(I7094_LIB) : $(I7094_SOURCE) $(I7094_LIB) : $(I7094_SOURCE)
$! $!
$! Building The $(I7094_LIB) Library. $! Building The $(I7094_LIB) Library.
@ -930,13 +985,16 @@ $(I7094_LIB) : $(I7094_SOURCE)
# #
$(I7094_LIB) : $(I7094_LIB) :
$! Due To The Use Of INT64 We Can't Build The $! Due To The Use Of INT64 We Can't Build The
$! $(LIB_DIR)I7094-$(ARCH).OLB Library On VAX. $! $(MMS$TARGET) Library On VAX.
.ENDIF .ENDIF
# #
# Individual Simulator Builds. # Individual Simulator Builds.
# #
ALTAIR : $(SIMH_LIB) $(ALTAIR_LIB) ALTAIR : $(BIN_DIR)ALTAIR-$(ARCH).EXE
$! ALTAIR done
$(BIN_DIR)ALTAIR-$(ARCH).EXE : $(SIMH_MAIN) $(SIMH_LIB) $(ALTAIR_LIB)
$! $!
$! Building The $(BIN_DIR)ALTAIR-$(ARCH).EXE Simulator. $! Building The $(BIN_DIR)ALTAIR-$(ARCH).EXE Simulator.
$! $!
@ -945,7 +1003,10 @@ ALTAIR : $(SIMH_LIB) $(ALTAIR_LIB)
$(BLD_DIR)SCP.OBJ,$(ALTAIR_LIB)/LIBRARY,$(SIMH_LIB)/LIBRARY $(BLD_DIR)SCP.OBJ,$(ALTAIR_LIB)/LIBRARY,$(SIMH_LIB)/LIBRARY
$ DELETE/NOLOG/NOCONFIRM $(BLD_DIR)*.OBJ;* $ DELETE/NOLOG/NOCONFIRM $(BLD_DIR)*.OBJ;*
ALTAIRZ80 : $(SIMH_LIB) $(ALTAIRZ80_LIB1) $(ALTAIRZ80_LIB2) ALTAIRZ80 : $(BIN_DIR)ALTAIRZ80-$(ARCH).EXE
$! ALTAIRZ80 done
$(BIN_DIR)ALTAIRZ80-$(ARCH).EXE : $(SIMH_MAIN) $(SIMH_LIB) $(ALTAIRZ80_LIB1) $(ALTAIRZ80_LIB2)
$! $!
$! Building The $(BIN_DIR)ALTAIRZ80-$(ARCH).EXE Simulator. $! Building The $(BIN_DIR)ALTAIRZ80-$(ARCH).EXE Simulator.
$! $!
@ -955,11 +1016,10 @@ ALTAIRZ80 : $(SIMH_LIB) $(ALTAIRZ80_LIB1) $(ALTAIRZ80_LIB2)
$(ALTAIRZ80_LIB2)/LIBRARY,$(SIMH_LIB)/LIBRARY $(ALTAIRZ80_LIB2)/LIBRARY,$(SIMH_LIB)/LIBRARY
$ DELETE/NOLOG/NOCONFIRM $(BLD_DIR)*.OBJ;* $ DELETE/NOLOG/NOCONFIRM $(BLD_DIR)*.OBJ;*
# ECLIPSE : $(BIN_DIR)ECLIPSE-$(ARCH).EXE
# If Not On VAX, Build The PDP-10 Simulator. $! ECLIPSE done
#
.IF ALPHA_OR_IA64 $(BIN_DIR)ECLIPSE-$(ARCH).EXE : $(SIMH_MAIN) $(SIMH_LIB) $(ECLIPSE_LIB)
ECLIPSE : $(SIMH_LIB) $(ECLIPSE_LIB)
$! $!
$! Building The $(BIN_DIR)ECLIPSE-$(ARCH).EXE Simulator. $! Building The $(BIN_DIR)ECLIPSE-$(ARCH).EXE Simulator.
$! $!
@ -967,17 +1027,11 @@ ECLIPSE : $(SIMH_LIB) $(ECLIPSE_LIB)
$ LINK $(LINK_DEBUG)/EXE=$(BIN_DIR)ECLIPSE-$(ARCH).EXE - $ LINK $(LINK_DEBUG)/EXE=$(BIN_DIR)ECLIPSE-$(ARCH).EXE -
$(BLD_DIR)SCP.OBJ,$(ECLIPSE_LIB)/LIBRARY,$(SIMH_LIB)/LIBRARY $(BLD_DIR)SCP.OBJ,$(ECLIPSE_LIB)/LIBRARY,$(SIMH_LIB)/LIBRARY
$ DELETE/NOLOG/NOCONFIRM $(BLD_DIR)*.OBJ;* $ DELETE/NOLOG/NOCONFIRM $(BLD_DIR)*.OBJ;*
.ELSE
#
# Else We Are On VAX And Tell The User We Can't Build On VAX
# Due To The Use Of INT64.
#
ECLIPSE :
$! Sorry, Can't Build $(BIN_DIR)ECLIPSE-$(ARCH).EXE Simulator
$! Because It Requires The Use Of INT64.
.ENDIF
GRI : $(SIMH_LIB) $(GRI_LIB) GRI : $(BIN_DIR)GRI-$(ARCH).EXE
$! GRI done
$(BIN_DIR)GRI-$(ARCH).EXE : $(SIMH_MAIN) $(SIMH_LIB) $(GRI_LIB)
$! $!
$! Building The $(BIN_DIR)GRI-$(ARCH).EXE Simulator. $! Building The $(BIN_DIR)GRI-$(ARCH).EXE Simulator.
$! $!
@ -986,7 +1040,10 @@ GRI : $(SIMH_LIB) $(GRI_LIB)
$(BLD_DIR)SCP.OBJ,$(GRI_LIB)/LIBRARY,$(SIMH_LIB)/LIBRARY $(BLD_DIR)SCP.OBJ,$(GRI_LIB)/LIBRARY,$(SIMH_LIB)/LIBRARY
$ DELETE/NOLOG/NOCONFIRM $(BLD_DIR)*.OBJ;* $ DELETE/NOLOG/NOCONFIRM $(BLD_DIR)*.OBJ;*
LGP : $(SIMH_LIB) $(LGP_LIB) LGP : $(BIN_DIR)LGP-$(ARCH).EXE
$! LGP done
$(BIN_DIR)LGP-$(ARCH).EXE : $(SIMH_MAIN) $(SIMH_LIB) $(LGP_LIB)
$! $!
$! Building The $(BIN_DIR)LGP-$(ARCH).EXE Simulator. $! Building The $(BIN_DIR)LGP-$(ARCH).EXE Simulator.
$! $!
@ -995,7 +1052,10 @@ LGP : $(SIMH_LIB) $(LGP_LIB)
$(BLD_DIR)SCP.OBJ,$(LGP_LIB)/LIBRARY,$(SIMH_LIB)/LIBRARY $(BLD_DIR)SCP.OBJ,$(LGP_LIB)/LIBRARY,$(SIMH_LIB)/LIBRARY
$ DELETE/NOLOG/NOCONFIRM $(BLD_DIR)*.OBJ;* $ DELETE/NOLOG/NOCONFIRM $(BLD_DIR)*.OBJ;*
H316 : $(SIMH_LIB) $(H316_LIB) H316 : $(BIN_DIR)H316-$(ARCH).EXE
$! H316 done
$(BIN_DIR)H316-$(ARCH).EXE : $(SIMH_MAIN) $(SIMH_LIB) $(H316_LIB)
$! $!
$! Building The $(BIN_DIR)H316-$(ARCH).EXE Simulator. $! Building The $(BIN_DIR)H316-$(ARCH).EXE Simulator.
$! $!
@ -1004,7 +1064,10 @@ H316 : $(SIMH_LIB) $(H316_LIB)
$(BLD_DIR)SCP.OBJ,$(H316_LIB)/LIBRARY,$(SIMH_LIB)/LIBRARY $(BLD_DIR)SCP.OBJ,$(H316_LIB)/LIBRARY,$(SIMH_LIB)/LIBRARY
$ DELETE/NOLOG/NOCONFIRM $(BLD_DIR)*.OBJ;* $ DELETE/NOLOG/NOCONFIRM $(BLD_DIR)*.OBJ;*
HP2100 : $(SIMH_LIB) $(HP2100_LIB1) $(HP2100_LIB2) HP2100 : $(BIN_DIR)HP2100-$(ARCH).EXE
$! HP2100 done
$(BIN_DIR)HP2100-$(ARCH).EXE : $(SIMH_MAIN) $(SIMH_LIB) $(HP2100_LIB1) $(HP2100_LIB2)
$! $!
$! Building The $(BIN_DIR)HP2100-$(ARCH).EXE Simulator. $! Building The $(BIN_DIR)HP2100-$(ARCH).EXE Simulator.
$! $!
@ -1014,7 +1077,10 @@ HP2100 : $(SIMH_LIB) $(HP2100_LIB1) $(HP2100_LIB2)
$(HP2100_LIB2)/LIBRARY,$(SIMH_LIB)/LIBRARY $(HP2100_LIB2)/LIBRARY,$(SIMH_LIB)/LIBRARY
$ DELETE/NOLOG/NOCONFIRM $(BLD_DIR)*.OBJ;* $ DELETE/NOLOG/NOCONFIRM $(BLD_DIR)*.OBJ;*
I1401 : $(SIMH_LIB) $(I1401_LIB) I1401 : $(BIN_DIR)I1401-$(ARCH).EXE
$! I1401 done
$(BIN_DIR)I1401-$(ARCH).EXE : $(SIMH_MAIN) $(SIMH_LIB) $(I1401_LIB)
$! $!
$! Building The $(BIN_DIR)I1401-$(ARCH).EXE Simulator. $! Building The $(BIN_DIR)I1401-$(ARCH).EXE Simulator.
$! $!
@ -1023,7 +1089,10 @@ I1401 : $(SIMH_LIB) $(I1401_LIB)
$(BLD_DIR)SCP.OBJ,$(I1401_LIB)/LIBRARY,$(SIMH_LIB)/LIBRARY $(BLD_DIR)SCP.OBJ,$(I1401_LIB)/LIBRARY,$(SIMH_LIB)/LIBRARY
$ DELETE/NOLOG/NOCONFIRM $(BLD_DIR)*.OBJ;* $ DELETE/NOLOG/NOCONFIRM $(BLD_DIR)*.OBJ;*
I1620 : $(SIMH_LIB) $(I1620_LIB) I1620 : $(BIN_DIR)I1620-$(ARCH).EXE
$! I1620 done
$(BIN_DIR)I1620-$(ARCH).EXE : $(SIMH_MAIN) $(SIMH_LIB) $(I1620_LIB)
$! $!
$! Building The $(BIN_DIR)I1620-$(ARCH).EXE Simulator. $! Building The $(BIN_DIR)I1620-$(ARCH).EXE Simulator.
$! $!
@ -1032,7 +1101,10 @@ I1620 : $(SIMH_LIB) $(I1620_LIB)
$(BLD_DIR)SCP.OBJ,$(I1620_LIB)/LIBRARY,$(SIMH_LIB)/LIBRARY $(BLD_DIR)SCP.OBJ,$(I1620_LIB)/LIBRARY,$(SIMH_LIB)/LIBRARY
$ DELETE/NOLOG/NOCONFIRM $(BLD_DIR)*.OBJ;* $ DELETE/NOLOG/NOCONFIRM $(BLD_DIR)*.OBJ;*
IBM1130 : $(SIMH_LIB) $(IBM1130_LIB) IBM1130 : $(BIN_DIR)IBM1130-$(ARCH).EXE
$! IBM1130 done
$(BIN_DIR)IBM1130-$(ARCH).EXE : $(SIMH_MAIN) $(SIMH_LIB) $(IBM1130_LIB)
$! $!
$! Building The $(BIN_DIR)IBM1130-$(ARCH).EXE Simulator. $! Building The $(BIN_DIR)IBM1130-$(ARCH).EXE Simulator.
$! $!
@ -1041,7 +1113,10 @@ IBM1130 : $(SIMH_LIB) $(IBM1130_LIB)
$(BLD_DIR)SCP.OBJ,$(IBM1130_LIB)/LIBRARY,$(SIMH_LIB)/LIBRARY $(BLD_DIR)SCP.OBJ,$(IBM1130_LIB)/LIBRARY,$(SIMH_LIB)/LIBRARY
$ DELETE/NOLOG/NOCONFIRM $(BLD_DIR)*.OBJ;* $ DELETE/NOLOG/NOCONFIRM $(BLD_DIR)*.OBJ;*
ID16 : $(SIMH_LIB) $(ID16_LIB) ID16 : $(BIN_DIR)ID16-$(ARCH).EXE
$! ID16 done
$(BIN_DIR)ID16-$(ARCH).EXE : $(SIMH_MAIN) $(SIMH_LIB) $(ID16_LIB)
$! $!
$! Building The $(BIN_DIR)ID16-$(ARCH).EXE Simulator. $! Building The $(BIN_DIR)ID16-$(ARCH).EXE Simulator.
$! $!
@ -1050,7 +1125,10 @@ ID16 : $(SIMH_LIB) $(ID16_LIB)
$(BLD_DIR)SCP.OBJ,$(ID16_LIB)/LIBRARY,$(SIMH_LIB)/LIBRARY $(BLD_DIR)SCP.OBJ,$(ID16_LIB)/LIBRARY,$(SIMH_LIB)/LIBRARY
$ DELETE/NOLOG/NOCONFIRM $(BLD_DIR)*.OBJ;* $ DELETE/NOLOG/NOCONFIRM $(BLD_DIR)*.OBJ;*
ID32 : $(SIMH_LIB) $(ID32_LIB) ID32 : $(BIN_DIR)ID32-$(ARCH).EXE
$! ID32 done
$(BIN_DIR)ID32-$(ARCH).EXE : $(SIMH_MAIN) $(SIMH_LIB) $(ID32_LIB)
$! $!
$! Building The $(BIN_DIR)ID32-$(ARCH).EXE Simulator. $! Building The $(BIN_DIR)ID32-$(ARCH).EXE Simulator.
$! $!
@ -1059,7 +1137,10 @@ ID32 : $(SIMH_LIB) $(ID32_LIB)
$(BLD_DIR)SCP.OBJ,$(ID32_LIB)/LIBRARY,$(SIMH_LIB)/LIBRARY $(BLD_DIR)SCP.OBJ,$(ID32_LIB)/LIBRARY,$(SIMH_LIB)/LIBRARY
$ DELETE/NOLOG/NOCONFIRM $(BLD_DIR)*.OBJ;* $ DELETE/NOLOG/NOCONFIRM $(BLD_DIR)*.OBJ;*
NOVA : $(SIMH_LIB) $(NOVA_LIB) NOVA : $(BIN_DIR)NOVA-$(ARCH).EXE
$! NOVA done
$(BIN_DIR)NOVA-$(ARCH).EXE : $(SIMH_MAIN) $(SIMH_LIB) $(NOVA_LIB)
$! $!
$! Building The $(BIN_DIR)NOVA-$(ARCH).EXE Simulator. $! Building The $(BIN_DIR)NOVA-$(ARCH).EXE Simulator.
$! $!
@ -1068,7 +1149,10 @@ NOVA : $(SIMH_LIB) $(NOVA_LIB)
$(BLD_DIR)SCP.OBJ,$(NOVA_LIB)/LIBRARY,$(SIMH_LIB)/LIBRARY $(BLD_DIR)SCP.OBJ,$(NOVA_LIB)/LIBRARY,$(SIMH_LIB)/LIBRARY
$ DELETE/NOLOG/NOCONFIRM $(BLD_DIR)*.OBJ;* $ DELETE/NOLOG/NOCONFIRM $(BLD_DIR)*.OBJ;*
PDP1 : $(SIMH_LIB) $(PDP1_LIB) PDP1 : $(BIN_DIR)PDP1-$(ARCH).EXE
$! PDP1 done
$(BIN_DIR)PDP1-$(ARCH).EXE : $(SIMH_MAIN) $(SIMH_LIB) $(PDP1_LIB)
$! $!
$! Building The $(BIN_DIR)PDP1-$(ARCH).EXE Simulator. $! Building The $(BIN_DIR)PDP1-$(ARCH).EXE Simulator.
$! $!
@ -1077,7 +1161,10 @@ PDP1 : $(SIMH_LIB) $(PDP1_LIB)
$(BLD_DIR)SCP.OBJ,$(PDP1_LIB)/LIBRARY,$(SIMH_LIB)/LIBRARY $(BLD_DIR)SCP.OBJ,$(PDP1_LIB)/LIBRARY,$(SIMH_LIB)/LIBRARY
$ DELETE/NOLOG/NOCONFIRM $(BLD_DIR)*.OBJ;* $ DELETE/NOLOG/NOCONFIRM $(BLD_DIR)*.OBJ;*
PDP4 : $(SIMH_LIB) $(PDP4_LIB) PDP4 : $(BIN_DIR)PDP4-$(ARCH).EXE
$! PDP4 done
$(BIN_DIR)PDP4-$(ARCH).EXE : $(SIMH_MAIN) $(SIMH_LIB) $(PDP4_LIB)
$! $!
$! Building The $(BIN_DIR)PDP4-$(ARCH).EXE Simulator. $! Building The $(BIN_DIR)PDP4-$(ARCH).EXE Simulator.
$! $!
@ -1086,7 +1173,10 @@ PDP4 : $(SIMH_LIB) $(PDP4_LIB)
$(BLD_DIR)SCP.OBJ,$(PDP4_LIB)/LIBRARY,$(SIMH_LIB)/LIBRARY $(BLD_DIR)SCP.OBJ,$(PDP4_LIB)/LIBRARY,$(SIMH_LIB)/LIBRARY
$ DELETE/NOLOG/NOCONFIRM $(BLD_DIR)*.OBJ;* $ DELETE/NOLOG/NOCONFIRM $(BLD_DIR)*.OBJ;*
PDP7 : $(SIMH_LIB) $(PDP7_LIB) PDP7 : $(BIN_DIR)PDP7-$(ARCH).EXE
$! PDP7 done
$(BIN_DIR)PDP7-$(ARCH).EXE : $(SIMH_MAIN) $(SIMH_LIB) $(PDP7_LIB)
$! $!
$! Building The $(BIN_DIR)PDP7-$(ARCH).EXE Simulator. $! Building The $(BIN_DIR)PDP7-$(ARCH).EXE Simulator.
$! $!
@ -1095,7 +1185,10 @@ PDP7 : $(SIMH_LIB) $(PDP7_LIB)
$(BLD_DIR)SCP.OBJ,$(PDP7_LIB)/LIBRARY,$(SIMH_LIB)/LIBRARY $(BLD_DIR)SCP.OBJ,$(PDP7_LIB)/LIBRARY,$(SIMH_LIB)/LIBRARY
$ DELETE/NOLOG/NOCONFIRM $(BLD_DIR)*.OBJ;* $ DELETE/NOLOG/NOCONFIRM $(BLD_DIR)*.OBJ;*
PDP8 : $(SIMH_LIB) $(PDP8_LIB) PDP8 : $(BIN_DIR)PDP8-$(ARCH).EXE
$! PDP8 done
$(BIN_DIR)PDP8-$(ARCH).EXE : $(SIMH_MAIN) $(SIMH_LIB) $(PDP8_LIB)
$! $!
$! Building The $(BIN_DIR)PDP8-$(ARCH).EXE Simulator. $! Building The $(BIN_DIR)PDP8-$(ARCH).EXE Simulator.
$! $!
@ -1104,7 +1197,10 @@ PDP8 : $(SIMH_LIB) $(PDP8_LIB)
$(BLD_DIR)SCP.OBJ,$(PDP8_LIB)/LIBRARY,$(SIMH_LIB)/LIBRARY $(BLD_DIR)SCP.OBJ,$(PDP8_LIB)/LIBRARY,$(SIMH_LIB)/LIBRARY
$ DELETE/NOLOG/NOCONFIRM $(BLD_DIR)*.OBJ;* $ DELETE/NOLOG/NOCONFIRM $(BLD_DIR)*.OBJ;*
PDP9 : $(SIMH_LIB) $(PDP9_LIB) PDP9 : $(BIN_DIR)PDP9-$(ARCH).EXE
$! PDP9 done
$(BIN_DIR)PDP9-$(ARCH).EXE : $(SIMH_MAIN) $(SIMH_LIB) $(PDP9_LIB)
$! $!
$! Building The $(BIN_DIR)PDP9-$(ARCH).EXE Simulator. $! Building The $(BIN_DIR)PDP9-$(ARCH).EXE Simulator.
$! $!
@ -1116,8 +1212,11 @@ PDP9 : $(SIMH_LIB) $(PDP9_LIB)
# #
# If Not On VAX, Build The PDP-10 Simulator. # If Not On VAX, Build The PDP-10 Simulator.
# #
.IF ALPHA_OR_IA64 .IFDEF ALPHA_OR_IA64
PDP10 : $(SIMH_LIB) $(PCAP_LIBD) $(PDP10_LIB) $(PCAP_EXECLET) PDP10 : $(BIN_DIR)PDP10-$(ARCH).EXE
$! PDP10 done
$(BIN_DIR)PDP10-$(ARCH).EXE : $(SIMH_MAIN) $(SIMH_LIB) $(PCAP_LIBD) $(PDP10_LIB) $(PCAP_EXECLET)
$! $!
$! Building The $(BIN_DIR)PDP10-$(ARCH).EXE Simulator. $! Building The $(BIN_DIR)PDP10-$(ARCH).EXE Simulator.
$! $!
@ -1135,7 +1234,10 @@ PDP10 :
$! Because It Requires The Use Of INT64. $! Because It Requires The Use Of INT64.
.ENDIF .ENDIF
PDP11 : $(SIMH_LIB) $(PCAP_LIBD) $(PDP11_LIB1) $(PDP11_LIB2) $(PCAP_EXECLET) PDP11 : $(BIN_DIR)PDP11-$(ARCH).EXE
$! PDP11 done
$(BIN_DIR)PDP11-$(ARCH).EXE : $(SIMH_MAIN) $(SIMH_LIB) $(PCAP_LIBD) $(PDP11_LIB1) $(PDP11_LIB2) $(PCAP_EXECLET)
$! $!
$! Building The $(BIN_DIR)PDP11-$(ARCH).EXE Simulator. $! Building The $(BIN_DIR)PDP11-$(ARCH).EXE Simulator.
$! $!
@ -1144,7 +1246,10 @@ PDP11 : $(SIMH_LIB) $(PCAP_LIBD) $(PDP11_LIB1) $(PDP11_LIB2) $(PCAP_EXECLET)
$(BLD_DIR)SCP.OBJ,$(PDP11_LIB1)/LIBRARY,$(PDP11_LIB2)/LIBRARY,$(SIMH_LIB)/LIBRARY$(PCAP_LIBR) $(BLD_DIR)SCP.OBJ,$(PDP11_LIB1)/LIBRARY,$(PDP11_LIB2)/LIBRARY,$(SIMH_LIB)/LIBRARY$(PCAP_LIBR)
$ DELETE/NOLOG/NOCONFIRM $(BLD_DIR)*.OBJ;* $ DELETE/NOLOG/NOCONFIRM $(BLD_DIR)*.OBJ;*
PDP15 : $(SIMH_LIB) $(PDP15_LIB) PDP15 : $(BIN_DIR)PDP15-$(ARCH).EXE
$! PDP15 done
$(BIN_DIR)PDP15-$(ARCH).EXE : $(SIMH_MAIN) $(SIMH_LIB) $(PDP15_LIB)
$! $!
$! Building The $(BIN_DIR)PDP15-$(ARCH).EXE Simulator. $! Building The $(BIN_DIR)PDP15-$(ARCH).EXE Simulator.
$! $!
@ -1153,7 +1258,10 @@ PDP15 : $(SIMH_LIB) $(PDP15_LIB)
$(BLD_DIR)SCP.OBJ,$(PDP15_LIB)/LIBRARY,$(SIMH_LIB)/LIBRARY $(BLD_DIR)SCP.OBJ,$(PDP15_LIB)/LIBRARY,$(SIMH_LIB)/LIBRARY
$ DELETE/NOLOG/NOCONFIRM $(BLD_DIR)*.OBJ;* $ DELETE/NOLOG/NOCONFIRM $(BLD_DIR)*.OBJ;*
S3 : $(SIMH_LIB) $(S3_LIB) S3 : $(BIN_DIR)S3-$(ARCH).EXE
$! S3 done
$(BIN_DIR)S3-$(ARCH).EXE : $(SIMH_MAIN) $(SIMH_LIB) $(S3_LIB)
$! $!
$! Building The $(BIN_DIR)S3-$(ARCH).EXE Simulator. $! Building The $(BIN_DIR)S3-$(ARCH).EXE Simulator.
$! $!
@ -1162,7 +1270,10 @@ S3 : $(SIMH_LIB) $(S3_LIB)
$(BLD_DIR)SCP.OBJ,$(S3_LIB)/LIBRARY,$(SIMH_LIB)/LIBRARY $(BLD_DIR)SCP.OBJ,$(S3_LIB)/LIBRARY,$(SIMH_LIB)/LIBRARY
$ DELETE/NOLOG/NOCONFIRM $(BLD_DIR)*.OBJ;* $ DELETE/NOLOG/NOCONFIRM $(BLD_DIR)*.OBJ;*
SDS : $(SIMH_LIB) $(SDS_LIB) SDS : $(BIN_DIR)SDS-$(ARCH).EXE
$! SDS done
$(BIN_DIR)SDS-$(ARCH).EXE : $(SIMH_MAIN) $(SIMH_LIB) $(SDS_LIB)
$! $!
$! Building The $(BIN_DIR)SDS-$(ARCH).EXE Simulator. $! Building The $(BIN_DIR)SDS-$(ARCH).EXE Simulator.
$! $!
@ -1171,7 +1282,22 @@ SDS : $(SIMH_LIB) $(SDS_LIB)
$(BLD_DIR)SCP.OBJ,$(SDS_LIB)/LIBRARY,$(SIMH_LIB)/LIBRARY $(BLD_DIR)SCP.OBJ,$(SDS_LIB)/LIBRARY,$(SIMH_LIB)/LIBRARY
$ DELETE/NOLOG/NOCONFIRM $(BLD_DIR)*.OBJ;* $ DELETE/NOLOG/NOCONFIRM $(BLD_DIR)*.OBJ;*
VAX : $(SIMH_LIB) $(PCAP_LIBD) $(VAX_LIB) $(PCAP_EXECLET) SWTP : $(BIN_DIR)SWTP-$(ARCH).EXE
$! SWTP done
$(BIN_DIR)SWTP-$(ARCH).EXE : $(SIMH_MAIN) $(SIMH_LIB) $(SWTP_LIB)
$!
$! Building The $(BIN_DIR)SWTP-$(ARCH).EXE Simulator.
$!
$ $(CC)$(SWTP_OPTIONS)/OBJ=$(BLD_DIR) SCP.C
$ LINK $(LINK_DEBUG)/EXE=$(BIN_DIR)SWTP-$(ARCH).EXE -
$(BLD_DIR)SCP.OBJ,$(SWTP_LIB)/LIBRARY,$(SIMH_LIB)/LIBRARY
$ DELETE/NOLOG/NOCONFIRM $(BLD_DIR)*.OBJ;*
VAX : $(BIN_DIR)VAX-$(ARCH).EXE
$! VAX done
$(BIN_DIR)VAX-$(ARCH).EXE : $(SIMH_MAIN) $(VAX_SIMH_LIB) $(PCAP_LIBD) $(VAX_LIB) $(PCAP_EXECLET)
$! $!
$! Building The $(BIN_DIR)VAX-$(ARCH).EXE Simulator. $! Building The $(BIN_DIR)VAX-$(ARCH).EXE Simulator.
$! $!
@ -1179,10 +1305,13 @@ VAX : $(SIMH_LIB) $(PCAP_LIBD) $(VAX_LIB) $(PCAP_EXECLET)
$ LINK $(LINK_DEBUG)$(LINK_SECTION_BINDING)- $ LINK $(LINK_DEBUG)$(LINK_SECTION_BINDING)-
/EXE=$(BIN_DIR)VAX-$(ARCH).EXE - /EXE=$(BIN_DIR)VAX-$(ARCH).EXE -
$(BLD_DIR)SCP.OBJ,$(VAX_LIB)/LIBRARY,- $(BLD_DIR)SCP.OBJ,$(VAX_LIB)/LIBRARY,-
$(SIMH_LIB)/LIBRARY$(PCAP_LIBR) $(VAX_SIMH_LIB)/LIBRARY$(PCAP_LIBR)
$ DELETE/NOLOG/NOCONFIRM $(BLD_DIR)*.OBJ;* $ DELETE/NOLOG/NOCONFIRM $(BLD_DIR)*.OBJ;*
VAX780 : $(SIMH_LIB) $(PCAP_LIBD) $(VAX780_LIB1) $(VAX780_LIB2) $(PCAP_EXECLET) VAX780 : $(BIN_DIR)VAX780-$(ARCH).EXE
$! VAX780 done
$(BIN_DIR)VAX780-$(ARCH).EXE : $(SIMH_MAIN) $(VAX780_SIMH_LIB) $(PCAP_LIBD) $(VAX780_LIB1) $(VAX780_LIB2) $(PCAP_EXECLET)
$! $!
$! Building The $(BIN_DIR)VAX780-$(ARCH).EXE Simulator. $! Building The $(BIN_DIR)VAX780-$(ARCH).EXE Simulator.
$! $!
@ -1191,14 +1320,17 @@ VAX780 : $(SIMH_LIB) $(PCAP_LIBD) $(VAX780_LIB1) $(VAX780_LIB2) $(PCAP_EXECLET)
/EXE=$(BIN_DIR)VAX780-$(ARCH).EXE - /EXE=$(BIN_DIR)VAX780-$(ARCH).EXE -
$(BLD_DIR)SCP.OBJ,- $(BLD_DIR)SCP.OBJ,-
$(VAX780_LIB1)/LIBRARY,$(VAX780_LIB2)/LIBRARY,- $(VAX780_LIB1)/LIBRARY,$(VAX780_LIB2)/LIBRARY,-
$(SIMH_LIB)/LIBRARY$(PCAP_LIBR) $(VAX780_SIMH_LIB)/LIBRARY$(PCAP_LIBR)
$ DELETE/NOLOG/NOCONFIRM $(BLD_DIR)*.OBJ;* $ DELETE/NOLOG/NOCONFIRM $(BLD_DIR)*.OBJ;*
# #
# If Not On VAX, Build The IBM 7094 Simulator. # If Not On VAX, Build The IBM 7094 Simulator.
# #
.IF ALPHA_OR_IA64 .IFDEF ALPHA_OR_IA64
I7094 : $(SIMH_LIB) $(I7094_LIB) I7094 : $(BIN_DIR)I7094-$(ARCH).EXE
$! I7094 done
$(BIN_DIR)I7094-$(ARCH).EXE : $(SIMH_MAIN) $(SIMH_LIB) $(I7094_LIB)
$! $!
$! Building The $(BIN_DIR)I7094-$(ARCH).EXE Simulator. $! Building The $(BIN_DIR)I7094-$(ARCH).EXE Simulator.
$! $!

128
makefile
View file

@ -1,62 +1,117 @@
# #
# CC Command # This GMU make makefile has been tested on:
# Linux (x86 & Sparc)
# OS X
# Solaris (x86 & Sparc)
# OpenBSD
# NetBSD
# FreeBSD
# Windows (MinGW & cygwin)
#
#
# CC Command (and platform available options). (Poor man's autoconf)
# #
ifeq ($(WIN32),) ifeq ($(WIN32),)
#Unix Environments #*nix Environments (&& cygwin)
ifneq (,$(findstring solaris,$(OSTYPE))) ifeq (SunOS,$(shell uname))
OS_CCDEFS = -lm -lsocket -lnsl -lrt -lpthread -D_GNU_SOURCE TEST = /bin/test
else else
ifneq (,$(findstring darwin,$(OSTYPE))) TEST = test
endif
ifeq (Darwin,$(shell uname))
LIBEXT = dylib
else
LIBEXT = a
endif
OS_CCDEFS = -D_GNU_SOURCE OS_CCDEFS = -D_GNU_SOURCE
else ifeq (libm,$(shell if $(TEST) -e /usr/lib/libm.$(LIBEXT); then echo libm; fi))
ifeq (librt,$(shell if test -e /usr/lib/librt.a; then echo librt; fi)) OS_LDFLAGS += -lm
OS_CCDEFS = -lrt -lm -D_GNU_SOURCE
else
OS_CCDEFS = -lm -D_GNU_SOURCE
endif endif
ifeq (SunOS,$(shell uname))
OS_CCDEFS += -I/opt/sfw/include
OS_LDFLAGS += -lsocket -lnsl -lrt -lm -lpthread -L/opt/sfw/lib -R/opt/sfw/lib
endif endif
ifeq (cygwin,$(findstring cygwin,$(OSTYPE)))
OS_CCDEFS += -O2
endif endif
ifeq (readline,$(shell if test -e /usr/lib/libreadline.a; then echo readline; fi)) ifeq (librt,$(shell if $(TEST) -e /usr/lib/librt.$(LIBEXT); then echo librt; fi))
OS_LDFLAGS += -lrt
endif
ifeq (libpthread,$(shell if $(TEST) -e /usr/lib/libpthread.$(LIBEXT); then echo libpthread; fi))
OS_CCDEFS += -DSIM_ASYNCH_IO -DUSE_READER_THREAD
OS_LDFLAGS += -lpthread
endif
ifeq (readline,$(shell if $(TEST) -e /usr/lib/libreadline.$(LIBEXT) -o -e /opt/sfw/lib/libreadline.a; then echo readline; fi))
# Use Locally installed and available readline support # Use Locally installed and available readline support
ifeq (ncurses,$(shell if test -e /usr/lib/libncurses.a; then echo ncurses; fi)) ifeq (ncurses,$(shell if $(TEST) -e /usr/lib/libncurses.$(LIBEXT) -o -e /opt/sfw/lib/libncurses.a; then echo ncurses; fi))
READLINE_CCDEFS = -DHAVE_READLINE -lreadline -lncurses OS_CCDEFS += -DHAVE_READLINE
OS_LDFLAGS += -lreadline -lncurses
else else
READLINE_CCDEFS = -DHAVE_READLINE -lreadline OS_CCDEFS += -DHAVE_READLINE
OS_LDFLAGS += -lreadline
endif endif
endif endif
ifeq (pcap,$(shell if test -e /usr/lib/libpcap.a; then echo pcap; fi)) ifeq (pcap,$(shell if $(TEST) -e /usr/include/pcap.h -o -e /opt/sfw/include/pcap.h; then echo pcap; fi))
# Use Locally installed and available pcap support # Use Locally installed and available pcap support
NETWORK_CCDEFS = -DUSE_NETWORK -lpcap NETWORK_CCDEFS = -DUSE_NETWORK
NETWORK_LDFLAGS = -lpcap
endif endif
ifeq (tuntap,$(shell if test -e /usr/include/linux/if_tun.h; then echo tuntap; fi)) ifeq (tuntap,$(shell if $(TEST) -e /usr/include/linux/if_tun.h; then echo tuntap; fi))
# Provide support for Tap networking on Linux # Provide support for Tap networking on Linux
NETWORK_TAP_CCDEFS = -DUSE_TAP_NETWORK NETWORK_TAP_CCDEFS = -DUSE_TAP_NETWORK
endif endif
ifeq (bsdtuntap,$(shell if test -e /usr/include/net/if_tun.h; then echo bsdtuntap; fi)) ifeq (bsdtuntap,$(shell if $(TEST) -e /usr/include/net/if_tun.h; then echo bsdtuntap; fi))
# Provide support for Tap networking # Provide support for Tap networking
NETWORK_TAP_CCDEFS = -DUSE_TAP_NETWORK -DUSE_BSDTUNTAP NETWORK_TAP_CCDEFS = -DUSE_TAP_NETWORK -DUSE_BSDTUNTAP
endif endif
CC = gcc -std=c99 -U__STRICT_ANSI__ -g $(OS_CCDEFS) -I . $(READLINE_CCDEFS) $(NETWORK_CCDEFS) $(NETWORK_TAP_CCDEFS) ifneq (binexists,$(shell if $(TEST) -e BIN; then echo binexists; fi))
MKDIRBIN = if $(TEST) ! -e BIN; then mkdir BIN; fi
endif
ifneq ($(USE_NETWORK),) ifneq ($(USE_NETWORK),)
# Assume built from tcpdump.org sources with default install target # Assume built from tcpdump.org sources with default install target
NETWORK_OPT = -DUSE_NETWORK -isystem /usr/local/include /usr/local/lib/libpcap.a NETWORK_OPT = -DUSE_NETWORK -isystem /usr/local/include /usr/local/lib/libpcap.a
endif endif
else else
#Win32 Environments #Win32 Environments (via MinGW32)
LDFLAGS = -lm -lwsock32 -lwinmm GCC_Path := $(dir $(shell where gcc.exe))
CC = gcc -std=c99 -U__STRICT_ANSI__ -O2 -I. ifeq (pthreads,$(shell if exist ..\pthreads\Pre-built.2\include\pthread.h echo pthreads))
PTHREADS_CCDEFS = -DSIM_ASYNCH_IO -DUSE_READER_THREAD -I../pthreads/Pre-built.2/include
PTHREADS_LDFLAGS = -lpthreadVC2 -L..\pthreads\Pre-built.2\lib
NETWORK_OPT = -DUSE_SHARED
ifeq (pthreads,$(shell if exist $(dir $(GCC_Path))..\include\pthread.h echo pthreads))
PTHREADS_CCDEFS = -DSIM_ASYNCH_IO -DUSE_READER_THREAD
PTHREADS_LDFLAGS = -lpthreads
endif
endif
ifeq (pcap,$(shell if exist ..\winpcap\Wpdpack\include\pcap.h echo pcap))
PCAP_CCDEFS = -I../winpcap/Wpdpack/include -DUSE_SHARED
NETWORK_LDFLAGS =
else
ifeq (pcap,$(shell if exist $(dir $(GCC_Path))..\include\pcap.h echo pcap))
PCAP_CCDEFS = -DUSE_SHARED
NETWORK_LDFLAGS =
endif
endif
OS_CCDEFS = -fms-extensions -O2 $(PTHREADS_CCDEFS) $(PCAP_CCDEFS)
OS_LDFLAGS = -lm -lwsock32 -lwinmm $(PTHREADS_LDFLAGS)
EXE = .exe EXE = .exe
ifneq (binexists,$(shell if exist BIN echo binexists))
MKDIRBIN = if not exist BIN mkdir BIN
endif
ifneq ($(USE_NETWORK),) ifneq ($(USE_NETWORK),)
NETWORK_OPT = -DUSE_SHARED NETWORK_OPT = -DUSE_SHARED
endif endif
endif endif
CC = gcc -std=c99 -U__STRICT_ANSI__ -g -I . $(NETWORK_CCDEFS) $(NETWORK_TAP_CCDEFS) $(OS_CCDEFS)
LDFLAGS = $(OS_LDFLAGS) $(NETWORK_LDFLAGS)
# #
# Common Libraries # Common Libraries
# #
BIN = BIN/ BIN = BIN/
SIM = scp.c sim_console.c sim_fio.c sim_timer.c sim_sock.c \ SIM = scp.c sim_console.c sim_fio.c sim_timer.c sim_sock.c \
sim_tmxr.c sim_ether.c sim_tape.c sim_tmxr.c sim_ether.c sim_tape.c sim_disk.c
# #
@ -304,134 +359,161 @@ endif
pdp1 : ${BIN}pdp1${EXE} pdp1 : ${BIN}pdp1${EXE}
${BIN}pdp1${EXE} : ${PDP1} ${SIM} ${BIN}pdp1${EXE} : ${PDP1} ${SIM}
${MKDIRBIN}
${CC} ${PDP1} ${SIM} ${PDP1_OPT} -o $@ ${LDFLAGS} ${CC} ${PDP1} ${SIM} ${PDP1_OPT} -o $@ ${LDFLAGS}
pdp4 : ${BIN}pdp4${EXE} pdp4 : ${BIN}pdp4${EXE}
${BIN}pdp4${EXE} : ${PDP18B} ${SIM} ${BIN}pdp4${EXE} : ${PDP18B} ${SIM}
${MKDIRBIN}
${CC} ${PDP18B} ${SIM} ${PDP4_OPT} -o $@ ${LDFLAGS} ${CC} ${PDP18B} ${SIM} ${PDP4_OPT} -o $@ ${LDFLAGS}
pdp7 : ${BIN}pdp7${EXE} pdp7 : ${BIN}pdp7${EXE}
${BIN}pdp7${EXE} : ${PDP18B} ${SIM} ${BIN}pdp7${EXE} : ${PDP18B} ${SIM}
${MKDIRBIN}
${CC} ${PDP18B} ${SIM} ${PDP7_OPT} -o $@ ${LDFLAGS} ${CC} ${PDP18B} ${SIM} ${PDP7_OPT} -o $@ ${LDFLAGS}
pdp8 : ${BIN}pdp8${EXE} pdp8 : ${BIN}pdp8${EXE}
${BIN}pdp8${EXE} : ${PDP8} ${SIM} ${BIN}pdp8${EXE} : ${PDP8} ${SIM}
${MKDIRBIN}
${CC} ${PDP8} ${SIM} ${PDP8_OPT} -o $@ ${LDFLAGS} ${CC} ${PDP8} ${SIM} ${PDP8_OPT} -o $@ ${LDFLAGS}
pdp9 : ${BIN}pdp9${EXE} pdp9 : ${BIN}pdp9${EXE}
${BIN}pdp9${EXE} : ${PDP18B} ${SIM} ${BIN}pdp9${EXE} : ${PDP18B} ${SIM}
${MKDIRBIN}
${CC} ${PDP18B} ${SIM} ${PDP9_OPT} -o $@ ${LDFLAGS} ${CC} ${PDP18B} ${SIM} ${PDP9_OPT} -o $@ ${LDFLAGS}
pdp15 : ${BIN}pdp15${EXE} pdp15 : ${BIN}pdp15${EXE}
${BIN}pdp15${EXE} : ${PDP18B} ${SIM} ${BIN}pdp15${EXE} : ${PDP18B} ${SIM}
${MKDIRBIN}
${CC} ${PDP18B} ${SIM} ${PDP15_OPT} -o $@ ${LDFLAGS} ${CC} ${PDP18B} ${SIM} ${PDP15_OPT} -o $@ ${LDFLAGS}
pdp10 : ${BIN}pdp10${EXE} pdp10 : ${BIN}pdp10${EXE}
${BIN}pdp10${EXE} : ${PDP10} ${SIM} ${BIN}pdp10${EXE} : ${PDP10} ${SIM}
${MKDIRBIN}
${CC} ${PDP10} ${SIM} ${PDP10_OPT} -o $@ ${LDFLAGS} ${CC} ${PDP10} ${SIM} ${PDP10_OPT} -o $@ ${LDFLAGS}
pdp11 : ${BIN}pdp11${EXE} pdp11 : ${BIN}pdp11${EXE}
${BIN}pdp11${EXE} : ${PDP11} ${SIM} ${BIN}pdp11${EXE} : ${PDP11} ${SIM}
${MKDIRBIN}
${CC} ${PDP11} ${SIM} ${PDP11_OPT} -o $@ ${LDFLAGS} ${CC} ${PDP11} ${SIM} ${PDP11_OPT} -o $@ ${LDFLAGS}
vax : ${BIN}vax${EXE} vax : ${BIN}vax${EXE}
${BIN}vax${EXE} : ${VAX} ${SIM} ${BIN}vax${EXE} : ${VAX} ${SIM}
${MKDIRBIN}
${CC} ${VAX} ${SIM} ${VAX_OPT} -o $@ ${LDFLAGS} ${CC} ${VAX} ${SIM} ${VAX_OPT} -o $@ ${LDFLAGS}
vax780 : ${BIN}vax780${EXE} vax780 : ${BIN}vax780${EXE}
${BIN}vax780${EXE} : ${VAX780} ${SIM} ${BIN}vax780${EXE} : ${VAX780} ${SIM}
${MKDIRBIN}
${CC} ${VAX780} ${SIM} ${VAX780_OPT} -o $@ ${LDFLAGS} ${CC} ${VAX780} ${SIM} ${VAX780_OPT} -o $@ ${LDFLAGS}
nova : ${BIN}nova${EXE} nova : ${BIN}nova${EXE}
${BIN}nova${EXE} : ${NOVA} ${SIM} ${BIN}nova${EXE} : ${NOVA} ${SIM}
${MKDIRBIN}
${CC} ${NOVA} ${SIM} ${NOVA_OPT} -o $@ ${LDFLAGS} ${CC} ${NOVA} ${SIM} ${NOVA_OPT} -o $@ ${LDFLAGS}
eclipse : ${BIN}eclipse${EXE} eclipse : ${BIN}eclipse${EXE}
${BIN}eclipse${EXE} : ${ECLIPSE} ${SIM} ${BIN}eclipse${EXE} : ${ECLIPSE} ${SIM}
${MKDIRBIN}
${CC} ${ECLIPSE} ${SIM} ${ECLIPSE_OPT} -o $@ ${LDFLAGS} ${CC} ${ECLIPSE} ${SIM} ${ECLIPSE_OPT} -o $@ ${LDFLAGS}
h316 : ${BIN}h316${EXE} h316 : ${BIN}h316${EXE}
${BIN}h316${EXE} : ${H316} ${SIM} ${BIN}h316${EXE} : ${H316} ${SIM}
${MKDIRBIN}
${CC} ${H316} ${SIM} ${H316_OPT} -o $@ ${LDFLAGS} ${CC} ${H316} ${SIM} ${H316_OPT} -o $@ ${LDFLAGS}
hp2100 : ${BIN}hp2100${EXE} hp2100 : ${BIN}hp2100${EXE}
${BIN}hp2100${EXE} : ${HP2100} ${SIM} ${BIN}hp2100${EXE} : ${HP2100} ${SIM}
${MKDIRBIN}
${CC} ${HP2100} ${SIM} ${HP2100_OPT} -o $@ ${LDFLAGS} ${CC} ${HP2100} ${SIM} ${HP2100_OPT} -o $@ ${LDFLAGS}
i1401 : ${BIN}i1401${EXE} i1401 : ${BIN}i1401${EXE}
${BIN}i1401${EXE} : ${I1401} ${SIM} ${BIN}i1401${EXE} : ${I1401} ${SIM}
${MKDIRBIN}
${CC} ${I1401} ${SIM} ${I1401_OPT} -o $@ ${LDFLAGS} ${CC} ${I1401} ${SIM} ${I1401_OPT} -o $@ ${LDFLAGS}
i1620 : ${BIN}i1620${EXE} i1620 : ${BIN}i1620${EXE}
${BIN}i1620${EXE} : ${I1620} ${SIM} ${BIN}i1620${EXE} : ${I1620} ${SIM}
${MKDIRBIN}
${CC} ${I1620} ${SIM} ${I1620_OPT} -o $@ ${LDFLAGS} ${CC} ${I1620} ${SIM} ${I1620_OPT} -o $@ ${LDFLAGS}
i7094 : ${BIN}i7094${EXE} i7094 : ${BIN}i7094${EXE}
${BIN}i7094${EXE} : ${I7094} ${SIM} ${BIN}i7094${EXE} : ${I7094} ${SIM}
${MKDIRBIN}
${CC} ${I7094} ${SIM} ${I7094_OPT} -o $@ ${LDFLAGS} ${CC} ${I7094} ${SIM} ${I7094_OPT} -o $@ ${LDFLAGS}
ibm1130 : ${BIN}ibm1130${EXE} ibm1130 : ${BIN}ibm1130${EXE}
${BIN}ibm1130${EXE} : ${IBM1130} ${BIN}ibm1130${EXE} : ${IBM1130}
${MKDIRBIN}
${CC} ${IBM1130} ${SIM} ${IBM1130_OPT} -o $@ ${LDFLAGS} ${CC} ${IBM1130} ${SIM} ${IBM1130_OPT} -o $@ ${LDFLAGS}
s3 : ${BIN}s3${EXE} s3 : ${BIN}s3${EXE}
${BIN}s3${EXE} : ${S3} ${SIM} ${BIN}s3${EXE} : ${S3} ${SIM}
${MKDIRBIN}
${CC} ${S3} ${SIM} ${S3_OPT} -o $@ ${LDFLAGS} ${CC} ${S3} ${SIM} ${S3_OPT} -o $@ ${LDFLAGS}
altair : ${BIN}altair${EXE} altair : ${BIN}altair${EXE}
${BIN}altair${EXE} : ${ALTAIR} ${SIM} ${BIN}altair${EXE} : ${ALTAIR} ${SIM}
${MKDIRBIN}
${CC} ${ALTAIR} ${SIM} ${ALTAIR_OPT} -o $@ ${LDFLAGS} ${CC} ${ALTAIR} ${SIM} ${ALTAIR_OPT} -o $@ ${LDFLAGS}
altairz80 : ${BIN}altairz80${EXE} altairz80 : ${BIN}altairz80${EXE}
${BIN}altairz80${EXE} : ${ALTAIRZ80} ${SIM} ${BIN}altairz80${EXE} : ${ALTAIRZ80} ${SIM}
${MKDIRBIN}
${CC} ${ALTAIRZ80} ${SIM} ${ALTAIRZ80_OPT} -o $@ ${LDFLAGS} ${CC} ${ALTAIRZ80} ${SIM} ${ALTAIRZ80_OPT} -o $@ ${LDFLAGS}
gri : ${BIN}gri${EXE} gri : ${BIN}gri${EXE}
${BIN}gri${EXE} : ${GRI} ${SIM} ${BIN}gri${EXE} : ${GRI} ${SIM}
${MKDIRBIN}
${CC} ${GRI} ${SIM} ${GRI_OPT} -o $@ ${LDFLAGS} ${CC} ${GRI} ${SIM} ${GRI_OPT} -o $@ ${LDFLAGS}
lgp : ${BIN}lgp${EXE} lgp : ${BIN}lgp${EXE}
${BIN}lgp${EXE} : ${LGP} ${SIM} ${BIN}lgp${EXE} : ${LGP} ${SIM}
${MKDIRBIN}
${CC} ${LGP} ${SIM} ${LGP_OPT} -o $@ ${LDFLAGS} ${CC} ${LGP} ${SIM} ${LGP_OPT} -o $@ ${LDFLAGS}
id16 : ${BIN}id16${EXE} id16 : ${BIN}id16${EXE}
${BIN}id16${EXE} : ${ID16} ${SIM} ${BIN}id16${EXE} : ${ID16} ${SIM}
${MKDIRBIN}
${CC} ${ID16} ${SIM} ${ID16_OPT} -o $@ ${LDFLAGS} ${CC} ${ID16} ${SIM} ${ID16_OPT} -o $@ ${LDFLAGS}
id32 : ${BIN}id32${EXE} id32 : ${BIN}id32${EXE}
${BIN}id32${EXE} : ${ID32} ${SIM} ${BIN}id32${EXE} : ${ID32} ${SIM}
${MKDIRBIN}
${CC} ${ID32} ${SIM} ${ID32_OPT} -o $@ ${LDFLAGS} ${CC} ${ID32} ${SIM} ${ID32_OPT} -o $@ ${LDFLAGS}
sds : ${BIN}sds${EXE} sds : ${BIN}sds${EXE}
${BIN}sds${EXE} : ${SDS} ${SIM} ${BIN}sds${EXE} : ${SDS} ${SIM}
${MKDIRBIN}
${CC} ${SDS} ${SIM} ${SDS_OPT} -o $@ ${LDFLAGS} ${CC} ${SDS} ${SIM} ${SDS_OPT} -o $@ ${LDFLAGS}
swtp : ${BIN}swtp${EXE} swtp : ${BIN}swtp${EXE}
${BIN}swtp${EXE} : ${SWTP} ${SIM} ${BIN}swtp${EXE} : ${SWTP} ${SIM}
${MKDIRBIN}
${CC} ${SWTP} ${SIM} ${SWTP_OPT} -o $@ ${LDFLAGS} ${CC} ${SWTP} ${SIM} ${SWTP_OPT} -o $@ ${LDFLAGS}

96
scp.c
View file

@ -23,6 +23,11 @@
used in advertising or otherwise to promote the sale, use or other dealings used in advertising or otherwise to promote the sale, use or other dealings
in this Software without prior written authorization from Robert M Supnik. in this Software without prior written authorization from Robert M Supnik.
29-Jan-11 MP Adjusted sim_debug to:
- include the simulator timestamp (sim_time)
as part of the prefix for each line of output
- write complete lines at a time (avoid asynch I/O issues).
05-Jan-11 MP Added Asynch I/O support
22-Jan-11 MP Added SET ON, SET NOON, ON, GOTO and RETURN command support 22-Jan-11 MP Added SET ON, SET NOON, ON, GOTO and RETURN command support
13-Jan-11 MP Added "SHOW SHOW" and "SHOW <dev> SHOW" commands 13-Jan-11 MP Added "SHOW SHOW" and "SHOW <dev> SHOW" commands
05-Jan-11 RMS Fixed bug in deposit stride for numeric input (John Dundas) 05-Jan-11 RMS Fixed bug in deposit stride for numeric input (John Dundas)
@ -253,6 +258,17 @@
else if (sim_switches & SWMASK ('H')) val = 16; \ else if (sim_switches & SWMASK ('H')) val = 16; \
else val = dft; else val = dft;
/* Asynch I/O support */
#if defined (SIM_ASYNCH_IO)
pthread_mutex_t sim_asynch_lock = PTHREAD_MUTEX_INITIALIZER;
pthread_cond_t sim_asynch_wake = PTHREAD_COND_INITIALIZER;
pthread_t sim_asynch_main_threadid;
struct sim_unit *sim_asynch_queue = NULL;
int32 sim_asynch_check;
int32 sim_asynch_latency = 4000; /* 4 usec interrupt latency */
int32 sim_asynch_inst_latency = 20; /* assume 5 mip simulator */
#endif
/* VM interface */ /* VM interface */
extern char sim_name[]; extern char sim_name[];
@ -657,6 +673,7 @@ for (i = 1; i < argc; i++) { /* loop thru args */
} /* end for */ } /* end for */
sim_quiet = sim_switches & SWMASK ('Q'); /* -q means quiet */ sim_quiet = sim_switches & SWMASK ('Q'); /* -q means quiet */
AIO_INIT; /* init Asynch I/O */
if (sim_vm_init != NULL) /* call once only */ if (sim_vm_init != NULL) /* call once only */
(*sim_vm_init)(); (*sim_vm_init)();
sim_finit (); /* init fio package */ sim_finit (); /* init fio package */
@ -742,6 +759,7 @@ sim_set_deboff (0, NULL); /* close debug */
sim_set_logoff (0, NULL); /* close log */ sim_set_logoff (0, NULL); /* close log */
sim_set_notelnet (0, NULL); /* close Telnet */ sim_set_notelnet (0, NULL); /* close Telnet */
sim_ttclose (); /* close console */ sim_ttclose (); /* close console */
AIO_CLEANUP; /* Asynch I/O */
return 0; return 0;
} }
@ -1766,6 +1784,26 @@ for (uptr = sim_clock_queue; uptr != NULL; uptr = uptr->next) {
fprintf (st, " at %d\n", accum + uptr->time); fprintf (st, " at %d\n", accum + uptr->time);
accum = accum + uptr->time; accum = accum + uptr->time;
} }
#if defined (SIM_ASYNCH_IO)
pthread_mutex_lock (&sim_asynch_lock);
fprintf (st, "asynchronous pending event queue\n");
if (sim_asynch_queue == (void *)-1)
fprintf (st, "Empty\n");
else {
for (uptr = sim_asynch_queue; uptr != (void *)-1; uptr = uptr->a_next) {
if ((dptr = find_dev_from_unit (uptr)) != NULL) {
fprintf (st, " %s", sim_dname (dptr));
if (dptr->numunits > 1) fprintf (st, " unit %d",
(int32) (uptr - dptr->units));
}
else fprintf (st, " Unknown");
fprintf (st, " event delay %d, queue time %d\n", uptr->a_event_time, uptr->a_sim_interval);
}
}
fprintf (st, "asynch latency: %d microseconds\n", sim_asynch_latency);
fprintf (st, "asynch instruction latency: %d instructions\n", sim_asynch_inst_latency);
pthread_mutex_unlock (&sim_asynch_lock);
#endif
return SCPE_OK; return SCPE_OK;
} }
@ -2895,14 +2933,6 @@ r = sim_instr();
sim_is_running = 0; /* flag idle */ sim_is_running = 0; /* flag idle */
sim_ttcmd (); /* restore console */ sim_ttcmd (); /* restore console */
signal (SIGINT, SIG_DFL); /* cancel WRU */ signal (SIGINT, SIG_DFL); /* cancel WRU */
sim_cancel (&sim_step_unit); /* cancel step timer */
sim_throt_cancel (); /* cancel throttle */
if (sim_clock_queue != NULL) { /* update sim time */
UPDATE_SIM_TIME (sim_clock_queue->time);
}
else {
UPDATE_SIM_TIME (noqueue_time);
}
if (sim_log) /* flush console log */ if (sim_log) /* flush console log */
fflush (sim_log); fflush (sim_log);
if (sim_deb) /* flush debug log */ if (sim_deb) /* flush debug log */
@ -2912,12 +2942,24 @@ for (i = 1; (dptr = sim_devices[i]) != NULL; i++) { /* flush attached files
uptr = dptr->units + j; uptr = dptr->units + j;
if ((uptr->flags & UNIT_ATT) && /* attached, */ if ((uptr->flags & UNIT_ATT) && /* attached, */
!(uptr->flags & UNIT_BUF) && /* not buffered, */ !(uptr->flags & UNIT_BUF) && /* not buffered, */
(uptr->fileref) && /* real file, */ (uptr->fileref)) /* real file, */
!(uptr->flags & UNIT_RAW) && /* not raw, */ if (uptr->io_flush) /* unit specific flush routine */
uptr->io_flush (uptr);
else
if (!(uptr->flags & UNIT_RAW) && /* not raw, */
!(uptr->flags & UNIT_RO)) /* not read only? */ !(uptr->flags & UNIT_RO)) /* not read only? */
fflush (uptr->fileref); fflush (uptr->fileref);
} }
} }
sim_cancel (&sim_step_unit); /* cancel step timer */
sim_throt_cancel (); /* cancel throttle */
AIO_UPDATE_QUEUE;
if (sim_clock_queue != NULL) { /* update sim time */
UPDATE_SIM_TIME (sim_clock_queue->time);
}
else {
UPDATE_SIM_TIME (noqueue_time);
}
#if defined (VMS) #if defined (VMS)
printf ("\n"); printf ("\n");
#endif #endif
@ -4457,6 +4499,7 @@ t_stat reason;
if (stop_cpu) /* stop CPU? */ if (stop_cpu) /* stop CPU? */
return SCPE_STOP; return SCPE_STOP;
AIO_UPDATE_QUEUE;
if (sim_clock_queue == NULL) { /* queue empty? */ if (sim_clock_queue == NULL) { /* queue empty? */
UPDATE_SIM_TIME (noqueue_time); /* update sim time */ UPDATE_SIM_TIME (noqueue_time); /* update sim time */
sim_interval = noqueue_time = NOQUEUE_WAIT; /* flag queue empty */ sim_interval = noqueue_time = NOQUEUE_WAIT; /* flag queue empty */
@ -4495,8 +4538,7 @@ t_stat sim_activate (UNIT *uptr, int32 event_time)
UNIT *cptr, *prvptr; UNIT *cptr, *prvptr;
int32 accum; int32 accum;
if (event_time < 0) AIO_ACTIVATE (sim_activate, uptr, event_time);
return SCPE_IERR;
if (sim_is_active (uptr)) /* already active? */ if (sim_is_active (uptr)) /* already active? */
return SCPE_OK; return SCPE_OK;
if (sim_clock_queue == NULL) { if (sim_clock_queue == NULL) {
@ -4540,6 +4582,7 @@ return SCPE_OK;
t_stat sim_activate_abs (UNIT *uptr, int32 event_time) t_stat sim_activate_abs (UNIT *uptr, int32 event_time)
{ {
AIO_ACTIVATE (sim_activate_abs, uptr, event_time);
sim_cancel (uptr); sim_cancel (uptr);
return sim_activate (uptr, event_time); return sim_activate (uptr, event_time);
} }
@ -4557,6 +4600,7 @@ t_stat sim_cancel (UNIT *uptr)
{ {
UNIT *cptr, *nptr; UNIT *cptr, *nptr;
AIO_VALIDATE;
if (sim_clock_queue == NULL) if (sim_clock_queue == NULL)
return SCPE_OK; return SCPE_OK;
UPDATE_SIM_TIME (sim_clock_queue->time); /* update sim time */ UPDATE_SIM_TIME (sim_clock_queue->time); /* update sim time */
@ -4594,6 +4638,7 @@ int32 sim_is_active (UNIT *uptr)
UNIT *cptr; UNIT *cptr;
int32 accum; int32 accum;
AIO_VALIDATE;
accum = 0; accum = 0;
for (cptr = sim_clock_queue; cptr != NULL; cptr = cptr->next) { for (cptr = sim_clock_queue; cptr != NULL; cptr = cptr->next) {
if (cptr == sim_clock_queue) { if (cptr == sim_clock_queue) {
@ -5002,7 +5047,7 @@ return SCPE_OK;
/* Debug printout routines, from Dave Hittner */ /* Debug printout routines, from Dave Hittner */
const char* debug_bstates = "01_^"; const char* debug_bstates = "01_^";
const char* debug_fmt = "DBG> %s %s: "; const char* debug_fmt = "DBG(%.0f)> %s %s: ";
int32 debug_unterm = 0; int32 debug_unterm = 0;
/* Finds debug phrase matching bitmask from from device DEBTAB table */ /* Finds debug phrase matching bitmask from from device DEBTAB table */
@ -5032,7 +5077,7 @@ static void sim_debug_prefix (uint32 dbits, DEVICE* dptr)
{ {
if (!debug_unterm) { if (!debug_unterm) {
char* debug_type = get_dbg_verb (dbits, dptr); char* debug_type = get_dbg_verb (dbits, dptr);
fprintf(sim_deb, debug_fmt, dptr->name, debug_type); fprintf(sim_deb, debug_fmt, sim_time, dptr->name, debug_type);
} }
} }
@ -5060,7 +5105,7 @@ if (sim_deb && (dptr->dctrl & dbits)) {
#if defined (_WIN32) #if defined (_WIN32)
#define vsnprintf _vsnprintf #define vsnprintf _vsnprintf
#endif #endif
#if defined (__DECC) && defined (__VMS) #if defined (__DECC) && defined (__VMS) && defined (__VAX)
#define NO_vsnprintf #define NO_vsnprintf
#endif #endif
#if defined( NO_vsnprintf) #if defined( NO_vsnprintf)
@ -5073,9 +5118,12 @@ if (sim_deb && (dptr->dctrl & dbits)) {
set and the bitmask matches the current device debug options. set and the bitmask matches the current device debug options.
Extra returns are added for un*x systems, since the output Extra returns are added for un*x systems, since the output
device is set into 'raw' mode when the cpu is booted, device is set into 'raw' mode when the cpu is booted,
and the extra returns don't hurt any other systems. */ and the extra returns don't hurt any other systems.
Callers should be calling sim_debug() which is a macro
defined in scp.h which evaluates the action condition before
incurring call overhead. */
void sim_debug (uint32 dbits, DEVICE* dptr, const char* fmt, ...) void _sim_debug (uint32 dbits, DEVICE* dptr, const char* fmt, ...)
{ {
if (sim_deb && (dptr->dctrl & dbits)) { if (sim_deb && (dptr->dctrl & dbits)) {
@ -5084,9 +5132,9 @@ if (sim_deb && (dptr->dctrl & dbits)) {
char *buf = stackbuf; char *buf = stackbuf;
va_list arglist; va_list arglist;
int32 i, j, len; int32 i, j, len;
char* debug_type = get_dbg_verb (dbits, dptr);
buf[bufsize-1] = '\0'; buf[bufsize-1] = '\0';
sim_debug_prefix(dbits, dptr); /* print prefix if required */
while (1) { /* format passed string, args */ while (1) { /* format passed string, args */
va_start (arglist, fmt); va_start (arglist, fmt);
@ -5132,10 +5180,14 @@ if (sim_deb && (dptr->dctrl & dbits)) {
for (i = j = 0; i < len; ++i) { for (i = j = 0; i < len; ++i) {
if ('\n' == buf[i]) { if ('\n' == buf[i]) {
if (i > j) if (i > j) {
fwrite (&buf[j], 1, i-j, sim_deb); if (debug_unterm)
j = i; fprintf (sim_deb, "%.*s\r\n", i-j, &buf[j]);
fputc('\r', sim_deb); else /* print prefix when required */
fprintf (sim_deb, "DBG(%.0f)> %s %s: %.*s\r\n", sim_time, dptr->name, debug_type, i-j, &buf[j]);
debug_unterm = 0;
}
j = i + 1;
} }
} }
if (i > j) if (i > j)

8
scp.h
View file

@ -23,6 +23,7 @@
be used in advertising or otherwise to promote the sale, use or other dealings be used in advertising or otherwise to promote the sale, use or other dealings
in this Software without prior written authorization from Robert M Supnik. in this Software without prior written authorization from Robert M Supnik.
05-Dec-10 MP Added macro invocation of sim_debug
09-Aug-06 JDB Added assign_device and deassign_device 09-Aug-06 JDB Added assign_device and deassign_device
14-Jul-06 RMS Added sim_activate_abs 14-Jul-06 RMS Added sim_activate_abs
06-Jan-06 RMS Added fprint_stopped_gen 06-Jan-06 RMS Added fprint_stopped_gen
@ -121,7 +122,14 @@ t_stat sim_string_to_stat (char *cptr, t_stat *cond);
t_stat sim_cancel_step (void); t_stat sim_cancel_step (void);
void sim_debug_u16 (uint32 dbits, DEVICE* dptr, const char* const* bitdefs, void sim_debug_u16 (uint32 dbits, DEVICE* dptr, const char* const* bitdefs,
uint16 before, uint16 after, int terminate); uint16 before, uint16 after, int terminate);
#ifdef CANT_USE_MACRO_VA_ARGS
#define _sim_debug sim_debug
void sim_debug (uint32 dbits, DEVICE* dptr, const char* fmt, ...); void sim_debug (uint32 dbits, DEVICE* dptr, const char* fmt, ...);
#else
void _sim_debug (uint32 dbits, DEVICE* dptr, const char* fmt, ...);
extern FILE *sim_deb; /* debug file */
#define sim_debug(dbits, dptr, ...) if (sim_deb && ((dptr)->dctrl & dbits)) _sim_debug (dbits, dptr, __VA_ARGS__)
#endif
void fprint_stopped_gen (FILE *st, t_stat v, REG *pc, DEVICE *dptr); void fprint_stopped_gen (FILE *st, t_stat v, REG *pc, DEVICE *dptr);
#endif #endif

2
sim_console.c
View file

@ -555,7 +555,7 @@ if (strcmp (gbuf, "LOG") == 0) { /* output to log? */
++(*pref)->refcount; ++(*pref)->refcount;
} }
else if (strcmp (gbuf, "DEBUG") == 0) { /* output to debug? */ else if (strcmp (gbuf, "DEBUG") == 0) { /* output to debug? */
if (sim_debug == NULL) /* any debug? */ if (sim_deb == NULL) /* any debug? */
return SCPE_ARG; return SCPE_ARG;
*pf = sim_deb; *pf = sim_deb;
*pref = sim_deb_ref; *pref = sim_deb_ref;

169
sim_defs.h
View file

@ -23,6 +23,7 @@
used in advertising or otherwise to promote the sale, use or other dealings used in advertising or otherwise to promote the sale, use or other dealings
in this Software without prior written authorization from Robert M Supnik. in this Software without prior written authorization from Robert M Supnik.
05-Jan-11 MP Added Asynch I/O support
18-Jan-11 MP Added log file reference count support 18-Jan-11 MP Added log file reference count support
21-Jul-08 RMS Removed inlining support 21-Jul-08 RMS Removed inlining support
28-May-08 RMS Added inlining support 28-May-08 RMS Added inlining support
@ -119,12 +120,16 @@
/* Length specific integer declarations */ /* Length specific integer declarations */
#if defined (VMS)
#include <ints.h>
#else
typedef signed char int8; typedef signed char int8;
typedef signed short int16; typedef signed short int16;
typedef signed int int32; typedef signed int int32;
typedef unsigned char uint8; typedef unsigned char uint8;
typedef unsigned short uint16; typedef unsigned short uint16;
typedef unsigned int uint32; typedef unsigned int uint32;
#endif
typedef int t_stat; /* status */ typedef int t_stat; /* status */
typedef int t_bool; /* boolean */ typedef int t_bool; /* boolean */
@ -349,12 +354,23 @@ struct sim_unit {
uint32 flags; /* flags */ uint32 flags; /* flags */
t_addr capac; /* capacity */ t_addr capac; /* capacity */
t_addr pos; /* file position */ t_addr pos; /* file position */
void (*io_flush)(struct sim_unit *up);/* io flush routine */
uint32 iostarttime; /* I/O start time */
int32 buf; /* buffer */ int32 buf; /* buffer */
int32 wait; /* wait */ int32 wait; /* wait */
int32 u3; /* device specific */ int32 u3; /* device specific */
int32 u4; /* device specific */ int32 u4; /* device specific */
int32 u5; /* device specific */ int32 u5; /* device specific */
int32 u6; /* device specific */ int32 u6; /* device specific */
void *up7; /* device specific */
void *up8; /* device specific */
#ifdef SIM_ASYNCH_IO
void (*a_check_completion)(struct sim_unit *);
struct sim_unit *a_next; /* next asynch active */
int32 a_event_time;
int32 a_sim_interval;
t_stat (*a_activate_call)(struct sim_unit *, int32);
#endif
}; };
/* Unit flags */ /* Unit flags */
@ -539,4 +555,157 @@ typedef struct sim_fileref FILEREF;
#include "sim_timer.h" #include "sim_timer.h"
#include "sim_fio.h" #include "sim_fio.h"
/* Asynch/Threaded I/O support */
#if defined (SIM_ASYNCH_IO)
#include <pthread.h>
extern pthread_mutex_t sim_asynch_lock;
extern pthread_cond_t sim_asynch_wake;
extern pthread_t sim_asynch_main_threadid;
extern struct sim_unit *sim_asynch_queue;
extern t_bool sim_idle_wait;
extern int32 sim_asynch_check;
extern int32 sim_asynch_latency;
extern int32 sim_asynch_inst_latency;
#define AIO_INIT \
if (1) { \
sim_asynch_main_threadid = pthread_self(); \
/* Empty list/list end uses the point value (void *)-1. \
This allows NULL in an entry's a_next pointer to \
indicate that the entry is not currently in any list */ \
sim_asynch_queue = (void *)-1; \
}
#define AIO_CLEANUP \
if (1) { \
pthread_mutex_destroy(&sim_asynch_lock); \
pthread_cond_destroy(&sim_asynch_wake); \
}
#if defined(_WIN32) || defined(__GCC_HAVE_SYNC_COMPARE_AND_SWAP_4) || defined(__GCC_HAVE_SYNC_COMPARE_AND_SWAP_8)
#define USE_AIO_INTRINSICS 1
#endif
#ifdef USE_AIO_INTRINSICS
/* This approach uses intrinsics to manage access to the link list head */
/* sim_asynch_queue. However, once the list head state has been determined */
/* a lock is used to manage the list update and entry removal. */
/* This approach avoids the ABA issues with a completly lock free approach */
/* since the ABA problem is very likely to happen with this use model, and */
/* it avoids the lock overhead for the simple list head checking. */
#ifdef _WIN32
#include <winsock2.h>
#ifdef ERROR
#undef ERROR
#endif /* ERROR */
#elif defined(__GCC_HAVE_SYNC_COMPARE_AND_SWAP_4) || defined(__GCC_HAVE_SYNC_COMPARE_AND_SWAP_8)
#define InterlockedCompareExchangePointer(Destination, Exchange, Comparand) __sync_val_compare_and_swap(Destination, Comparand, Exchange)
#define InterlockedExchangePointer(Destination, value) __sync_lock_test_and_set(Destination, value)
#else
#error "Implementation of functions InterlockedCompareExchangePointer() and InterlockedExchangePointer() are needed to build with USE_AIO_INTRINSICS"
#endif
#define AIO_QUEUE_VAL InterlockedCompareExchangePointer(&sim_asynch_queue, sim_asynch_queue, NULL)
#define AIO_QUEUE_SET(val) InterlockedExchangePointer(&sim_asynch_queue, val)
#define AIO_UPDATE_QUEUE \
if (1) { \
UNIT *uptr; \
if (AIO_QUEUE_VAL != (void *)-1) { \
pthread_mutex_lock (&sim_asynch_lock); \
while ((uptr = AIO_QUEUE_VAL) != (void *)-1) { \
int32 a_event_time; \
AIO_QUEUE_SET(uptr->a_next); \
uptr->a_next = NULL; /* hygiene */ \
a_event_time = uptr->a_event_time-(uptr->a_sim_interval-sim_interval); \
if (a_event_time < 0) a_event_time = 0; \
uptr->a_activate_call (uptr, a_event_time); \
if (uptr->a_check_completion) { \
pthread_mutex_unlock (&sim_asynch_lock); \
uptr->a_check_completion (uptr); \
pthread_mutex_lock (&sim_asynch_lock); \
} \
} \
pthread_mutex_unlock (&sim_asynch_lock); \
} \
sim_asynch_check = sim_asynch_inst_latency; \
}
#define AIO_ACTIVATE(caller, uptr, event_time) \
if (!pthread_equal ( pthread_self(), sim_asynch_main_threadid )) { \
pthread_mutex_lock (&sim_asynch_lock); \
if (uptr->a_next) { \
uptr->a_activate_call = sim_activate_abs; \
} else { \
uptr->a_next = AIO_QUEUE_VAL; \
uptr->a_event_time = event_time; \
uptr->a_sim_interval = sim_interval; \
uptr->a_activate_call = caller; \
AIO_QUEUE_SET(uptr); \
} \
if (sim_idle_wait) \
pthread_cond_signal (&sim_asynch_wake); \
pthread_mutex_unlock (&sim_asynch_lock); \
return SCPE_OK; \
}
#else /* !USE_AIO_INTRINSICS */
/* This approach uses a pthread mutex to manage access to the link list */
/* head sim_asynch_queue. It will always work, but may be slower than the */
/* partially lock free approach when using USE_AIO_INTRINSICS */
#define AIO_UPDATE_QUEUE \
if (1) { \
UNIT *uptr; \
pthread_mutex_lock (&sim_asynch_lock); \
while (sim_asynch_queue != (void *)-1) { /* List !Empty */ \
int32 a_event_time; \
uptr = sim_asynch_queue; \
sim_asynch_queue = uptr->a_next; \
uptr->a_next = NULL; \
a_event_time = uptr->a_event_time-(uptr->a_sim_interval-sim_interval); \
if (a_event_time < 0) a_event_time = 0; \
uptr->a_activate_call (uptr, a_event_time); \
if (uptr->a_check_completion) { \
pthread_mutex_unlock (&sim_asynch_lock); \
uptr->a_check_completion (uptr); \
pthread_mutex_lock (&sim_asynch_lock); \
} \
} \
pthread_mutex_unlock (&sim_asynch_lock); \
sim_asynch_check = sim_asynch_inst_latency; \
}
#define AIO_ACTIVATE(caller, uptr, event_time) \
if (!pthread_equal ( pthread_self(), sim_asynch_main_threadid )) { \
pthread_mutex_lock (&sim_asynch_lock); \
if (uptr->a_next) { \
uptr->a_activate_call = sim_activate_abs; \
} else { \
uptr->a_next = sim_asynch_queue; \
uptr->a_event_time = event_time; \
uptr->a_sim_interval = sim_interval; \
uptr->a_activate_call = caller; \
sim_asynch_queue = uptr; \
} \
if (sim_idle_wait) \
pthread_cond_signal (&sim_asynch_wake); \
pthread_mutex_unlock (&sim_asynch_lock); \
return SCPE_OK; \
}
#endif /* USE_AIO_INTRINSICS */
#define AIO_VALIDATE if (!pthread_equal ( pthread_self(), sim_asynch_main_threadid )) abort()
#define AIO_CHECK_EVENT \
if (0 > --sim_asynch_check) { \
AIO_UPDATE_QUEUE; \
}
#define AIO_SET_INTERRUPT_LATENCY(instpersec) \
if (1) { \
sim_asynch_inst_latency = (int32)((((double)(instpersec))*sim_asynch_latency)/1000000000);\
if (sim_asynch_inst_latency == 0) \
sim_asynch_inst_latency = 1; \
}
#else /* !SIM_ASYNCH_IO */
#define AIO_UPDATE_QUEUE
#define AIO_ACTIVATE(caller, uptr, event_time)
#define AIO_VALIDATE
#define AIO_CHECK_EVENT
#define AIO_INIT
#define AIO_CLEANUP
#define AIO_SET_INTERRUPT_LATENCY(instpersec)
#endif /* SIM_ASYNCH_IO */
#endif #endif

3272
sim_disk.c Normal file
View file

File diff suppressed because it is too large Load diff

86
sim_disk.h Normal file
View file

@ -0,0 +1,86 @@
/* sim_disk.h: simulator disk support library definitions
Copyright (c) 2011, Mark Pizzolato
Permission is hereby granted, free of charge, to any person obtaining a
copy of this software and associated documentation files (the "Software"),
to deal in the Software without restriction, including without limitation
the rights to use, copy, modify, merge, publish, distribute, sublicense,
and/or sell copies of the Software, and to permit persons to whom the
Software is furnished to do so, subject to the following conditions:
The above copyright notice and this permission notice shall be included in
all copies or substantial portions of the Software.
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
ROBERT M SUPNIK BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
Except as contained in this notice, the names of Robert M Supnik and
Mark Pizzolato shall not be used in advertising or otherwise to promote
the sale, use or other dealings in this Software without prior written
authorization from Robert M Supnik and Mark Pizzolato.
25-Jan-11 MP Initial Implemementation
*/
#ifndef _SIM_DISK_H_
#define _SIM_DISK_H_ 0
/* SIMH/Disk format */
typedef uint32 t_seccnt; /* disk sector count */
typedef uint32 t_lba; /* disk logical block address */
/* Unit flags */
#define DKUF_V_WLK (UNIT_V_UF + 12) /* write locked */
#define DKUF_V_FMT (UNIT_V_UF + 13) /* disk file format */
#define DKUF_W_FMT 3 /* 3b of formats */
#define DKUF_N_FMT (1u << DKUF_W_FMT) /* number of formats */
#define DKUF_M_FMT ((1u << DKUF_W_FMT) - 1)
#define DKUF_F_STD 0 /* SIMH format */
#define DKUF_F_RAW 1 /* Raw Physical Disk Access */
#define DKUF_F_VHD 2 /* VHD format */
#define DKUF_V_UF (DKUF_V_FMT + DKUF_W_FMT)
#define DKUF_WLK (1u << DKUF_V_WLK)
#define DKUF_FMT (DKUF_M_FMT << DKUF_V_FMT)
#define DKUF_WRP (DKUF_WLK | UNIT_RO)
#define DK_F_STD (DKUF_F_STD << DKUF_V_FMT)
#define DK_F_RAW (DKUF_F_RAW << DKUF_V_FMT)
#define DK_F_VHD (DKUF_F_VHD << DKUF_V_FMT)
#define DK_GET_FMT(u) (((u)->flags >> DKUF_V_FMT) & DKUF_M_FMT)
/* Return status codes */
#define DKSE_OK 0 /* no error */
typedef void (*DISK_PCALLBACK)(UNIT *unit, t_stat status);
/* Prototypes */
t_stat sim_disk_attach (UNIT *uptr, char *cptr, size_t sector_size, size_t xfer_element_size, t_bool dontautosize, uint32 debugbit, const char *drivetype, uint32 pdp11_tracksize);
t_stat sim_disk_detach (UNIT *uptr);
t_stat sim_disk_rdsect (UNIT *uptr, t_lba lba, uint8 *buf, t_seccnt *sectsread, t_seccnt sects);
t_stat sim_disk_rdsect_a (UNIT *uptr, t_lba lba, uint8 *buf, t_seccnt *sectsread, t_seccnt sects, DISK_PCALLBACK callback);
t_stat sim_disk_wrsect (UNIT *uptr, t_lba lba, uint8 *buf, t_seccnt *sectswritten, t_seccnt sects);
t_stat sim_disk_wrsect_a (UNIT *uptr, t_lba lba, uint8 *buf, t_seccnt *sectswritten, t_seccnt sects, DISK_PCALLBACK callback);
t_stat sim_disk_unload (UNIT *uptr);
t_stat sim_disk_set_fmt (UNIT *uptr, int32 val, char *cptr, void *desc);
t_stat sim_disk_show_fmt (FILE *st, UNIT *uptr, int32 val, void *desc);
t_stat sim_disk_set_capac (UNIT *uptr, int32 val, char *cptr, void *desc);
t_stat sim_disk_show_capac (FILE *st, UNIT *uptr, int32 val, void *desc);
t_stat sim_disk_set_asynch (UNIT *uptr, int latency);
t_stat sim_disk_clr_asynch (UNIT *uptr);
t_bool sim_disk_isavailable (UNIT *uptr);
t_bool sim_disk_isavailable_a (UNIT *uptr, DISK_PCALLBACK callback);
t_bool sim_disk_wrp (UNIT *uptr);
t_addr sim_disk_size (UNIT *uptr);
void sim_disk_data_trace (UNIT *uptr, const uint8 *data, size_t lba, size_t len, const char* txt, int detail, uint32 reason);
#endif

6
sim_ether.c
View file

@ -637,7 +637,7 @@ t_stat eth_show (FILE* st, UNIT* uptr, int32 val, void* desc)
for (i=0, min=0; i<number; i++) for (i=0, min=0; i<number; i++)
if ((len = strlen(list[i].name)) > min) min = len; if ((len = strlen(list[i].name)) > min) min = len;
for (i=0; i<number; i++) for (i=0; i<number; i++)
fprintf(st," %d %-*s (%s)\n", i, min, list[i].name, list[i].desc); fprintf(st," %d %-*s (%s)\n", i, (int)min, list[i].name, list[i].desc);
} }
return SCPE_OK; return SCPE_OK;
} }
@ -1000,7 +1000,7 @@ int pcap_setfilter(pcap_t* a, struct bpf_program* b) {
#endif #endif
/* Some platforms have always had pcap_sendpacket */ /* Some platforms have always had pcap_sendpacket */
#if defined(_WIN32) || defined(VMS) #if defined(_WIN32) || defined(__VMS)
#define HAS_PCAP_SENDPACKET 1 #define HAS_PCAP_SENDPACKET 1
#else #else
/* The latest libpcap and WinPcap all have pcap_sendpacket */ /* The latest libpcap and WinPcap all have pcap_sendpacket */
@ -1089,7 +1089,7 @@ static void eth_get_nic_hw_addr(ETH_DEV* dev, char *devname)
#ifdef _WIN32 #ifdef _WIN32
if (!pcap_mac_if_win32(devname, (UCHAR *)&dev->host_nic_phy_hw_addr)) if (!pcap_mac_if_win32(devname, (UCHAR *)&dev->host_nic_phy_hw_addr))
dev->have_host_nic_phy_addr = 1; dev->have_host_nic_phy_addr = 1;
#else #elif !defined (__VMS)
{ {
char command[1024]; char command[1024];
FILE *f; FILE *f;

148
sim_fio.c
View file

@ -23,6 +23,8 @@
used in advertising or otherwise to promote the sale, use or other dealings used in advertising or otherwise to promote the sale, use or other dealings
in this Software without prior written authorization from Robert M Supnik. in this Software without prior written authorization from Robert M Supnik.
02-Feb-11 MP Added sim_fsize_ex and sim_fsize_name_ex returning t_addr
Added export of sim_buf_copy_swapped and sim_buf_swap_data
28-Jun-07 RMS Added VMS IA64 support (from Norm Lastovica) 28-Jun-07 RMS Added VMS IA64 support (from Norm Lastovica)
10-Jul-06 RMS Fixed linux conditionalization (from Chaskiel Grundman) 10-Jul-06 RMS Fixed linux conditionalization (from Chaskiel Grundman)
15-May-06 RMS Added sim_fsize_name 15-May-06 RMS Added sim_fsize_name
@ -41,6 +43,11 @@
sim_write - endian independent write (formerly fxwrite) sim_write - endian independent write (formerly fxwrite)
sim_fseek - extended (>32b) seek (formerly fseek_ext) sim_fseek - extended (>32b) seek (formerly fseek_ext)
sim_fsize - get file size sim_fsize - get file size
sim_fsize_name - get file size of named file
sim_fsize_ex - get file size as a t_addr
sim_fsize_name_ex - get file size as a t_addr of named file
sim_buf_copy_swapped - copy data swapping elements along the way
sim_buf_swap_data - swap data elements inplace in buffer
sim_fopen and sim_fseek are OS-dependent. The other routines are not. sim_fopen and sim_fseek are OS-dependent. The other routines are not.
sim_fsize is always a 32b routine (it is used only with small capacity random sim_fsize is always a 32b routine (it is used only with small capacity random
@ -78,18 +85,16 @@ sim_end = end_test.c[0];
return sim_end; return sim_end;
} }
size_t sim_fread (void *bptr, size_t size, size_t count, FILE *fptr) void sim_buf_swap_data (void *bptr, size_t size, size_t count)
{ {
size_t c, j; uint32 j;
int32 k; int32 k;
unsigned char by, *sptr, *dptr; unsigned char by, *sptr, *dptr;
if ((size == 0) || (count == 0)) /* check arguments */ if (sim_end || (count == 0) || (size == sizeof (char)))
return 0; return;
c = fread (bptr, size, count, fptr); /* read buffer */ for (j = 0, dptr = sptr = (unsigned char *) bptr; /* loop on items */
if (sim_end || (size == sizeof (char)) || (c == 0)) /* le, byte, or err? */ j < count; j++) {
return c; /* done */
for (j = 0, dptr = sptr = (unsigned char *) bptr; j < c; j++) { /* loop on items */
for (k = size - 1; k >= (((int32) size + 1) / 2); k--) { for (k = size - 1; k >= (((int32) size + 1) / 2); k--) {
by = *sptr; /* swap end-for-end */ by = *sptr; /* swap end-for-end */
*sptr++ = *(dptr + k); *sptr++ = *(dptr + k);
@ -97,14 +102,44 @@ for (j = 0, dptr = sptr = (unsigned char *) bptr; j < c; j++) { /* loop on items
} }
sptr = dptr = dptr + size; /* next item */ sptr = dptr = dptr + size; /* next item */
} }
}
size_t sim_fread (void *bptr, size_t size, size_t count, FILE *fptr)
{
size_t c;
if ((size == 0) || (count == 0)) /* check arguments */
return 0;
c = fread (bptr, size, count, fptr); /* read buffer */
if (sim_end || (size == sizeof (char)) || (c == 0)) /* le, byte, or err? */
return c; /* done */
sim_buf_swap_data (bptr, size, count);
return c; return c;
} }
void sim_buf_copy_swapped (void *dbuf, void *sbuf, size_t size, size_t count)
{
size_t j;
int32 k;
unsigned char *sptr = (unsigned char *)sbuf;
unsigned char *dptr = (unsigned char *)dbuf;
if (sim_end || (size == sizeof (char))) {
memcpy (dptr, sptr, size * count);
return;
}
for (j = 0; j < count; j++) { /* loop on items */
for (k = size - 1; k >= 0; k--)
*(dptr + k) = *sptr++;
dptr = dptr + size;
}
}
size_t sim_fwrite (void *bptr, size_t size, size_t count, FILE *fptr) size_t sim_fwrite (void *bptr, size_t size, size_t count, FILE *fptr)
{ {
size_t c, j, nelem, nbuf, lcnt, total; size_t c, nelem, nbuf, lcnt, total;
int32 i, k; int32 i;
unsigned char *sptr, *dptr; unsigned char *sptr;
if ((size == 0) || (count == 0)) /* check arguments */ if ((size == 0) || (count == 0)) /* check arguments */
return 0; return 0;
@ -119,11 +154,8 @@ total = 0;
sptr = (unsigned char *) bptr; /* init input ptr */ sptr = (unsigned char *) bptr; /* init input ptr */
for (i = nbuf; i > 0; i--) { /* loop on buffers */ for (i = nbuf; i > 0; i--) { /* loop on buffers */
c = (i == 1)? lcnt: nelem; c = (i == 1)? lcnt: nelem;
for (j = 0, dptr = sim_flip; j < c; j++) { /* loop on items */ sim_buf_copy_swapped (sim_flip, sptr, size, c);
for (k = size - 1; k >= 0; k--) sptr = sptr + size * count;
*(dptr + k) = *sptr++;
dptr = dptr + size;
}
c = fwrite (sim_flip, size, c, fptr); c = fwrite (sim_flip, size, c, fptr);
if (c == 0) if (c == 0)
return total; return total;
@ -132,31 +164,45 @@ for (i = nbuf; i > 0; i--) { /* loop on buffers */
return total; return total;
} }
/* Forward Declaration */
static t_addr _sim_ftell (FILE *st);
/* Get file size */ /* Get file size */
uint32 sim_fsize_name (char *fname) t_addr sim_fsize_ex (FILE *fp)
{
t_addr pos, sz;
if (fp == NULL)
return 0;
pos = _sim_ftell (fp);
sim_fseek (fp, 0, SEEK_END);
sz = _sim_ftell (fp);
sim_fseek (fp, pos, SEEK_SET);
return sz;
}
t_addr sim_fsize_name_ex (char *fname)
{ {
FILE *fp; FILE *fp;
uint32 sz; t_addr sz;
if ((fp = sim_fopen (fname, "rb")) == NULL) if ((fp = sim_fopen (fname, "rb")) == NULL)
return 0; return 0;
sz = sim_fsize (fp); sz = sim_fsize_ex (fp);
fclose (fp); fclose (fp);
return sz; return sz;
} }
uint32 sim_fsize_name (char *fname)
{
return (uint32)(sim_fsize_name_ex (fname));
}
uint32 sim_fsize (FILE *fp) uint32 sim_fsize (FILE *fp)
{ {
uint32 pos, sz; return (uint32)(sim_fsize_ex (fp));
if (fp == NULL)
return 0;
pos = ftell (fp);
fseek (fp, 0, SEEK_END);
sz = ftell (fp);
fseek (fp, pos, SEEK_SET);
return sz;
} }
/* OS-dependent routines */ /* OS-dependent routines */
@ -227,6 +273,9 @@ switch (whence) {
fileaddr = offset; fileaddr = offset;
break; break;
case SEEK_END:
if (_fseeki64 (st, 0, SEEK_END))
return (-1);
case SEEK_CUR: case SEEK_CUR:
if (fgetpos (st, &filepos)) if (fgetpos (st, &filepos))
return (-1); return (-1);
@ -243,6 +292,14 @@ int64_to_fpos_t (fileaddr, &filepos, 127);
return fsetpos (st, &filepos); return fsetpos (st, &filepos);
} }
static t_addr _sim_ftell (FILE *st)
{
fpos_t fileaddr;
if (fgetpos (st, &fileaddr))
return (-1);
return (t_addr)fpos_t_to_int64 (&fileaddr);
}
#endif #endif
/* Alpha UNIX - natively 64b */ /* Alpha UNIX - natively 64b */
@ -255,16 +312,23 @@ int sim_fseek (FILE *st, t_addr offset, int whence)
return fseek (st, offset, whence); return fseek (st, offset, whence);
} }
static t_addr _sim_ftell (FILE *st)
{
return (t_addr)(ftell (st));
}
#endif #endif
/* Windows */ /* Windows */
#if defined (_WIN32) #if defined (_WIN32)
#define _SIM_IO_FSEEK_EXT_ 1 #define _SIM_IO_FSEEK_EXT_ 1
#include <sys/stat.h>
int sim_fseek (FILE *st, t_addr offset, int whence) int sim_fseek (FILE *st, t_addr offset, int whence)
{ {
fpos_t fileaddr; fpos_t fileaddr;
struct _stati64 statb;
switch (whence) { switch (whence) {
@ -272,6 +336,11 @@ switch (whence) {
fileaddr = offset; fileaddr = offset;
break; break;
case SEEK_END:
if (_fstati64 (_fileno (st), &statb))
return (-1);
fileaddr = statb.st_size + offset;
break;
case SEEK_CUR: case SEEK_CUR:
if (fgetpos (st, &fileaddr)) if (fgetpos (st, &fileaddr))
return (-1); return (-1);
@ -286,6 +355,14 @@ switch (whence) {
return fsetpos (st, &fileaddr); return fsetpos (st, &fileaddr);
} }
static t_addr _sim_ftell (FILE *st)
{
fpos_t fileaddr;
if (fgetpos (st, &fileaddr))
return (-1);
return (t_addr)fileaddr;
}
#endif /* end Windows */ #endif /* end Windows */
/* Linux */ /* Linux */
@ -298,6 +375,11 @@ int sim_fseek (FILE *st, t_addr xpos, int origin)
return fseeko64 (st, xpos, origin); return fseeko64 (st, xpos, origin);
} }
static t_addr _sim_ftell (FILE *st)
{
return (t_addr)(ftello64 (st));
}
#endif /* end Linux with LFS */ #endif /* end Linux with LFS */
/* Apple OS/X */ /* Apple OS/X */
@ -310,6 +392,11 @@ int sim_fseek (FILE *st, t_addr xpos, int origin)
return fseeko (st, xpos, origin); return fseeko (st, xpos, origin);
} }
static t_addr _sim_ftell (FILE *st)
{
return (t_addr)(ftello (st));
}
#endif /* end Apple OS/X */ #endif /* end Apple OS/X */
#endif /* end 64b seek defs */ #endif /* end 64b seek defs */
@ -324,6 +411,11 @@ int sim_fseek (FILE *st, t_addr xpos, int origin)
return fseek (st, (int32) xpos, origin); return fseek (st, (int32) xpos, origin);
} }
static t_addr _sim_ftell (FILE *st)
{
return (t_addr)(ftell (st));
}
#endif #endif
uint32 sim_taddr_64 = _SIM_IO_FSEEK_EXT_; uint32 sim_taddr_64 = _SIM_IO_FSEEK_EXT_;

7
sim_fio.h
View file

@ -23,6 +23,8 @@
be used in advertising or otherwise to promote the sale, use or other dealings be used in advertising or otherwise to promote the sale, use or other dealings
in this Software without prior written authorization from Robert M Supnik. in this Software without prior written authorization from Robert M Supnik.
02-Feb-11 MP Added sim_fsize_ex and sim_fsize_name_ex returning t_addr
Added export of sim_buf_copy_swapped and sim_buf_swap_data
15-May-06 RMS Added sim_fsize_name 15-May-06 RMS Added sim_fsize_name
16-Aug-05 RMS Fixed C++ declaration and cast problems 16-Aug-05 RMS Fixed C++ declaration and cast problems
02-Jan-04 RMS Split out from SCP 02-Jan-04 RMS Split out from SCP
@ -42,5 +44,10 @@ size_t sim_fread (void *bptr, size_t size, size_t count, FILE *fptr);
size_t sim_fwrite (void *bptr, size_t size, size_t count, FILE *fptr); size_t sim_fwrite (void *bptr, size_t size, size_t count, FILE *fptr);
uint32 sim_fsize (FILE *fptr); uint32 sim_fsize (FILE *fptr);
uint32 sim_fsize_name (char *fname); uint32 sim_fsize_name (char *fname);
t_addr sim_fsize_ex (FILE *fptr);
t_addr sim_fsize_name_ex (char *fname);
void sim_buf_swap_data (void *bptr, size_t size, size_t count);
void sim_buf_copy_swapped (void *dptr, void *bptr, size_t size, size_t count);
#endif #endif

855
sim_tape.c
View file

File diff suppressed because it is too large Load diff

40
sim_tape.h
View file

@ -23,6 +23,7 @@
used in advertising or otherwise to promote the sale, use or other dealings used in advertising or otherwise to promote the sale, use or other dealings
in this Software without prior written authorization from Robert M Supnik. in this Software without prior written authorization from Robert M Supnik.
05-Feb-11 MP Add Asynch I/O support
30-Aug-06 JDB Added erase gap support 30-Aug-06 JDB Added erase gap support
14-Feb-06 RMS Added variable tape capacity 14-Feb-06 RMS Added variable tape capacity
17-Dec-05 RMS Added write support for Paul Pierce 7b format 17-Dec-05 RMS Added write support for Paul Pierce 7b format
@ -91,6 +92,14 @@ typedef uint16 t_tpclnt; /* magtape rec lnt */
#define MT_TST_PNU(u) ((u)->flags & MTUF_PNU) #define MT_TST_PNU(u) ((u)->flags & MTUF_PNU)
#define MT_GET_FMT(u) (((u)->flags >> MTUF_V_FMT) & MTUF_M_FMT) #define MT_GET_FMT(u) (((u)->flags >> MTUF_V_FMT) & MTUF_M_FMT)
/* sim_tape_position Position Flags */
#define MTPOS_V_REW 3
#define MTPOS_M_REW (1u << MTPOS_V_REW) /* Rewind First */
#define MTPOS_V_REV 2
#define MTPOS_M_REV (1u << MTPOS_V_REV) /* Reverse Direction */
#define MTPOS_V_OBJ 1
#define MTPOS_M_OBJ (1u << MTPOS_V_OBJ) /* Objects vs Records/Files */
/* Return status codes */ /* Return status codes */
#define MTSE_OK 0 /* no error */ #define MTSE_OK 0 /* no error */
@ -104,19 +113,47 @@ typedef uint16 t_tpclnt; /* magtape rec lnt */
#define MTSE_RECE 8 /* error in record */ #define MTSE_RECE 8 /* error in record */
#define MTSE_WRP 9 /* write protected */ #define MTSE_WRP 9 /* write protected */
typedef void (*TAPE_PCALLBACK)(UNIT *unit, t_stat status);
/* Prototypes */ /* Prototypes */
t_stat sim_tape_attach_ex (UNIT *uptr, char *cptr, uint32 dbit);
t_stat sim_tape_attach (UNIT *uptr, char *cptr); t_stat sim_tape_attach (UNIT *uptr, char *cptr);
t_stat sim_tape_detach (UNIT *uptr); t_stat sim_tape_detach (UNIT *uptr);
t_stat sim_tape_rdrecf (UNIT *uptr, uint8 *buf, t_mtrlnt *bc, t_mtrlnt max); t_stat sim_tape_rdrecf (UNIT *uptr, uint8 *buf, t_mtrlnt *bc, t_mtrlnt max);
t_stat sim_tape_rdrecf_a (UNIT *uptr, uint8 *buf, t_mtrlnt *bc, t_mtrlnt max, TAPE_PCALLBACK callback);
t_stat sim_tape_rdrecr (UNIT *uptr, uint8 *buf, t_mtrlnt *bc, t_mtrlnt max); t_stat sim_tape_rdrecr (UNIT *uptr, uint8 *buf, t_mtrlnt *bc, t_mtrlnt max);
t_stat sim_tape_rdrecr_a (UNIT *uptr, uint8 *buf, t_mtrlnt *bc, t_mtrlnt max, TAPE_PCALLBACK callback);
t_stat sim_tape_wrrecf (UNIT *uptr, uint8 *buf, t_mtrlnt bc); t_stat sim_tape_wrrecf (UNIT *uptr, uint8 *buf, t_mtrlnt bc);
t_stat sim_tape_wrrecf_a (UNIT *uptr, uint8 *buf, t_mtrlnt bc, TAPE_PCALLBACK callback);
t_stat sim_tape_wrtmk (UNIT *uptr); t_stat sim_tape_wrtmk (UNIT *uptr);
t_stat sim_tape_wrtmk_a (UNIT *uptr, TAPE_PCALLBACK callback);
t_stat sim_tape_wreom (UNIT *uptr); t_stat sim_tape_wreom (UNIT *uptr);
t_stat sim_tape_wreom_a (UNIT *uptr, TAPE_PCALLBACK callback);
t_stat sim_tape_wreomrw (UNIT *uptr);
t_stat sim_tape_wreomrw_a (UNIT *uptr, TAPE_PCALLBACK callback);
t_stat sim_tape_wrgap (UNIT *uptr, uint32 gaplen, uint32 bpi); t_stat sim_tape_wrgap (UNIT *uptr, uint32 gaplen, uint32 bpi);
t_stat sim_tape_wrgap_a (UNIT *uptr, uint32 gaplen, uint32 bpi, TAPE_PCALLBACK callback);
t_stat sim_tape_sprecf (UNIT *uptr, t_mtrlnt *bc); t_stat sim_tape_sprecf (UNIT *uptr, t_mtrlnt *bc);
t_stat sim_tape_sprecf_a (UNIT *uptr, t_mtrlnt *bc, TAPE_PCALLBACK callback);
t_stat sim_tape_sprecsf (UNIT *uptr, uint32 count, uint32 *skipped);
t_stat sim_tape_sprecsf_a (UNIT *uptr, uint32 count, uint32 *skipped, TAPE_PCALLBACK callback);
t_stat sim_tape_spfilef (UNIT *uptr, uint32 count, uint32 *skipped);
t_stat sim_tape_spfilef_a (UNIT *uptr, uint32 count, uint32 *skipped, TAPE_PCALLBACK callback);
t_stat sim_tape_spfilebyrecf (UNIT *uptr, uint32 count, uint32 *skipped, uint32 *recsskipped);
t_stat sim_tape_spfilebyrecf_a (UNIT *uptr, uint32 count, uint32 *skipped, uint32 *recsskipped, TAPE_PCALLBACK callback);
t_stat sim_tape_sprecr (UNIT *uptr, t_mtrlnt *bc); t_stat sim_tape_sprecr (UNIT *uptr, t_mtrlnt *bc);
t_stat sim_tape_sprecr_a (UNIT *uptr, t_mtrlnt *bc, TAPE_PCALLBACK callback);
t_stat sim_tape_sprecsr (UNIT *uptr, uint32 count, uint32 *skipped);
t_stat sim_tape_sprecsr_a (UNIT *uptr, uint32 count, uint32 *skipped, TAPE_PCALLBACK callback);
t_stat sim_tape_spfiler (UNIT *uptr, uint32 count, uint32 *skipped);
t_stat sim_tape_spfiler_a (UNIT *uptr, uint32 count, uint32 *skipped, TAPE_PCALLBACK callback);
t_stat sim_tape_spfilebyrecr (UNIT *uptr, uint32 count, uint32 *skipped, uint32 *recsskipped);
t_stat sim_tape_spfilebyrecr_a (UNIT *uptr, uint32 count, uint32 *skipped, uint32 *recsskipped, TAPE_PCALLBACK callback);
t_stat sim_tape_rewind (UNIT *uptr); t_stat sim_tape_rewind (UNIT *uptr);
t_stat sim_tape_rewind_a (UNIT *uptr, TAPE_PCALLBACK callback);
t_stat sim_tape_position (UNIT *uptr, uint8 flags, uint32 recs, uint32 *recskipped, uint32 files, uint32 *fileskipped, uint32 *objectsskipped);
t_stat sim_tape_position_a (UNIT *uptr, uint8 flags, uint32 recs, uint32 *recsskipped, uint32 files, uint32 *filesskipped, uint32 *objectsskipped, TAPE_PCALLBACK callback);
t_stat sim_tape_reset (UNIT *uptr); t_stat sim_tape_reset (UNIT *uptr);
t_bool sim_tape_bot (UNIT *uptr); t_bool sim_tape_bot (UNIT *uptr);
t_bool sim_tape_wrp (UNIT *uptr); t_bool sim_tape_wrp (UNIT *uptr);
@ -125,5 +162,8 @@ t_stat sim_tape_set_fmt (UNIT *uptr, int32 val, char *cptr, void *desc);
t_stat sim_tape_show_fmt (FILE *st, UNIT *uptr, int32 val, void *desc); t_stat sim_tape_show_fmt (FILE *st, UNIT *uptr, int32 val, void *desc);
t_stat sim_tape_set_capac (UNIT *uptr, int32 val, char *cptr, void *desc); t_stat sim_tape_set_capac (UNIT *uptr, int32 val, char *cptr, void *desc);
t_stat sim_tape_show_capac (FILE *st, UNIT *uptr, int32 val, void *desc); t_stat sim_tape_show_capac (FILE *st, UNIT *uptr, int32 val, void *desc);
t_stat sim_tape_set_asynch (UNIT *uptr, int latency);
t_stat sim_tape_clr_asynch (UNIT *uptr);
void sim_tape_data_trace (UNIT *uptr, const uint8 *data, size_t len, const char* txt, int detail, uint32 reason);
#endif #endif

117
sim_timer.c
View file

@ -23,6 +23,7 @@
used in advertising or otherwise to promote the sale, use or other dealings used in advertising or otherwise to promote the sale, use or other dealings
in this Software without prior written authorization from Robert M Supnik. in this Software without prior written authorization from Robert M Supnik.
05-Jan-11 MP Added Asynch I/O support
29-Dec-10 MP Fixed clock resolution determination for Unix platforms 29-Dec-10 MP Fixed clock resolution determination for Unix platforms
22-Sep-08 RMS Added "stability threshold" for idle routine 22-Sep-08 RMS Added "stability threshold" for idle routine
27-May-08 RMS Fixed bug in Linux idle routines (from Walter Mueller) 27-May-08 RMS Fixed bug in Linux idle routines (from Walter Mueller)
@ -52,6 +53,7 @@
#include <ctype.h> #include <ctype.h>
t_bool sim_idle_enab = FALSE; /* global flag */ t_bool sim_idle_enab = FALSE; /* global flag */
t_bool sim_idle_wait = FALSE; /* global flag */
static uint32 sim_idle_rate_ms = 0; static uint32 sim_idle_rate_ms = 0;
static uint32 sim_idle_stable = SIM_IDLE_STDFLT; static uint32 sim_idle_stable = SIM_IDLE_STDFLT;
@ -77,6 +79,11 @@ UNIT sim_throt_unit = { UDATA (&sim_throt_svc, 0, 0) };
#if defined (__VAX) #if defined (__VAX)
#define sys$gettim SYS$GETTIM #define sys$gettim SYS$GETTIM
#define sys$setimr SYS$SETIMR
#define lib$emul LIB$EMUL
#define sys$waitfr SYS$WAITFR
#define lib$subx LIB$SUBX
#define lib$ediv LIB$EDIV
#endif #endif
#include <starlet.h> #include <starlet.h>
@ -139,10 +146,30 @@ sys$waitfr (2);
return sim_os_msec () - stime; return sim_os_msec () - stime;
} }
/* Win32 routines */ #if defined(SIM_ASYNCH_IO)
#ifndef CLOCK_REALTIME
#define CLOCK_REALTIME 1
int clock_gettime(int clk_id, struct timespec *tp)
{
uint32 secs, ns, tod[2], unixbase[2] = {0xd53e8000, 0x019db1de};
if (clk_id != CLOCK_REALTIME)
return -1;
sys$gettim (tod); /* time 0.1usec */
lib$subx(tod, unixbase, tod); /* convert to unix base */
lib$ediv(&10000000, tod, &secs, &ns); /* isolate seconds & 100ns parts */
tp->tv_sec = secs;
tp->tv_nsec = ns*100;
return 0;
}
#endif /* CLOCK_REALTIME */
#endif /* SIM_ASYNCH_IO */
#elif defined (_WIN32) #elif defined (_WIN32)
/* Win32 routines */
#include <windows.h> #include <windows.h>
const t_bool rtc_avail = TRUE; const t_bool rtc_avail = TRUE;
@ -193,10 +220,26 @@ Sleep (msec);
return sim_os_msec () - stime; return sim_os_msec () - stime;
} }
/* OS/2 routines, from Bruce Ray */ #if !defined(CLOCK_REALTIME) && defined (SIM_ASYNCH_IO)
#define CLOCK_REALTIME 1
int clock_gettime(int clk_id, struct timespec *tp)
{
t_uint64 now, unixbase;
unixbase = 116444736;
unixbase *= 1000000000;
GetSystemTimeAsFileTime((FILETIME*)&now);
now -= unixbase;
tp->tv_sec = (long)(now/10000000);
tp->tv_nsec = (now%10000000)*100;
return 0;
}
#endif
#elif defined (__OS2__) #elif defined (__OS2__)
/* OS/2 routines, from Bruce Ray */
const t_bool rtc_avail = FALSE; const t_bool rtc_avail = FALSE;
uint32 sim_os_msec () uint32 sim_os_msec ()
@ -267,6 +310,22 @@ treq.tv_nsec = (milliseconds % MILLIS_PER_SEC) * NANOS_PER_MILLI;
return sim_os_msec () - stime; return sim_os_msec () - stime;
} }
#if !defined(CLOCK_REALTIME) && defined (SIM_ASYNCH_IO)
#define CLOCK_REALTIME 1
int clock_gettime(int clk_id, struct timespec *tp)
{
struct timeval cur;
struct timezone foo;
if (clk_id != CLOCK_REALTIME)
return -1;
gettimeofday (&cur, &foo);
tp->tv_sec = cur.tv_sec;
tp->tv_nsec = cur.tv_usec*1000;
return 0;
}
#endif
#else #else
/* UNIX routines */ /* UNIX routines */
@ -312,6 +371,24 @@ if (tim > SIM_IDLE_MAX)
tim = 0; tim = 0;
return tim; return tim;
} }
#if !defined(_POSIX_SOURCE) && defined(SIM_ASYNCH_IO)
#ifndef CLOCK_REALTIME
#define CLOCK_REALTIME 1
typedef int clockid_t;
int clock_gettime(clockid_t clk_id, struct timespec *tp)
{
struct timeval cur;
struct timezone foo;
if (clk_id != CLOCK_REALTIME)
return -1;
gettimeofday (&cur, &foo);
tp->tv_sec = cur.tv_sec;
tp->tv_nsec = cur.tv_usec*1000;
return 0;
}
#endif /* CLOCK_REALTIME */
#endif /* !defined(_POSIX_SOURCE) && defined(SIM_ASYNCH_IO) */
uint32 sim_os_ms_sleep (unsigned int milliseconds) uint32 sim_os_ms_sleep (unsigned int milliseconds)
{ {
@ -326,6 +403,31 @@ return sim_os_msec () - stime;
#endif #endif
#if defined(SIM_ASYNCH_IO)
uint32 sim_idle_ms_sleep (unsigned int msec)
{
uint32 start_time = sim_os_msec();
struct timespec done_time;
clock_gettime(CLOCK_REALTIME, &done_time);
done_time.tv_sec += (msec/1000);
done_time.tv_nsec += 1000000*(msec%1000);
if (done_time.tv_nsec > 1000000000) {
done_time.tv_sec += 1;
done_time.tv_nsec = done_time.tv_nsec%1000000000;
}
pthread_mutex_lock (&sim_asynch_lock);
sim_idle_wait = TRUE;
pthread_cond_timedwait (&sim_asynch_wake, &sim_asynch_lock, &done_time);
sim_idle_wait = FALSE;
pthread_mutex_unlock (&sim_asynch_lock);
return sim_os_msec() - start_time;
}
#define SIM_IDLE_MS_SLEEP sim_idle_ms_sleep
#else
#define SIM_IDLE_MS_SLEEP sim_os_ms_sleep
#endif
/* OS independent clock calibration package */ /* OS independent clock calibration package */
static int32 rtc_ticks[SIM_NTIMERS] = { 0 }; /* ticks */ static int32 rtc_ticks[SIM_NTIMERS] = { 0 }; /* ticks */
@ -407,6 +509,7 @@ if (rtc_based[tmr] <= 0) /* never negative or zer
rtc_based[tmr] = 1; rtc_based[tmr] = 1;
if (rtc_currd[tmr] <= 0) /* never negative or zero! */ if (rtc_currd[tmr] <= 0) /* never negative or zero! */
rtc_currd[tmr] = 1; rtc_currd[tmr] = 1;
AIO_SET_INTERRUPT_LATENCY(rtc_currd[tmr]*ticksper); /* set interrrupt latency */
return rtc_currd[tmr]; return rtc_currd[tmr];
} }
@ -446,7 +549,8 @@ return (sim_idle_rate_ms != 0);
t_bool sim_idle (uint32 tmr, t_bool sin_cyc) t_bool sim_idle (uint32 tmr, t_bool sin_cyc)
{ {
uint32 cyc_ms, w_ms, w_idle, act_ms; static uint32 cyc_ms;
uint32 w_ms, w_idle, act_ms;
int32 act_cyc; int32 act_cyc;
if ((sim_clock_queue == NULL) || /* clock queue empty? */ if ((sim_clock_queue == NULL) || /* clock queue empty? */
@ -456,7 +560,8 @@ if ((sim_clock_queue == NULL) || /* clock queue empty? */
sim_interval = sim_interval - 1; sim_interval = sim_interval - 1;
return FALSE; return FALSE;
} }
cyc_ms = (rtc_currd[tmr] * rtc_hz[tmr]) / 1000; /* cycles per msec */ if (!cyc_ms)
cyc_ms = (rtc_currd[tmr] * rtc_hz[tmr]) / 1000; /* cycles per msec */
if ((sim_idle_rate_ms == 0) || (cyc_ms == 0)) { /* not possible? */ if ((sim_idle_rate_ms == 0) || (cyc_ms == 0)) { /* not possible? */
if (sin_cyc) if (sin_cyc)
sim_interval = sim_interval - 1; sim_interval = sim_interval - 1;
@ -469,11 +574,11 @@ if (w_idle == 0) { /* none? */
sim_interval = sim_interval - 1; sim_interval = sim_interval - 1;
return FALSE; return FALSE;
} }
act_ms = sim_os_ms_sleep (w_idle); /* wait */ act_ms = SIM_IDLE_MS_SLEEP (w_ms); /* wait */
act_cyc = act_ms * cyc_ms; act_cyc = act_ms * cyc_ms;
if (sim_interval > act_cyc) if (sim_interval > act_cyc)
sim_interval = sim_interval - act_cyc; sim_interval = sim_interval - act_cyc;
else sim_interval = 1; else sim_interval = 0;
return TRUE; return TRUE;
} }

90
swtp/swtp_cpu.c
View file

@ -161,7 +161,7 @@ address is here, 'nulldev' means no device is available
*/ */
struct idev { struct idev {
int32 (*routine)(); int32 (*routine)(int32, int32);
}; };
struct idev dev_table[32] = { struct idev dev_table[32] = {
@ -405,7 +405,7 @@ int32 sim_instr (void)
} }
*/ */
IR = OP = mem_get_byte(PC); /* fetch instruction */ IR = OP = mem_get_byte(PC); /* fetch instruction */
PC = ++PC & ADDRMASK; /* increment PC */ PC = (PC + 1) & ADDRMASK; /* increment PC */
sim_interval--; sim_interval--;
/* The Big Instruction Decode Switch */ /* The Big Instruction Decode Switch */
@ -421,11 +421,11 @@ int32 sim_instr (void)
A = get_psw(); A = get_psw();
break; break;
case 0x08: /* INX */ case 0x08: /* INX */
IX = ++IX & ADDRMASK; IX = (IX + 1) & ADDRMASK;
condevalZ(IX); condevalZ(IX);
break; break;
case 0x09: /* DEX */ case 0x09: /* DEX */
IX = --IX & ADDRMASK; IX = (IX + 1) & ADDRMASK;
condevalZ(IX); condevalZ(IX);
break; break;
case 0x0A: /* CLV */ case 0x0A: /* CLV */
@ -558,60 +558,60 @@ int32 sim_instr (void)
IX = (SP + 1) & ADDRMASK; IX = (SP + 1) & ADDRMASK;
break; break;
case 0x31: /* INS */ case 0x31: /* INS */
SP = ++SP & ADDRMASK; SP = (SP + 1) & ADDRMASK;
break; break;
case 0x32: /* PUL A */ case 0x32: /* PUL A */
SP = ++SP & ADDRMASK; SP = (SP + 1) & ADDRMASK;
A = mem_get_byte(SP); A = mem_get_byte(SP);
break; break;
case 0x33: /* PUL B */ case 0x33: /* PUL B */
SP = ++SP & ADDRMASK; SP = (SP + 1) & ADDRMASK;
B = mem_get_byte(SP); B = mem_get_byte(SP);
break; break;
case 0x34: /* DES */ case 0x34: /* DES */
SP = --SP & ADDRMASK; SP = (SP - 1) & ADDRMASK;
break; break;
case 0x35: /* TXS */ case 0x35: /* TXS */
SP = (IX - 1) & ADDRMASK; SP = (IX - 1) & ADDRMASK;
break; break;
case 0x36: /* PSH A */ case 0x36: /* PSH A */
mem_put_byte(SP, A); mem_put_byte(SP, A);
SP = --SP & ADDRMASK; SP = (SP - 1) & ADDRMASK;
break; break;
case 0x37: /* PSH B */ case 0x37: /* PSH B */
mem_put_byte(SP, B); mem_put_byte(SP, B);
SP = --SP & ADDRMASK; SP = (SP - 1) & ADDRMASK;
break; break;
case 0x39: /* RTS */ case 0x39: /* RTS */
SP = ++SP & ADDRMASK; SP = (SP + 1) & ADDRMASK;
PC = mem_get_word(SP) & ADDRMASK; PC = mem_get_word(SP) & ADDRMASK;
SP = ++SP & ADDRMASK; SP = (SP + 1) & ADDRMASK;
break; break;
case 0x3B: /* RTI */ case 0x3B: /* RTI */
SP = ++SP & ADDRMASK; SP = (SP + 1) & ADDRMASK;
set_psw(mem_get_byte(SP)); set_psw(mem_get_byte(SP));
SP = ++SP & ADDRMASK; SP = (SP + 1) & ADDRMASK;
B = mem_get_byte(SP); B = mem_get_byte(SP);
SP = ++SP & ADDRMASK; SP = (SP + 1) & ADDRMASK;
A = mem_get_byte(SP); A = mem_get_byte(SP);
SP = ++SP & ADDRMASK; SP = (SP + 1) & ADDRMASK;
IX = mem_get_word(SP); IX = mem_get_word(SP);
SP = (SP += 2) & ADDRMASK; SP = (SP + 2) & ADDRMASK;
PC = mem_get_word(SP) & ADDRMASK; PC = mem_get_word(SP) & ADDRMASK;
SP = ++SP & ADDRMASK; SP = (SP + 1) & ADDRMASK;
break; break;
case 0x3E: /* WAI */ case 0x3E: /* WAI */
SP = --SP & ADDRMASK; SP = (SP - 1) & ADDRMASK;
mem_put_word(SP, PC); mem_put_word(SP, PC);
SP = (SP -= 2) & ADDRMASK; SP = (SP - 2) & ADDRMASK;
mem_put_word(SP, IX); mem_put_word(SP, IX);
SP = --SP & ADDRMASK; SP = (SP - 1) & ADDRMASK;
mem_put_byte(SP, A); mem_put_byte(SP, A);
SP = --SP & ADDRMASK; SP = (SP - 1) & ADDRMASK;
mem_put_byte(SP, B); mem_put_byte(SP, B);
SP = --SP & ADDRMASK; SP = (SP - 1) & ADDRMASK;
mem_put_byte(SP, get_psw()); mem_put_byte(SP, get_psw());
SP = --SP & ADDRMASK; SP = (SP - 1) & ADDRMASK;
if (I) { if (I) {
reason = STOP_HALT; reason = STOP_HALT;
continue; continue;
@ -621,17 +621,17 @@ int32 sim_instr (void)
} }
break; break;
case 0x3F: /* SWI */ case 0x3F: /* SWI */
SP = --SP & ADDRMASK; SP = (SP - 1) & ADDRMASK;
mem_put_word(SP, PC); mem_put_word(SP, PC);
SP = (SP -= 2) & ADDRMASK; SP = (SP - 2) & ADDRMASK;
mem_put_word(SP, IX); mem_put_word(SP, IX);
SP = --SP & ADDRMASK; SP = (SP - 1) & ADDRMASK;
mem_put_byte(SP, A); mem_put_byte(SP, A);
SP = --SP & ADDRMASK; SP = (SP - 1) & ADDRMASK;
mem_put_byte(SP, B); mem_put_byte(SP, B);
SP = --SP & ADDRMASK; SP = (SP - 1) & ADDRMASK;
mem_put_byte(SP, get_psw()); mem_put_byte(SP, get_psw());
SP = --SP & ADDRMASK; SP = (SP - 1) & ADDRMASK;
I = 0x10000; I = 0x10000;
PC = mem_get_word(0xFFFB) & ADDRMASK; PC = mem_get_word(0xFFFB) & ADDRMASK;
break; break;
@ -720,7 +720,7 @@ int32 sim_instr (void)
V = 0; V = 0;
if (A == 0x80) if (A == 0x80)
V = 0x10000; V = 0x10000;
A = --A & 0xFF; A = (A - 1) & 0xFF;
condevalN(A); condevalN(A);
condevalZ(A); condevalZ(A);
break; break;
@ -728,7 +728,7 @@ int32 sim_instr (void)
V = 0; V = 0;
if (A == 0x7F) if (A == 0x7F)
V = 0x10000; V = 0x10000;
A = ++A & 0xFF; A = (A + 1) & 0xFF;
condevalN(A); condevalN(A);
condevalZ(A); condevalZ(A);
break; break;
@ -829,7 +829,7 @@ int32 sim_instr (void)
V = 0; V = 0;
if (B == 0x80) if (B == 0x80)
V = 0x10000; V = 0x10000;
B = --B & 0xFF; B = (B - 1) & 0xFF;
condevalN(B); condevalN(B);
condevalZ(B); condevalZ(B);
break; break;
@ -837,7 +837,7 @@ int32 sim_instr (void)
V = 0; V = 0;
if (B == 0x7F) if (B == 0x7F)
V = 0x10000; V = 0x10000;
B = ++B & 0xFF; B = (B + 1) & 0xFF;
condevalN(B); condevalN(B);
condevalZ(B); condevalZ(B);
break; break;
@ -957,7 +957,7 @@ int32 sim_instr (void)
V = 0; V = 0;
if (lo == 0x80) if (lo == 0x80)
V = 0x10000; V = 0x10000;
lo = --lo & 0xFF; lo = (lo - 1) & 0xFF;
mem_put_byte(DAR, lo); mem_put_byte(DAR, lo);
condevalN(lo); condevalN(lo);
condevalZ(lo); condevalZ(lo);
@ -968,7 +968,7 @@ int32 sim_instr (void)
V = 0; V = 0;
if (lo == 0x7F) if (lo == 0x7F)
V = 0x10000; V = 0x10000;
lo = ++lo & 0xFF; lo = (lo + 1) & 0xFF;
mem_put_byte(DAR, lo); mem_put_byte(DAR, lo);
condevalN(lo); condevalN(lo);
condevalZ(lo); condevalZ(lo);
@ -1094,7 +1094,7 @@ int32 sim_instr (void)
V = 0; V = 0;
if (lo == 0x80) if (lo == 0x80)
V = 0x10000; V = 0x10000;
lo = --lo & 0xFF; lo = (lo - 1) & 0xFF;
mem_put_byte(DAR, lo); mem_put_byte(DAR, lo);
condevalN(lo); condevalN(lo);
condevalZ(lo); condevalZ(lo);
@ -1105,7 +1105,7 @@ int32 sim_instr (void)
V = 0; V = 0;
if (lo == 0x7F) if (lo == 0x7F)
V = 0x10000; V = 0x10000;
lo = ++lo & 0xFF; lo = (lo + 1) & 0xFF;
mem_put_byte(DAR, lo); mem_put_byte(DAR, lo);
condevalN(lo); condevalN(lo);
condevalZ(lo); condevalZ(lo);
@ -1215,9 +1215,9 @@ int32 sim_instr (void)
break; break;
case 0x8D: /* BSR rel */ case 0x8D: /* BSR rel */
lo = get_rel_addr(); lo = get_rel_addr();
SP = --SP & ADDRMASK; SP = (SP - 1) & ADDRMASK;
mem_put_word(SP, PC); mem_put_word(SP, PC);
SP = --SP & ADDRMASK; SP = (SP - 1) & ADDRMASK;
PC = PC + lo; PC = PC + lo;
PC &= ADDRMASK; PC &= ADDRMASK;
break; break;
@ -1429,9 +1429,9 @@ int32 sim_instr (void)
break; break;
case 0xAD: /* JSR ind */ case 0xAD: /* JSR ind */
DAR = get_indir_addr(); DAR = get_indir_addr();
SP = --SP & ADDRMASK; SP = (SP - 1) & ADDRMASK;
mem_put_word(SP, PC); mem_put_word(SP, PC);
SP = --SP & ADDRMASK; SP = (SP - 1) & ADDRMASK;
PC = DAR; PC = DAR;
break; break;
case 0xAE: /* LDS ind */ case 0xAE: /* LDS ind */
@ -1542,9 +1542,9 @@ int32 sim_instr (void)
break; break;
case 0xBD: /* JSR ext */ case 0xBD: /* JSR ext */
DAR = get_ext_addr(); DAR = get_ext_addr();
SP = --SP & ADDRMASK; SP = (SP - 1) & ADDRMASK;
mem_put_word(SP, PC); mem_put_word(SP, PC);
SP = --SP & ADDRMASK; SP = (SP - 1) & ADDRMASK;
PC = DAR; PC = DAR;
break; break;
case 0xBE: /* LDS ext */ case 0xBE: /* LDS ext */
@ -2010,7 +2010,7 @@ int32 get_dir_addr()
int32 temp; int32 temp;
temp = mem_get_byte(PC); temp = mem_get_byte(PC);
PC = ++PC & ADDRMASK; PC = (PC + 1) & ADDRMASK;
return temp & 0xFF; return temp & 0xFF;
} }

2
swtp/swtp_defs.h
View file

@ -27,7 +27,7 @@ Copyright (c) 2005, 2007, William Beech
*/ */
#include "../sim_defs.h" // simulator defs #include "sim_defs.h" // simulator defs
/* Memory */ /* Memory */

2
swtp/swtp_dsk.c
View file

@ -408,7 +408,7 @@ int32 fdccmd(int32 io, int32 data)
#endif #endif
break; break;
default: default:
printf("Unknown FDC command %02H\n\r", data); printf("Unknown FDC command %02X\n\r", data);
} }
} else { /* read status from fdc */ } else { /* read status from fdc */
val = cur_flg[cur_dsk]; /* set return value */ val = cur_flg[cur_dsk]; /* set return value */

12
swtp/swtp_sio.c
View file

@ -114,7 +114,7 @@ int32 ptp_flag = 0, ptr_flag = 0;
/* console input service routine */ /* console input service routine */
int32 sio_svc (UNIT *uptr) t_stat sio_svc (UNIT *uptr)
{ {
int32 temp; int32 temp;
@ -132,21 +132,21 @@ int32 sio_svc (UNIT *uptr)
/* paper tape reader input service routine */ /* paper tape reader input service routine */
int32 ptr_svc (UNIT *uptr) t_stat ptr_svc (UNIT *uptr)
{ {
return SCPE_OK; return SCPE_OK;
} }
/* paper tape punch output service routine */ /* paper tape punch output service routine */
int32 ptp_svc (UNIT *uptr) t_stat ptp_svc (UNIT *uptr)
{ {
return SCPE_OK; return SCPE_OK;
} }
/* Reset console */ /* Reset console */
int32 sio_reset (DEVICE *dptr) t_stat sio_reset (DEVICE *dptr)
{ {
sio_unit.buf = 0; // Data buffer sio_unit.buf = 0; // Data buffer
sio_unit.u3 = 0x02; // Status buffer sio_unit.u3 = 0x02; // Status buffer
@ -156,7 +156,7 @@ int32 sio_reset (DEVICE *dptr)
/* Reset paper tape reader */ /* Reset paper tape reader */
int32 ptr_reset (DEVICE *dptr) t_stat ptr_reset (DEVICE *dptr)
{ {
ptr_unit.buf = 0; ptr_unit.buf = 0;
ptr_unit.u3 = 0x02; ptr_unit.u3 = 0x02;
@ -166,7 +166,7 @@ int32 ptr_reset (DEVICE *dptr)
/* Reset paper tape punch */ /* Reset paper tape punch */
int32 ptp_reset (DEVICE *dptr) t_stat ptp_reset (DEVICE *dptr)
{ {
ptp_unit.buf = 0; ptp_unit.buf = 0;
ptp_unit.u3 = 0x02; ptp_unit.u3 = 0x02;