Commit graph

25 commits

Author SHA1 Message Date
Derek Peschel
cc97971dc9 TX-0: Make ^E work in readin mode.
sim_instr does not completely follow the outline in the SIMH v3
developer docs. It does not decrease sim_interval in readin mode.
Fixing this, I cleaned up some other things:

- Move the decrease of sim_interval to after the check for breakpoints,
  but before the check for ios. This ensures that sim_interval will
  decrease any time an instruction executes in normal mode, or readin
  mode executes, or ios is set and the CPU is waiting for ios to clear.
  (Except the CPU should be clearing ios itself, not waiting for ios to
  clear, but that fix requires a complete redesign of the I/O routines
  and belongs in another branch.)
- Correctly handle all four combinations of mod_tst and mod_rdin.
- When changing from readin mode to normal mode, if cpu_set_mode returns
  an error, stop with the same error. If cpu_set_mode returns SCPE_OK,
  either stop or continue execution, depending on the word read from tape.
- In petr_boot and in the readin mode code in sim_instr, if the
  PETR is not attached to a file, return SCPE_UNATT. Never try to read
  from an unattached unit; I believe this reads standard input and
  prevents ^E from working.

Overall control structure inside the while (reason == 0) loop:

- When stopping due to an error, break out of the while loop where
  possible.
- After handling "ios is set", continue, don't run readin/test/normal-
  mode code.
- After handling one readin operation, if the code didn't break out
  of the while loop, continue, don't run normal-mode code.
2023-10-09 20:17:13 -04:00
Derek Peschel
0ca09194fa Before, when the simulator decoded pad, it handled pad without cry
and pad with cry. When it decoded cry, it printed a "TO DO" message.

http://bitsavers.org/pdf/mit/tx-0/memos/M-5001-19_macros_Apr60.pdf
derives a simple algorithm for cry. Implement that, remove the test
for cry from the pad code, and reformat the debug messages.

The same change appears in sim_instr and sim_opr_orig.
2023-10-09 20:16:20 -04:00
Howard M. Harte
b5b8277611 TX-0: Reconcile license with open-simh. 2022-10-09 09:10:26 -07:00
Mark Pizzolato
f0760cc5cb TX0: Silence Coverity issues
Coverity is confusing routines by the same name from different simulators.
Making these routines static should solve the problem.

Also fix un-checked status complaint.
2022-03-18 16:47:33 -07:00
Mark Pizzolato
caee890727 TX-0: Fix Coverity indicated potential memory overrun 2018-05-15 06:49:50 -07:00
Mark Pizzolato
abfb828cb8 tx-0: Fix missing #endif in USE_DISPLAY code block 2018-02-18 11:45:09 -08:00
Phil Budne
b11fbf6cd4 DISPLAY: Update display code to support DEC Type 340, and 36 switches
Only interface code to Type 340 is for Richard Cornwell's KA10
(but could be used on PDP-1/4/7/9 as well)
2018-02-17 14:37:10 -05:00
Mark Pizzolato
68edc24b66 TX-0: Coverity singleton errors
Most history routines defined a local sim_eval of the proper length, but the
erroneous ones were fixed length machines that defined an integer variable
instead of an integer array of length 1. The VAX used the global sim_eval.
The changes follow the VAX practice.
2017-09-08 05:47:36 -07:00
Howard M. Harte
92386549bd TX-0: Address CID 1415866 deadcode error. 2017-03-31 08:12:33 -07:00
Sergey Svishchev
29eaa45c37 TX-0: fix CID: 1415540 "Logically dead code"
Corrected macro definitions to match comments
2017-03-09 18:36:45 -08:00
Mark Pizzolato
5531ccb175 ALL: Massive 'const' cleanup
These changes facilitate more robust parameter type checking and helps
to identify unexpected coding errors.

Most simulators can now also be compiled with a C++ compiler without
warnings.

Additionally, these changes have also been configured to facilitate easier
backporting of simulator and device simulation modules to run under the
simh v3.9+ SCP framework.
2016-05-15 15:25:33 -07:00
Ray Jewhurst
09109d2186 TX-0: Added register descriptions to all devices 2016-04-07 15:40:04 -07:00
Mark Pizzolato
66dba79418 ALPHA, ALTAIR, AltairZ80, I7094, NOVA, PDP1, PDP10, PDP11, PDP18B, PDP8, SAGE, sigma, swtp6800, TX-0, VAX: Change tabs to spaces which had crept in over time 2015-03-30 10:24:24 -07:00
Mark Pizzolato
54a4845fb2 ALL: Revert "ALL: make sure all useful state is in simh registers while processing events"
This reverts commit 5551a0dd9c.

The original idea was that the state being put into simh registers would be required to have all useful information available when remote console executed commands.  These steps were taken from the code that sim_instr() executed as it was exiting.  After this change was made it was realized that once a remote console command executed it might change state that directly affected instruction execution.  To solve this, the logic that executes before the instructions in sim_instr() would then need to be executed whenever the event dispatch processing completed.  This approach is messy, burdensome and potentially a lot of overhead for every event dispatch even though almost none of the event dispatches would be for remote console command execution.  A completely different approach was suggested by J. David Bryan.  That alternative approach would be to have remote console commands execute outside of the sim_instr() routine.  Thus allowing the existing prelude and postlude code in sim_instr() to be performed naturally and let the remote console activities run in the same context as all other simh commands.  Recent changes to scp and sim_console implement this alternative approach and thus these original changes are completely irrelevant and are thus being removed.
2015-02-15 12:42:32 -08:00
Mark Pizzolato
5551a0dd9c ALL: make sure all useful state is in simh registers while processing events 2015-01-15 12:37:07 -08:00
Mark Pizzolato
2e1167d4a0 Compiler suggested cleanups - mostly const fixups 2014-10-26 17:06:24 -07:00
Mark Pizzolato
995ab8f1e2 More General cleanup migrate to using sim_printf vs separate calls to printf and fprintf(sim_log). 2014-10-24 14:37:37 -07:00
Howard M. Harte
de6bf7bc92 Fix simh/simh Issue#21: tx-0 won't build under MinGW compiler
Follow proposal described in issue and change LP register to LPEN.  LP
is still the name of the register when using SIMH to examine or deposit
to this register.
2013-03-19 17:00:50 -07:00
Mark Pizzolato
f7e8024c59 Fix compiler warnings 2013-01-23 05:42:36 -08:00
Mark Pizzolato
448d9e52fc Added VAX860 to the descrip.mms and cleaned up the VMS compiler identified issues 2013-01-10 15:14:51 -08:00
Mark Pizzolato
dac73b9381 Migrating scp and library global variables to be declared as extern in the appropriate library include file and remove repetitive declarations in referencing modules. 2013-01-10 13:29:15 -08:00
Howard M. Harte
8bdc206fea Replace getw/putw with sim_read/sim_write
For endian-neutral behavior use sim_read/sim_write instead of getwand
putw.
2012-11-20 16:33:26 -08:00
Howard M. Harte
dafb61a585 Add TBR register to CPU. 2012-11-20 15:49:05 -08:00
Mark Pizzolato
6cda56650d Fixed compiler identified bugs and warnings. 2012-11-08 06:23:52 -08:00
Howard M. Harte
35ef1c8d24 Initial public version of TX-0 for SIMH
Integrate TX-0 simulation into SIMH.
2012-11-07 20:47:26 -08:00