Most history routines defined a local sim_eval of the proper length, but the
erroneous ones were fixed length machines that defined an integer variable
instead of an integer array of length 1. The VAX used the global sim_eval.
The changes follow the VAX practice.
Most history routines defined a local sim_eval of the proper length, but the
erroneous ones were fixed length machines that defined an integer variable
instead of an integer array of length 1. The VAX used the global sim_eval.
The changes follow the VAX practice.
Part of a previous change introduced logice which used the throttling
execution rate calibrated value to determine clock calibration when
throttling is enabled. This provides significantly worse results than the
normal self correcting calibration process. This commit reverses that
part of the previous change.
Simulators which don't have detailed debugging available on their default
device (usually CPU), automatically have the event debugging options
available. Simulators which have CPU device debugging will have to add
the SIM_DBG_EVENT, SIM_DBG_ACTIVATE and SIM_DBG_AIO_QUEUE to
their debug option list to provide this detailed debugging.
Default behavior is to schedule the inter character I/O based on the
TIME (PTP, PTR) and TTIME (TTY) register variables. With default values
here I/O completes very quickly.
A user may influence I/O rate behavior to proceed at a particular character
rate per second by using:
sim> SET CPU CPS=nnn
or equivalently:
sim> SET CPS=nnn
The resulting I/O completion rate will be independent of host system
processor speed and/or any I/O throttling that may be in effect. The
above commands set the deferred I/O character completion rate for
all devices that do deferred I/O (PTP, PTR and TTY).
Each deferred I/O device can have its particular character delivery rates
specified with one of these commands:
sim> deposit PTP CPS xxx
sim> deposit PTR CPS yyy
sim> deposit TTY CPS zzz
A CPS register value of 0 indicates that the default cycle based delays
specified by TIME (PTP & PTR) and TTIME (TTY) registers will control
character completion rates.
- Default CPS is 50
- Add SET {CPU} CPS=nnn and SHOW {CPU} CPS commands.
Individual device specific rates are changeable and visible as CPS register
in each device.
