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3620 commits 2 branches 0 tags 68 MiB
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120 commits

Author SHA1 Message Date
Peter Schorn
9b71968ada AltairZ80: Use non blocking socket for net device 2020-04-14 19:14:12 +02:00
Peter Schorn
5a293ac4ff AltairZ80: Additional register updates 2020-03-06 15:34:03 -08:00
Mark Pizzolato
2e41007e0d AltairZ80: Adjust REG array descriptors (BRDATA) to provide array object addrs 
No address value are changed, by a pointer the the array object is
explicitly provided which allows validation logic to determine the
size of the array object rather than merely it's first element.
 2020-03-03 07:50:33 -08:00
Peter Schorn
504aad14cf AltairZ80: Update clock register definitions 2020-03-03 02:31:51 -08:00
Mark Pizzolato
e06a5d7821 AltairZ80: Fix spelling in register description 2020-02-26 22:03:01 -08:00
Peter Schorn
6c84387ec0 AltairZ80: Fix error handling of bad IMD disks and sector size computation 2020-02-18 11:55:29 +01:00
Peter Schorn
8198bac160 AltairZ80: Fix Coverity detected issues in s100_tarbell.c 2020-01-30 09:55:05 +01:00
Mark Pizzolato
8a858c181d SCP: Clean up WEAK definition and rework deprecated references to sim_vm_init 
As discussed in #794
 2020-01-29 12:30:25 -08:00
Patrick Linstruth
020bf31457 AltairZ80: Adjust head unload timer usec value for SIO sleep/no sleep setting. 
AltairZ80: Properly use sim timer support routines.
 2019-12-19 21:45:55 -08:00
Patrick Linstruth
e261a2fa28 AltairZ80: Properly set current Tarbell drive and drive not ready flag on reset 2019-12-10 21:21:30 -08:00
Peter Schorn
17356d9093 AltairZ80: Replace WIN32 dependencies with SIMH API calls and remove redundant includes 2019-12-10 08:42:22 +01:00
Patrick Linstruth
dde74c25b4 Fixed -Wall warnings 
Corrected name in comment block
 2019-12-08 22:08:13 -08:00
Patrick Linstruth
5a3a535437 Updated top comment block 2019-12-07 20:12:51 -08:00
Patrick Linstruth
5b761735f7 Fix Windows compiler warnings / errors 2019-12-07 20:08:12 -08:00
Patrick Linstruth
8dabce41b9 Remove #include <windows.h> #ifdef 2019-12-07 17:20:46 -08:00
Patrick Linstruth
357e72bf93 Removed unused TARBELL_DRIVE_STATUS struct 2019-12-06 10:20:44 -08:00
Patrick Linstruth
90f164d06f Created a separate FD1771_REG for each drive (UNIT) 2019-12-05 20:06:13 -08:00
Patrick Linstruth
91b6807499 Added head load/unload with unload timer 2019-12-05 19:40:29 -08:00
Patrick Linstruth
6efda7cbea Clean up DBG_PRING and sim_debug messages. 2019-12-05 17:02:27 -08:00
Patrick Linstruth
d205582e9e Add Tarbell SSSD disk controller 2019-12-05 16:00:35 -08:00
Peter Schorn
c1d9db8be7 AltairZ80: Remove old documentation and replace with current 2019-07-18 20:45:59 +02:00
Mark Pizzolato
0b9cfa9b4d AltairZ80: Fix potential buffer overrun compiler warnings 2019-07-16 05:08:37 -07:00
Peter Schorn
ddb4cb4661 AltairZ80: Fix issue detected by Coverity (unchecked sim_fseek in n8vem.c) 2019-03-24 21:51:26 +01:00
Peter Schorn
86114729de AltairZ80: Make WD179X device more robust and fix Coverity issue 2019-02-23 13:22:52 +01:00
Peter Schorn
52817a58b9 AltairZ80: Fixed hard disk device boot 2019-02-09 17:44:23 +01:00
Peter Schorn
1b7d77e03b AltairZ80: Replaced assert() with ASSURE() for error checking at run time 2018-08-11 09:48:55 +02:00
Peter Schorn
8077d4de38 AltairZ80: Clean up of source code formatting 2018-06-17 08:37:08 +02:00
Peter Schorn
221d72f057 AltairZ80: Fixed integer type issue in mfdc.c 2018-06-01 07:10:57 +02:00
Peter Schorn
b3136d2d6d AltairZ80: Replaced platform specific directory scanning with SCP API (update 2) 2018-05-19 15:53:42 +02:00
Tony Nicholson
ceb54e5ff7 AltairZ80: Set conditional under CYGWIN so the SIMH device works 
Under CYGWIN the conditional tests in the altairz80_sio.c source file for the
SIMH pseudo device's getHostsFilenamesCmd and resetSIMHInterfaceCmd
functions need to have UNIX_PLATFORM set to 1 - otherwise they do nothing!
With this fix, the HDIR host command from CP/M now displays a list of files
in host system's current directory under CYGWIN.
 2018-03-23 15:25:59 -07:00
Mark Pizzolato
760e7f2810 SCP: stop_cpu and sim_is_running variables t_bool 2018-02-02 05:02:27 -08:00
Peter Schorn
6a180c3dfc AltairZ80: Removed unneeded definition of strcasecmp 2017-05-02 20:44:36 +02:00
Peter Schorn
e9dea63b50 AltairZ80: Further fall through comment 2017-05-02 18:24:00 +02:00
Peter Schorn
7a46fcf17c AltairZ80: Clean up of fall through comments 2017-04-29 08:13:24 +02:00
Peter Schorn
17903827bd AltairZ80: Mark Coverity false positives in rotate operations 2017-04-01 08:48:43 +02:00
Peter Schorn
9f746cfefa AltairZ80: Improved diskClose error handling (Coverity Scan) 2017-03-14 18:12:27 +01:00
Peter Schorn
30556c8d78 AltairZ80: Fix uninitialized variable (Coverity Scan) 2017-03-13 21:59:37 +01:00
Peter Schorn
bd575651ca AltairZ80: More fixes from source code scan (Coverity Scan) 2017-03-12 18:21:07 +01:00
Peter Schorn
70a8921a7a AltairZ80: Fix various static source scanning detected issues (Coverity Scan) 2017-03-12 12:06:05 +01:00
Sergey Svishchev
e49f06dcc3 AltairZ80: fix out-of-bounds accesses (Coverity Scan) 2017-03-11 23:48:03 -08:00
Mark Pizzolato
d8dbc7e6b5 SCP: Migrate all stdio writes to pass through SCP provided Fprintf() 2017-01-14 20:48:09 -08:00
Peter Schorn
a2d900e62b AltairZ80: Implemented proper memory refresh register R semantics 2016-12-17 12:24:12 +01:00
Peter Schorn
dc2bbe5a40 AltairZ80: Updated 8080/Z80 CPU for new breakpoint package 2016-08-31 17:39:04 +02:00
Peter Schorn
9d2b7ee968 AltairZ80: Fixed NUM_CHIP_TYPE warning and added missing declaration 2016-05-23 13:26:17 -07:00
Mark Pizzolato
5531ccb175 ALL: Massive 'const' cleanup 
These changes facilitate more robust parameter type checking and helps
to identify unexpected coding errors.

Most simulators can now also be compiled with a C++ compiler without
warnings.

Additionally, these changes have also been configured to facilitate easier
backporting of simulator and device simulation modules to run under the
simh v3.9+ SCP framework.
 2016-05-15 15:25:33 -07:00
Peter Schorn
60a8a2d43d AltairZ80: Fixed device descriptions for all devices. 2016-05-15 14:44:09 -07:00
Mike Douglas
7a231a2cf9 AltairZ80: Add support for North Star single density controller 
The first disk controller made by North Star was a single density
controller (MDSA). This was followed by the double density controller
(MDSAD) that is already supported in SIMH. This update adds support for
the single density controller as device MDSA. Since the controllers are
not software compatible, this update allows running of older software
designed for the MDSA controller.
 2015-12-16 15:39:46 -06:00
Mike Douglas
f3af74e444 AltairZ80: Fix head stepping to only occur on 1 to 0 transitions 
The source file to be updated provides emulation of the North Star DD
floppy disk controller. The proposed change steps the head only when the
step bit in the order byte transitions from 1 to 0. This is the way the
actual hardware functions. Previously, the emulation would step any time
an order was issued and the step bit was 1. This behavior caused some
original software (e.g., Lifeboat CP/M 2.2) to end up on an incorrect
track.
 2015-08-08 21:27:09 -05:00
Peter Schorn
bb39ce97c7 AltairZ80: Better comparison operator to remove warning message 2015-08-08 08:58:24 +02:00
Peter Schorn
a9e5913d0c AltairZ80: Reduced polling for CPU stop on non UNIX platforms 2015-04-26 09:50:00 +02:00