747 commits

Author	SHA1	Message	Date
Folkert van Heusden	6cdff6ef6b	fix for bit instructions	2025-04-07 13:29:19 +02:00
Folkert van Heusden	bef32c5a79	Addressing mode 6	2025-04-07 10:32:44 +02:00
Folkert van Heusden	1731fd7c99	More addressing modes	2025-04-07 10:16:59 +02:00
Folkert van Heusden	68b3761630	More addressing modes	2025-04-07 09:56:19 +02:00
Folkert van Heusden	5b33667e37	more MOV tests	2025-04-07 09:48:22 +02:00
Folkert van Heusden	e142b8a979	a test can now consist of multiple pdp instructions	2025-04-07 09:30:58 +02:00
Folkert van Heusden	6e08a9f749	MOV	2025-04-07 09:05:58 +02:00
Folkert van Heusden	c3545a2f2a	TRAP handling	2025-04-07 07:27:50 +02:00
Folkert van Heusden	9eee7acc94	16b fixes	2025-04-06 23:00:16 +02:00
Folkert van Heusden	15b397aed7	also intercept PWriteB	2025-04-06 22:10:48 +02:00
Folkert van Heusden	6089dedd9d	prevent double entries in mem-write table	2025-04-06 19:53:35 +02:00
Folkert van Heusden	7ea9e4442b	keep track of memory writes	2025-04-06 19:40:07 +02:00
Folkert van Heusden	e409fad0c5	Allow TRAPs to be executed when requested.	2025-04-06 19:07:33 +02:00
Folkert van Heusden	7d68b74113	TRAP test	2025-04-06 19:03:53 +02:00
Folkert van Heusden	640643cb65	fixes vor ADC/SBC & added byte-ode for ADC/SBC	2025-04-06 18:33:58 +02:00
Folkert van Heusden	97aafc5815	fix for emit_bit_instructions	2025-04-06 18:09:46 +02:00
Folkert van Heusden	4b60b47a60	BIC/BIS: also (R1) target	2025-04-06 17:53:24 +02:00
Folkert van Heusden	dd67a2a276	code clean-up	2025-04-06 17:40:51 +02:00
Folkert van Heusden	e8333f3468	JMP/JSR/RTS fix, BPT removed	2025-04-05 15:34:19 +02:00
Folkert van Heusden	4ef5404ee3	bits to ignore	2025-04-05 15:17:27 +02:00
Folkert van Heusden	ec07c5ca38	different PSW values for RTI/BPT/RTT tests	2025-04-05 12:03:19 +02:00
Folkert van Heusden	e61cbf4c6a	test generation fix & misc	2025-04-05 01:32:58 +02:00
Folkert van Heusden	204e6e435c	todo	2025-04-04 23:57:13 +02:00
Folkert van Heusden	bfff919fcc	a single operand instruction has a single operand	2025-04-04 23:51:34 +02:00
Folkert van Heusden	4b508f81ca	todo	2025-04-04 23:17:02 +02:00
Folkert van Heusden	bef06aef86	Using R1 as base register for ASHC is problematic	2025-04-04 23:10:16 +02:00
Folkert van Heusden	854e2e67ce	more tests	2025-04-04 20:45:45 +02:00
Folkert van Heusden	65b3baa73b	would emit more memory than set	2025-04-04 09:42:08 +02:00
Folkert van Heusden	9635fdda03	do not (re-)generate if file exists	2025-04-04 09:08:48 +02:00
Folkert van Heusden	ae0c503054	emit_add_sub also test the two carry values	2025-04-04 09:02:18 +02:00
Folkert van Heusden	524d540a2a	file per set	2025-04-04 08:33:56 +02:00
Folkert van Heusden	732c66eceb	sim_interval would make tests fail	2025-04-04 08:22:22 +02:00
Folkert van Heusden	818e74f3d3	more tests, faster	2025-04-04 08:11:05 +02:00
Folkert van Heusden	5c38023e5e	reduced test count for add/sub	2025-04-04 07:47:09 +02:00
Folkert van Heusden	53b600a39a	branch instructions tweaks	2025-04-04 01:02:24 +02:00
Folkert van Heusden	d8b99a1199	more test sets	2025-04-04 00:42:21 +02:00
Folkert van Heusden	2283367549	test sets	2025-04-04 00:20:11 +02:00
Folkert van Heusden	ed4e54939b	use static rand() seed for reproducability	2025-04-03 23:38:43 +02:00
Folkert van Heusden	c8348bc8fe	make sure to reset everything	2025-04-03 23:37:47 +02:00
Folkert van Heusden	2796bf9e22	work arounds to prevent access to odd addresses or i/o	2025-04-03 23:20:00 +02:00
Folkert van Heusden	9999fd9ea1	skip HALT/WAIT/RESET	2025-04-03 20:46:09 +02:00
Folkert van Heusden	40f2ca866c	memory init fix	2025-04-03 09:28:51 +02:00
Folkert van Heusden	51b18a7956	skip invalid instructions	2025-04-03 09:24:13 +02:00
Folkert van Heusden	1fecfed1f2	after-memory	2025-04-03 09:16:48 +02:00
Folkert van Heusden	bc233e9a5a	include stack	2025-04-03 08:58:31 +02:00
Folkert van Heusden	3671049405	Generate testset using simh	2025-04-03 08:50:59 +02:00
Tony Lawrence	c093bcdcf6	PDP11: RP11: Implement original RP11 controller flavor ... Studying RSX11M source code I found out that the original RP11 controller (vs. -C and -E later versions) was still supported in the software, and notably UMD (User Mode Diagnostics) was still capable of handing it and dealing with its testing, even in much later OS versions (compared to when the original RP11 was phased out). The change in this commit basically implements that flavor (which only supported the RP02 drives), and also makes a few minor fixes / cleanups for the device code, here and there. The default mode for the RP11 controller remains the more widely used -C/-E version, but if so desired, it can be downgraded to support its predecessor with the "SET RR <type>" command now.	2024-09-04 13:39:47 -04:00
Tony Lawrence	c831460ecb	PDP11: Fix to fix disassembly #331 ... As discussed in PR#331, the fix needed more fix with the proper masks array. This patch completes the fix.	2024-07-23 14:25:19 -04:00
Tony Lawrence	100f351575	PDP11: RP11: Interrupt on IE+RESET+GO ... Recent analysis of the 2.9BSD kernel revealed that RP11 was expected to interrupt on control RESET function if IE bit was also set. Documentation was not very clear of the fact, saying in one place that RESET+GO does not interrupt (which is not contradictory with the above because it does not mention IE). In other place, however, it says that IE always causes interrupt when DONE is asserted. Thus, since RESET does assert DONE, an interrupt should be posted if IE is set. The autoconfig binary from 2.9BSD uses this feature of RP11 to check the presence of the controller. Formerly RESET was always clearing RPCS with DONE unconditionally, and that reset IE as well. This patch makes sure that the IE bit is preserved, and if set, it posts an interrupt when RESET asserts DONE.	2024-06-13 21:42:44 -04:00
Tony Lawrence	6a1b5685fd	PDP11: RP11: Make sure to advance DA after every I/O ... It looks like disk controllers, which automatically update disk address (DA) after completion of I/O, are expected to do so even if there was no data transfer because of I/O errors. I was studying RSX-11's Error Logger documentation and examples are clearly offsetting disk addresses backwards by one when I/O errors are reported by the controller. Since once the controller has found the DA-specified sector, the I/O begins regardless of the condition of the sector (bad or good data) or ability to transfer the contents between the disk and the memory. If an error occurs (NXM, for instance) the operation would stop (with the error reported) at the end of the sector. So if, for example, the bus address register had a bad address from the get-go, no data would be able to transfer at all, yet DA should still be updated with DA + 1 once the controller asserts the DONE bit. This patch makes sure that DA is always advanced when I/O has actually been commenced.	2024-02-01 12:56:04 -05:00