Commit graph

5 commits

Author SHA1 Message Date
Mark Pizzolato
5531ccb175 ALL: Massive 'const' cleanup
These changes facilitate more robust parameter type checking and helps
to identify unexpected coding errors.

Most simulators can now also be compiled with a C++ compiler without
warnings.

Additionally, these changes have also been configured to facilitate easier
backporting of simulator and device simulation modules to run under the
simh v3.9+ SCP framework.
2016-05-15 15:25:33 -07:00
Mark Pizzolato
66dba79418 ALPHA, ALTAIR, AltairZ80, I7094, NOVA, PDP1, PDP10, PDP11, PDP18B, PDP8, SAGE, sigma, swtp6800, TX-0, VAX: Change tabs to spaces which had crept in over time 2015-03-30 10:24:24 -07:00
Eric Scharff
af713b78e1 Fix off-by-one in reading cache address from memory
Commit a9ac7c153 properly avoided writing past the end of cache_line,
but in doing so introduced an error as to the first memory address that
should be written. This fix avoids writing past the cache_line by simply
reading the previous memory location.

Fixes the CP/M 68K simulation example and issue #181
2015-01-22 21:58:56 -05:00
Lioncash
a9ac7c1534 SAGE: Fix loop bounds in m68k_cpu
cache_line has a size of CACHE_SIZE (16), so starting at that index will be outside the bounds of the array.
2014-11-26 12:55:55 -05:00
Mark Pizzolato
e2524e7feb Beta Simulators (PDQ-3 and SAGE) from Holger Veit 2014-09-17 17:31:40 -07:00