These include simulators for the IBM 701, IBM 702, IBM 704, IBM 705,
IBM 705/3, IBM 709, IBM 1410/IBM 7010, IBM 7070, IBM 7080, IBM 7090
and IBM7094.
These basically were a collection of machines that shared a common
set it peripherals, Each group had its own instruction set, hence
different simulators.
IBM 701 -> i701
IBM 702/705/705/3/7080 -> i7080
IBM 7070/7074 -> i7070
IBM 1410/7010 -> i7010
IBM 704 -> i704
IBM 704/709/7090/7094 -> i7090
The i7090 can be set to simulate a IBM 704 however you end up
disabling almost everything, since the 704 did not have any channels.
A build option exists that allows this one to be built without all the
extra features.
The i7090 simulator’s implementation of the IBM 7094 is a more
complete implementation of the IBM 7094 which can run CTSS
while the existing simh I7094 can’t.
The 3B2 emulator did not have support for traps, rendering debugging
under the simulator fairly useless. This change adds support for
trap handling. The 'sdb' UNIX debugger under SVR3 should now work
correctly.
If a telnet session sends options just prior to closing a session, the response
traffic might get dropped which isn't a problem, but we need to make sure
that we stop referencing the now invalid line structure after that happens.
- Properly digest all register data when it arrives from register
queries and repeat activities.
- Invoke register callback functon when transitioning to Halt state.
- Add option to access instruction history with sim_panel_get_history
API
- More interesting testing in FrontPanelTest program
- Reworked STEP, HALT, BOOT, and RUN API's to properly interlock with
the receive thread.
- Shorten destroy delay while debugging to 1 second.
- Allow execution and text breakpoints to be set and/or cleared while
simulator is running.
Two critical issues are fixed with this commit:
1. The MMU cache was being corrupted by writing the 'Last Used'
bit into the wrong half of the PD cache (low word vs. high word)
2. The MMU cache was being too aggressively flushed on SRAMA
write, because the wrong length was being used. In addition,
the code was walking off the end of the cache array when
flushing any section other than section 0, potentially causing
memory corruption.
This commit adds support for the following emulated hard disks:
HD30 30 MB CDC Wren 94155-36
HD72 73 MB CDC Wren II 94156-86
HD72C 72 MB Fujitsu M2243AS
HD135 161 MB Maxtor XT1190
This commit improves the integrated disk (ID) controller's behavior,
enabling full support for up to two 72MB (emulated WREN II)
integrated winchester disks.
- Add sim_panel_mem_deposit_instruction API
- Properly shutdown debug activities when more than one panel is active
- Properly unwind socket facilities when more than one panel is active
- More rigorously unwind things when a panel is destroyed while its
simulator is running.
- Give explicit session request traffic priority over potentially pending
repeat command processing.
- An overflow bug was causing INSFW and EXTFW to fail
on Windows hosts compiled with Microsoft Visual Studio.
This commit fixes the issue and causes 3B2 diagnostics
to pass under win32.
- Add sim_panel_debug() API to allow the front panel application to write
directly to the API's debug file.
- Made transitions to panel Error state properly done with the mutex
properly serializing accesss to the panel State variable.
The C RTL on the latest VAX/VMS does not provide a snprintf function.
We provide a 'basic' one which meets the needs of simh as suggested
by Jordi Guillaumes Pons.
- Add explicit support for referencing register array elements.
- Reworked the parsing of the grouped output sets for explicitly queried
registers and the auto repeat output sets.
- Fix race conditions in the various RUN, START, BOOT, and CONT commands.
- Fix incorrect RUN/HALT state after STEP commands
- Tolerate input TCP traffic that has been legitimately coalesced into
different
