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10 commits

Author SHA1 Message Date
Mark Pizzolato
09ced95ce2 HP2100: Update to early Release 29 which is still simh V4.x API compatible
Dave Bryan has migrated support for this simulator to http://simh.trailing-edge.com/hp
2020-02-16 22:25:15 -08:00
Mark Pizzolato
a6552b823d HP2100: HP 2100 release 27
See HP2100/hp2100_release.txt for details of the release
2017-09-06 22:16:14 -07:00
Mark Pizzolato
946bfd329f HP2100: Latest updates from Dave Bryan
273. ENHANCEMENT:  Burst-fill only the first of two MPX receive buffers in FASTTIME mode.

     OBSERVATION:  When the 8-channel multiplexer is set for "optimized timing"
     mode, buffered characters are transferred in blocks to and from the Telnet
     connection.  That is, the line service routine will send or receive
     characters as long as they are available.  This is more efficient than the
     "realistic timing" mode, which sends or receives one character per service
     invocation.  Effectively, this means that up to 508 characters (two buffers
     of 254 bytes each) may be sent or received between one CPU instruction or
     DCPC cycle and the next.  This works well for sending, but it can cause
     buffer overflows when receiving.

     Consider an application (such as Kermit) that receives large blocks of data
     at high speed from a client.  The multiplexer is designed to handle this
     condition by interrupting the CPU when the first buffer is filled and
     filling the second buffer while the CPU is unloading data from the first.
     In realistic mode at 19,200 baud, the CPU has approximately 800
     instructions or DCPC cycles available per character received.  With a
     second buffer of 254 bytes, the CPU has approximately 203,000 instructions
     available to unload the first buffer after receiving the interrupt
     notification.  Once started, the DCPC transfer takes no more than 508
     instruction times, so the CPU can easily keep up with data arriving at the
     maximum baud rate.

     In fast timing mode, however, the first buffer burst-fills in a single CPU
     instruction time, and, if available from the Telnet connection, the second
     buffer fills in the next instruction time.  At that point, any additional
     characters received will result in a buffer overflow condition.  The
     problem is that the CPU has no time between the first burst and the second
     to empty the first buffer.

     RESOLUTION:  Modify "mpx_line_svc" (hp2100_mpx.c) to shift from burst
     transfers to character-at-a-time transfers when a receive buffer is full
     and awaiting unloading by the CPU.  This allows the CPU and DCPC time to
     read the buffer contents into memory before the second multiplexer buffer
     is full.  Once the completed buffer is freed, the service routine returns
     to burst mode to fill the remainder of the other buffer, permitting the
     efficiency of block transfers while avoiding buffer overruns with large
     data transfers.

274. PROBLEM:  A second connection to the BACI device leaves the client unresponsive.

      OBSERVATION:  The BACI device supports a single terminal client connection.
     If a second connection is attempted, the client connects but is otherwise
     unresponsive.  It would be better if the client received the "All
     connections busy" message that is reported by the terminal multiplexers
     (MPX and MUX devices) when the number of connections is exceeded.

     CAUSE:  The "baci_poll_svc" is calling the "tmxr_poll_conn" routine only if
     the port is not connected.  The routine should be called unilaterally, so
     that it will report an error and disconnect the client when all lines are
     in use and another connection is attempted.

     RESOLUTION:  Modify "baci_poll_svc" (hp2100_baci.c) to call
     "tmxr_poll_conn" unconditionally, so that a second concurrent connection
     attempt will be rejected with "All connections busy".

275. PROBLEM:  The exported program counter name (PC) clashes with other libraries.

     OBSERVATION:  In HP 21xx/1000 systems, the P register is the program
     counter.  In keeping with the naming of the other register variables (e.g.,
     for A register, B register, etc.) in the simulator, the variable used
     should be named "PR".  However, for traditional reasons, the program
     counter in SIMH is named "PC".

     The main CPU module declares its hardware register variables as global, so
     that they may be accessed by other CPU helper modules.  Unfortunately, the
     "curses" library also declares the symbol "PC" as global, leading to
     conflicts when it is loaded by SCP.  A workaround had been implemented that
     renamed "PC" to "PC_Global" in the HP2100 simulator, but that meant that
     the new name had to be used when debugging, which was awkward.

     CAUSE:  A poor choice of global symbol names from the "termcap" library,
     which was inherited by the "curses" library.

     RESOLUTION:  Change the program counter variable name from "PC" to "PR"
     (hp2100_cpu.c, hp2100_cpu1.c, hp2100_cpu2.c, hp2100_cpu3.c, hp2100_cpu4.c,
     hp2100_cpu5.c, hp2100_cpu6.c, hp2100_cpu7.c, hp2100_dr.c, and hp2100_ipl.c)
     to avoid a name clash and for register naming consistency.
2016-08-13 05:10:04 -07:00
Mark Pizzolato
ecbb20f1a9 HP2100: Latest updates: 64-bit clean compiles and revised BOOT support from Dave Bryan
265. PROBLEM:  Compiling the HP simulator for 64-bit addressing produces many
     conversion warnings.

     OBSERVATION:  Compiling the simulator and defining USE_INT64 and USE_ADDR64
     with implicit conversion warnings enabled reveals a number of places where
     assumptions were made that addresses would always be 32 bits.  This is a
     reasonable assumption, as there are no devices (CPU or peripherals) that
     can handle gigabyte addressing.  Still, many of these assumptions are not
     necessary, and some future peripheral simulator may exceed this limit.

     CAUSE:  Future expansion to 64-bit addressing was not envisioned.

     RESOLUTION:  Modify source files to ensure that "t_addr" and "t_value"
     types are used instead of "uint32" and "int32" types where addressing and
     data values may be 64 bits.  Also ensure that valid conversions to smaller
     sizes use explicit casts.

266. PROBLEM:  BOOT devices require a duplicate S-register declaration.

     OBSERVATION:  All of the peripheral devices that support the BOOT command
     set the select code and other parameters into the S register during the
     boot process.  This direct register access requires an external declaration
     that duplicates the one in the full CPU declarations file (hp2100_cpu.h).
     A better method that avoids the duplicate declaration would be for the
     "ibl_copy" routine to modify the S register on behalf of the caller.

     CAUSE:  Poor original implementation.

     RESOLUTION:  Modify "ibl_copy" (hp2100_cpu.c) to take two additional
     parameters that clear and set bits, respectively, in the S register on
     behalf of the caller.  Modify the boot routines for the CPU, DA, DP, DQ,
     DR, DS, IPL, MS, and PTR devices to use the new parameters instead of
     modifying the S register directly.
2015-01-08 03:39:22 -08:00
Mark Pizzolato
a262dd9c14 Compiler indicated cleanups 2013-03-19 01:11:22 -07:00
Mark Pizzolato
5d081f8d93 Revised HP2100 from Dave Bryan with his fixes to cleanup compiling under the LLVM clang compiler 2012-05-12 14:25:34 -07:00
Mark Pizzolato
0f8e6cfe95 Cleanup for warning messages produced by the clang C compiler. Mostly adding parentheses in conditional assignments and clarification parentheses in complex boolean expressions. 2012-04-29 11:59:44 -07:00
Mark Pizzolato
45246a3339 Updated HP2100 from Dave Bryan 2012-03-21 06:14:01 -07:00
Bob Supnik
9c4779c061 Notes For V3.8
The makefile now works for Linux and most Unix's. Howevr, for Solaris
and MacOS, you must first export the OSTYPE environment variable:

> export OSTYPE
> make

Otherwise, you will get build errors.

1. New Features

1.1 3.8-0

1.1.1 SCP and Libraries

- BREAK, NOBREAK, and SHOW BREAK with no argument will set, clear, and
  show (respectively) a breakpoint at the current PC.

1.1.2 GRI

- Added support for the GRI-99 processor.

1.1.3 HP2100

- Added support for the BACI terminal interface.
- Added support for RTE OS/VMA/EMA, SIGNAL, VIS firmware extensions.

1.1.4 Nova

- Added support for 64KW memory (implemented in third-party CPU's).

1.1.5 PDP-11

- Added support for DC11, RC11, KE11A, KG11A.
- Added modem control support for DL11.
- Added ASCII character support for all 8b devices.

1.2 3.8-1

1.2.1 SCP and libraries

- Added capability to set line connection order for terminal multiplexers.

1.2.2 HP2100

- Added support for 12620A/12936A privileged interrupt fence.
- Added support for 12792C eight-channel asynchronous multiplexer.

2. Bugs Fixed

Please see the revision history on http://simh.trailing-edge.com or
in the source module sim_rev.h.
2011-04-15 08:35:54 -07:00
Bob Supnik
59aa4a73b1 Notes For V3.8
The makefile now works for Linux and most Unix's. Howevr, for Solaris
and MacOS, you must first export the OSTYPE environment variable:

> export OSTYPE
> make

Otherwise, you will get build errors.

1. New Features

1.1 3.8-0

1.1.1 SCP and Libraries

- BREAK, NOBREAK, and SHOW BREAK with no argument will set, clear, and
  show (respectively) a breakpoint at the current PC.

1.2 GRI

- Added support for the GRI-99 processor.

1.3 HP2100

- Added support for the BACI terminal interface.
- Added support for RTE OS/VMA/EMA, SIGNAL, VIS firmware extensions.

1.4 Nova

- Added support for 64KW memory (implemented in third-party CPU's).

1.5 PDP-11

- Added support for DC11, RC11, KE11A, KG11A.
- Added modem control support for DL11.
- Added ASCII character support for all 8b devices.

2. Bugs Fixed

Please see the revision history on http://simh.trailing-edge.com or
in the source module sim_rev.h.
2011-04-15 08:35:43 -07:00