This problem only appears when debug output is prodigious. That
prodigious activity is already dramatically affecting timing, so adding
additional delays to allow the debug output to catch up won't
make anything worse.
It appears that we could jump over the C runtime implementation of
fwrite() and do an explicit write() system call and retry that until it
succeeds, but this approach would have two negative consequences:
1) it would jump over other buffered data that the C runtime fwrite()
may have pending due to output produced by other than debug
activities, thus emitting output out of order.
2) Windows doesn't have a direct system call used by its C runtime
for write(), but merely implements write() as part of the C runtime
and as it turns out that write() returns an int vs a ssize_t type
result. An explicit cast could address this, but point 1 would still
be a concern.
As discussed in #957
Previously, the status returned by fwrite() while writing debug output
was ignored and all debug output was presumed to be correctly written.
This change tolerates incomplete writes performed by the C runtime
and retries the remaining writes as long as the retries take.
This change completely presumes that the C runtime fwrite() returns
correct information when the data has not been completely written.
That of course will likely depend on the OS level write function
returning correct informatoin from the write() system call that
fwrite() depends on.
Timing concerns while emitting debug output have always been a
problem since even composing any debug output is likely to be much
more work than basic instruction execution off the current single
instruction. Clock calibration probably will be fundamentally unreliable.
As discussed in #957
This is all around the tmxr_set_get_modem_bits() API.
This change is non operational, but this clarification would avoid the
mistake made when someone uses or thinks about changing that
API in the future.
The prior change disabled returning DTR and RTS which the documented
interface was quite specific about actively returning.
The only user of this API which actually cared about DTR and RTS was
the in the pdp11_dmc module.
As reported in #951
- When sim_interval is negative (vs 0), more "time" has passed than
when the first unit event on the queue was supposed to fire. To
properly handle this and dispatch this and other events which should
have fired, time is temporarily backed up to when it was supposed
to have fired and the event is dispatched. If it schedules other
events those will then properly be scheduled relative to the time is
has fired. This approach avoids events slipping forward in time.
- Add unit test to exercise event dispatching activities.
The CFGTST register MTYPE subfield should describe the additional memory
beyond 2MB on the processor board. Previous logic attempted to describe
the total system memory and the net result didn't fit into the 3 bit field and
thus said no additional memory is present.
The consequence of this new amount of memory is that ALL of it is tested
during the power on self test and thus it takes significantly longer to get to
the >>> prompt.
As reported in #944
