Adds a skeleton framework for CIO ("Common I/O") feature cards. The
first feature card to be implemented will be the "PORTS" serial MUX.
Part of this support involved reworking IRQ handling in the CPU. It
now respects both IRQ Vector and IPL.
This change also removes all 'assert(0)' calls from the simulator and
replaces them with generic "Simulator Error" halts. These should only
happen if there's a genuine logic error lurking somewhere.
- Add "SHOW STACK" support to CPU
- An off-by-one error in checking SDT length was fixed.
- not-present co-processor R/W should not set Bus timeout bit
The 3B2 emulator did not have support for traps, rendering debugging
under the simulator fairly useless. This change adds support for
trap handling. The 'sdb' UNIX debugger under SVR3 should now work
correctly.
