Under certain circumstances, the timer resolution in the Version 3
could become coarse enough that very short timer intervals would lead
to an infinite loop of bus errors when running timer firmware
diagnostics.
When the 3B2 simulator was set to allow idling, there was significant
clock drift related to the primary timer unit. It turns out that the
simulator was using `AIO_SET_INTERRUPT_LATENCY` and `sim_rtcn_tick_ack`
incorrectly. They are not needed with the structure of system timers in
the 3B2 architecture.
This commit introduces dozens of changes to make the 3B2-700 simulator
fully functional and ready for wider use. In addition to 3B2-700
availability, this commit includes a tremendous amount of refactoring
of the 3B2-400 and common code to make the project structure easier to
maintain and reason about.
One final important change: ROM files are no longer included in the
source code. 3B2 ROM images must be obtained separately and loaded
into the simulator before boot.
Changes:
- The 3b2 target has been aliased to 3b2-400
- The formerly named 3b2-600 project has become 3b2-700
- SCSI QIC tape support has been added to sim_scsi.c
- Header files have been reworked to reduce complexity of includes
- Common code has been consolidated
- Timer code has been unified
