- A prompt answer which exactly matches a topic name is given
preference over the potential ambiguity of other topics which start
with the same text.
- Prompt with the parent topic's prompt when a just displayed subtopic
has no subtopics.
- Allow either ^D or ^Z entered to act as EOF.
These changes reflect the behavior of the VMS help system which the
hierarchical help system is modeled on.
This change signficantly improves header hygiene in the 3B2 project by
moving global symbols out of 3b2_defs.h and into the appropriate
individual module header files.
Each compilation unit now includes:
- its appropriate matching .h file
- any other .h files necessary for linting and compilation
Each header file in turn includes 3b2_defs.h, which contains truly
global symbols, and which pulls in sim_defs.h and exports global
devices.
The Rev 3 firmware does not check floppy controller status before
commanding a sector read, which can lead to calling sim_disk_rdsect()
on a detached unit. With this checkin, the simulator will no longer
attempt a read or write if the floppy unit is not attached.
This change introduces initial support for the AT&T 3B2 Rev 3 platform, based
around the WE32200 CPU with up to 64MB of RAM and SCSI disk and tape support.
This simulator is experimental and not yet supported. It will not be built by
default, but can be built with:
make 3b2-600
Or by using the 3B2-600 Windows Visual Studio project.
- Added a specific drive type RP05 which is the same size as the RP04
but can be distringuished by OS software.
- Restrict SET rpn BADBLOCK to only disk types which actually supported
the DEC Standard 144 bad block table.
- Fixed typo's in help and comments about DEC 044 vs DEC 144 and also
in pdp11_doc and vax780_doc documentation files.
As discussed in #1065
- Add column header to output of HELP device register list.
- Format HELP output for REGISTER, SET and SHOW commands to accommodate long
descriptor text (wrapping as needed).
- Add HELP DEVICE * to display help for all devices
This commit adds support for automatically running DGMON SBD diagnostic tests
on build.
Additionally, a small bug is fixed in simulator boot caused by failure to
parse boot switches.
The problem turned out to be a call to sim_is_active() from id_dp.c with
an invalid pointer. This surprised me some since this isn’t a module that
changed significantly.
In normal disk operation the driver accesses the disk address (sometimes
called file address in the hardware docs) before accessing the controller
address. The simh disk emulator (dp.c) sets a current disk variable,
dp_svun, to the current disk address when a disk is accessed. It gets
set to 0 initially and under some other circumstances.
The address of passed to sim_is_active() is calculated, in part, by
subtracting the controller address from the disk address. This results
in a bigish negative offset from the beginning of an array if dp_svun
is 0.
The diagnostic sends a disarm-disable (x’c0’) command to every device
address, from 0 to x’3ff’. This hits the controller before the disk,
exercising the error.
This same thing happened in v38-1, but sim_is_active() did not
dereference the pointer passed to it, but scanned an array for that
pointer value. The current version does dereference the pointer.
My crude fix, which does not make me happy, is to replace the call
sim_is_active(uptr) with (dp_svun && sim_is_active(uptr)). This does
give behavior identical to v38-1 and allows me to proceed.
Devices that do single character I/O could be attached to non seekable
host OS devices (tty, pipes, etc.) and thus shouldn't count on fseek()
and ftell(). These DEVICEs on these simulators do single character I/O
and easily can update their POS REGisters to reflect how much data has
been emitted. Changing such a REGister will have no useful effect
when attached to a non seekable file.
Four corrections to typos in mnemonics in const char *opcode[] in alpha_sys.c:
_L should be _C for opcodes 2E and 2F.
Alpha simulator V4.0-0 Current git commit id: 3c1c92d
sim> ; Opcode 2E
sim> ev -m 0xB8000000
0: STL_L R0,0(R0)
4: 00000000B8000000
sim>
sim> ; Opcode 2F
sim> ev -m 0xBC000000
0: STQ_L R0,0(R0)
4: 00000000BC000000
sim>
According to, Alpha Architecture Handbook V4, October 1998, Table C2:
There are no instructions with the mnemonics STL_L or STQ_L, but there are STL_C and STQ_C.
The nmemonics are correct in https://github.com/simh/simh/blob/master/alpha/alpha_cpu.c
case OP_STL_C: /* STL_C /
case OP_STQ_C: / STQ_C */
but in https://github.com/simh/simh/blob/master/alpha/alpha_sys.c
In const char *opcode[] = { the line:
"STL", "STQ", "STL_L", "STQ_L",
has been corrected to be:
"STL", "STQ", "STL_C", "STQ_C",
=====
BF should be FB in mnemonic for Opcode 36.
Alpha simulator V4.0-0 Current git commit id: 3c1c92d
sim> ; Opcode 36
sim> ev -m 0xD8000000
0: BFGE R0,4
4: 00000000D8000000
sim>
According to, Alpha Architecture Handbook V4, October 1998, Table C2:
FBGE Bra 36 Floating branch if ≥ zero
This is correct in https://github.com/simh/simh/blob/master/alpha/alpha_cpu.c
case OP_FBGT: /* FBGT */
but in https://github.com/simh/simh/blob/master/alpha/alpha_sys.c
In const char *opcode[] = { the line
"BSR", "FBNE", "BFGE", "FBGT",
has been corrected to be...
"BSR", "FBNE", "FBGE", "FBGT",
=====
MULLQ/V should MULQ/V as the mnemonic for Opcode 13.60
sim> ; Opcode 13.60
sim> ev -m 0x4C000C00
0: MULLQ/V R0,R0,R0
4: 000000004C000C00
sim>
According to, Alpha Architecture Handbook V4, October 1998, Table C2:
MULQ/V Opr 13.60 Multiply quadword
This is correct in https://github.com/simh/simh/blob/master/alpha/alpha_cpu.c
case 0x60: /* MULQ/V */
but in https://github.com/simh/simh/blob/master/alpha/alpha_sys.c
In const char *opcode[] = { the line
"MULL/V", "MULLQ/V",
has been corrected to be:
"MULL/V", "MULQ/V",
This change lays the groundwork for adding support for Rev 3 3B2 models,
which includes the Model 500, Model 600, and Model 1000.
Rather than use the fixed strings "400" and "1000" in file names, the
strings "rev2" and "rev3" will be used, which allows greater flexibility
to implement various system configurations more easily.
Additionally, this change adds a copy of the Debug Monitor (DEMON) ROM
image for the Rev 2 board, to be used soon in a later checkin.
