485 lines
19 KiB
C
485 lines
19 KiB
C
/* h316_fhd.c: H316/516 fixed head simulator
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Copyright (c) 2003-2015, Robert M. Supnik
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Permission is hereby granted, free of charge, to any person obtaining a
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copy of this software and associated documentation files (the "Software"),
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to deal in the Software without restriction, including without limitation
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the rights to use, copy, modify, merge, publish, distribute, sublicense,
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and/or sell copies of the Software, and to permit persons to whom the
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Software is furnished to do so, subject to the following conditions:
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The above copyright notice and this permission notice shall be included in
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all copies or substantial portions of the Software.
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THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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ROBERT M SUPNIK BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
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IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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Except as contained in this notice, the name of Robert M Supnik shall not be
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used in advertising or otherwise to promote the sale, use or other dealings
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in this Software without prior written authorization from Robert M Supnik.
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fhd 516-4400 fixed head disk
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03-Sep-13 RMS Added explicit void * cast
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03-Jul-13 RLA compatibility changes for extended interrupts
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19-Mar-12 RMS Fixed declaration of chan_req (Mark Pizzolato)
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15-May-06 RMS Fixed bug in autosize attach (David Gesswein)
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04-Jan-04 RMS Changed sim_fsize calling sequence
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These head-per-track devices are buffered in memory, to minimize overhead.
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*/
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#include "h316_defs.h"
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#include <math.h>
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/* Constants */
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#define FH_NUMWD 1536 /* words/track */
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#define FH_NUMTK 64 /* tracks/surface */
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#define FH_WDPSF (FH_NUMWD * FH_NUMTK) /* words/surface */
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#define FH_NUMSF 16 /* surfaces/ctlr */
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#define UNIT_V_AUTO (UNIT_V_UF + 0) /* autosize */
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#define UNIT_V_SF (UNIT_V_UF + 1) /* #surfaces - 1 */
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#define UNIT_M_SF 017
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#define UNIT_AUTO (1 << UNIT_V_AUTO)
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#define UNIT_SF (UNIT_M_SF << UNIT_V_SF)
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#define UNIT_GETSF(x) ((((x) >> UNIT_V_SF) & UNIT_M_SF) + 1)
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/* Command word 1 */
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#define CW1_RW 0100000 /* read vs write */
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#define CW1_V_SF 10 /* surface */
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#define CW1_M_SF 017
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#define CW1_GETSF(x) (((x) >> CW1_V_SF) & CW1_M_SF)
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#define CW1_V_TK 4 /* track */
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#define CW1_M_TK 077
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#define CW1_GETTK(x) (((x) >> CW1_V_TK) & CW1_M_TK)
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/* Command word 2 */
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#define CW2_V_CA 0 /* character addr */
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#define CW2_M_CA 07777
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#define CW2_GETCA(x) (((x) >> CW2_V_CA) & CW2_M_CA)
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#define GET_POS(x) ((int) fmod (sim_gtime() / ((double) (x)), \
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((double) FH_NUMWD)))
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/* OTA states */
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#define OTA_NOP 0 /* normal */
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#define OTA_CW1 1 /* expecting CW1 */
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#define OTA_CW2 2 /* expecting CW2 */
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extern int32 dev_int, dev_enb;
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extern uint32 chan_req;
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extern int32 stop_inst;
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extern uint32 dma_ad[DMA_MAX];
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uint32 fhd_cw1 = 0; /* cmd word 1 */
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uint32 fhd_cw2 = 0; /* cmd word 2 */
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uint32 fhd_buf = 0; /* buffer */
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uint32 fhd_otas = 0; /* state */
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uint32 fhd_busy = 0; /* busy */
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uint32 fhd_rdy = 0; /* word ready */
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uint32 fhd_dte = 0; /* data err */
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uint32 fhd_ace = 0; /* access error */
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uint32 fhd_dma = 0; /* DMA/DMC */
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uint32 fhd_eor = 0; /* end of range */
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uint32 fhd_csum = 0; /* parity checksum */
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uint32 fhd_stopioe = 1; /* stop on error */
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int32 fhd_time = 10; /* time per word */
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int32 fhdio (int32 inst, int32 fnc, int32 dat, int32 dev);
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t_stat fhd_svc (UNIT *uptr);
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t_stat fhd_reset (DEVICE *dptr);
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t_stat fhd_attach (UNIT *uptr, CONST char *cptr);
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t_stat fhd_set_size (UNIT *uptr, int32 val, CONST char *cptr, void *desc);
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void fhd_go (uint32 dma);
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void fhd_go1 (uint32 dat);
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void fhd_go2 (uint32 dat);
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t_bool fhd_getc (UNIT *uptr, uint32 *ch);
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t_bool fhd_putc (UNIT *uptr, uint32 ch);
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t_bool fhd_bad_wa (uint32 wa);
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uint32 fhd_csword (uint32 cs, uint32 ch);
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/* FHD data structures
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fhd_dev device descriptor
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fhd_unit unit descriptor
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fhd_mod unit modifiers
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fhd_reg register list
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*/
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DIB fhd_dib = { FHD, 1, IOBUS, IOBUS, INT_V_FHD, INT_V_NONE, &fhdio, 0 };
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UNIT fhd_unit = {
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UDATA (&fhd_svc, UNIT_FIX+UNIT_ATTABLE+UNIT_BUFABLE+UNIT_MUSTBUF,
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FH_WDPSF)
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};
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REG fhd_reg[] = {
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{ ORDATA (CW1, fhd_cw1, 16) },
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{ ORDATA (CW2, fhd_cw2, 16) },
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{ ORDATA (BUF, fhd_buf, 16) },
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{ FLDATA (BUSY, fhd_busy, 0) },
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{ FLDATA (RDY, fhd_rdy, 0) },
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{ FLDATA (DTE, fhd_dte, 0) },
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{ FLDATA (ACE, fhd_ace, 0) },
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{ FLDATA (EOR, fhd_eor, 0) },
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{ FLDATA (DMA, fhd_dma, 0) },
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{ FLDATA (CSUM, fhd_csum, 7) },
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{ FLDATA (INTREQ, dev_int, INT_V_MT) },
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{ FLDATA (ENABLE, dev_enb, INT_V_MT) },
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{ DRDATA (TIME, fhd_time, 31), REG_NZ + PV_LEFT },
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{ ORDATA (OTAS, fhd_otas, 2), REG_HRO },
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{ ORDATA (CHAN, fhd_dib.chan, 5), REG_HRO },
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{ FLDATA (STOP_IOE, fhd_stopioe, 0) },
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{ NULL }
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};
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MTAB fhd_mod[] = {
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{ UNIT_SF, (0 << UNIT_V_SF), NULL, "1S", &fhd_set_size },
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{ UNIT_SF, (1 << UNIT_V_SF), NULL, "2S", &fhd_set_size },
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{ UNIT_SF, (2 << UNIT_V_SF), NULL, "3S", &fhd_set_size },
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{ UNIT_SF, (3 << UNIT_V_SF), NULL, "4S", &fhd_set_size },
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{ UNIT_SF, (4 << UNIT_V_SF), NULL, "5S", &fhd_set_size },
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{ UNIT_SF, (5 << UNIT_V_SF), NULL, "6S", &fhd_set_size },
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{ UNIT_SF, (6 << UNIT_V_SF), NULL, "7S", &fhd_set_size },
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{ UNIT_SF, (7 << UNIT_V_SF), NULL, "8S", &fhd_set_size },
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{ UNIT_SF, (8 << UNIT_V_SF), NULL, "9S", &fhd_set_size },
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{ UNIT_SF, (9 << UNIT_V_SF), NULL, "10S", &fhd_set_size },
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{ UNIT_SF, (10 << UNIT_V_SF), NULL, "11S", &fhd_set_size },
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{ UNIT_SF, (11 << UNIT_V_SF), NULL, "12S", &fhd_set_size },
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{ UNIT_SF, (12 << UNIT_V_SF), NULL, "13S", &fhd_set_size },
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{ UNIT_SF, (13 << UNIT_V_SF), NULL, "14S", &fhd_set_size },
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{ UNIT_SF, (14 << UNIT_V_SF), NULL, "15S", &fhd_set_size },
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{ UNIT_SF, (15 << UNIT_V_SF), NULL, "16S", &fhd_set_size },
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{ UNIT_AUTO, UNIT_AUTO, "autosize", "AUTOSIZE", NULL },
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{ MTAB_XTD|MTAB_VDV, 0, NULL, "IOBUS",
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&io_set_iobus, NULL, NULL },
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{ MTAB_XTD|MTAB_VDV, 0, NULL, "DMC",
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&io_set_dmc, NULL, NULL },
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{ MTAB_XTD|MTAB_VDV, 0, NULL, "DMA",
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&io_set_dma, NULL, NULL },
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{ MTAB_XTD|MTAB_VDV, 0, "CHANNEL", NULL,
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NULL, &io_show_chan, NULL },
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{ 0 }
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};
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DEVICE fhd_dev = {
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"FHD", &fhd_unit, fhd_reg, fhd_mod,
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1, 8, 22, 1, 8, 16,
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NULL, NULL, &fhd_reset,
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NULL, &fhd_attach, NULL,
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&fhd_dib, DEV_DISABLE
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};
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/* IO routines */
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int32 fhdio (int32 inst, int32 fnc, int32 dat, int32 dev)
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{
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switch (inst) { /* case on opcode */
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case ioOCP: /* control */
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if (fnc == 04) { /* terminate output? */
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fhd_eor = 1; /* stop */
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CLR_INT (INT_FHD); /* clear int req */
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}
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else if (fnc == 003) /* start, DMA */
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fhd_go (1);
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else if (fnc == 007) /* start, IO bus */
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fhd_go (0);
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else return IOBADFNC (dat);
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break;
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case ioOTA: /* output */
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if (fnc) /* only fnc 0 */
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return IOBADFNC (dat);
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if (fhd_rdy) { /* ready? */
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fhd_buf = dat; /* store data */
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if (fhd_otas == OTA_CW1) /* expecting CW1? */
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fhd_go1 (dat);
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else if (fhd_otas == OTA_CW2) /* expecting CW2? */
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fhd_go2 (dat);
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else fhd_rdy = 0; /* normal, clr ready */
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return IOSKIP (dat);
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}
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break;
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case ioINA: /* input */
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if (fnc) /* only fnc 0 */
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return IOBADFNC (dat);
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if (fhd_rdy) { /* ready? */
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fhd_rdy = 0; /* clear ready */
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return IOSKIP (dat | fhd_buf); /* return data */
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}
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break;
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case ioSKS: /* sense */
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if (((fnc == 000) && fhd_rdy) || /* 0 = skip if ready */
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((fnc == 001) && !fhd_busy) || /* 1 = skip if !busy */
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((fnc == 002) && !fhd_dte) || /* 2 = skip if !data err */
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((fnc == 003) && !fhd_ace) || /* 3 = skip if !access err */
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((fnc == 004) && !TST_INTREQ (INT_FHD))) /* 4 = skip if !interrupt */
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return IOSKIP (dat);
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break;
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case ioEND:
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fhd_eor = 1;
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break;
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}
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return dat;
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}
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/* Start new operation */
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void fhd_go (uint32 dma)
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{
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int32 ch = fhd_dib.chan - 1; /* DMA/DMC chan */
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if (fhd_busy) /* ignore if busy */
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return;
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fhd_busy = 1; /* ctlr is busy */
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fhd_eor = 0; /* transfer not done */
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fhd_csum = 0; /* init checksum */
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fhd_dte = 0; /* clear errors */
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fhd_ace = 0;
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if (ch >= 0) /* DMA allowed? */
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fhd_dma = dma;
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else fhd_dma = 0; /* no, force IO bus */
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fhd_otas = OTA_CW1; /* expect CW1 */
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fhd_rdy = 1; /* set ready */
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if (fhd_dma && Q_DMA (ch)) { /* DMA and DMA channel? */
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SET_CH_REQ (ch); /* set channel request */
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dma_ad[ch] = dma_ad[ch] & ~DMA_IN; /* force output */
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}
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return;
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}
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/* Process command word 1 */
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void fhd_go1 (uint32 dat)
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{
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int32 ch = fhd_dib.chan - 1; /* DMA/DMC chan */
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fhd_cw1 = dat; /* store CW1 */
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fhd_otas = OTA_CW2; /* expect CW2 */
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fhd_rdy = 1; /* set ready */
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if (fhd_dma && Q_DMA (ch)) /* DMA? set chan request */
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SET_CH_REQ (ch);
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return;
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}
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/* Process command word 2 - initiate seek */
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void fhd_go2 (uint32 dat)
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{
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int32 ch = fhd_dib.chan - 1; /* DMA/DMC chan */
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uint32 sf = CW1_GETSF (fhd_cw1); /* surface */
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int32 t, wa;
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fhd_cw2 = dat; /* store CW2 */
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fhd_otas = OTA_NOP; /* next state */
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wa = CW2_GETCA (fhd_cw2) >> 1; /* word addr */
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if ((wa >= FH_NUMWD) || /* if bad char addr */
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((fhd_unit.flags & UNIT_ATT) == 0) || /* or unattached */
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(sf >= UNIT_GETSF (fhd_unit.flags))) { /* or bad surface */
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fhd_ace = 1; /* access error */
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fhd_busy = 0; /* abort operation */
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SET_INT (INT_FHD);
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return;
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}
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if (fhd_cw1 & CW1_RW) { /* write? */
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fhd_rdy = 1; /* set ready */
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if (fhd_dma) /* if DMA/DMC, req chan */
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SET_CH_REQ (ch);
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}
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else {
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fhd_rdy = 0; /* read, clear ready */
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if (fhd_dma && (ch < DMC_V_DMC1)) /* read and DMA chan? */
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dma_ad[ch] = dma_ad[ch] | DMA_IN; /* force input */
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}
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t = wa - GET_POS (fhd_time); /* delta to new loc */
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if (t < 0) /* wrap around? */
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t = t + FH_NUMWD;
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sim_activate (&fhd_unit, t * fhd_time); /* schedule op */
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return;
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}
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/* Unit service */
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t_stat fhd_svc (UNIT *uptr)
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{
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int32 ch = fhd_dib.chan - 1; /* DMA/DMC chan (-1 if IO bus) */
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uint32 c1, c2;
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if ((uptr->flags & UNIT_ATT) == 0) { /* unattached? */
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fhd_ace = 1; /* access error */
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fhd_busy = 0; /* abort operation */
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SET_INT (INT_FHD);
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return IORETURN (fhd_stopioe, SCPE_UNATT);
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}
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if (fhd_eor || fhd_rdy) { /* done or ready set? */
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if (fhd_rdy) /* if ready set, data err */
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fhd_dte = 1;
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if (fhd_cw1 & CW1_RW) { /* write? */
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if (!fhd_rdy) { /* buffer full? */
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fhd_putc (uptr, fhd_buf >> 8); /* store last word */
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fhd_putc (uptr, fhd_buf);
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}
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fhd_putc (uptr, fhd_csum); /* store csum */
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}
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else { /* read */
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fhd_getc (uptr, &c1); /* get csum */
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if (fhd_csum) /* if csum != 0, err */
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fhd_dte = 1;
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}
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fhd_busy = 0; /* operation complete */
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SET_INT (INT_FHD);
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return SCPE_OK;
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}
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if (fhd_cw1 & CW1_RW) { /* write? */
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if (fhd_putc (uptr, fhd_buf >> 8))
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return SCPE_OK;
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if (fhd_putc (uptr, fhd_buf))
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return SCPE_OK;
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}
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else { /* read */
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if (fhd_getc (uptr, &c1))
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return SCPE_OK;
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if (fhd_getc (uptr, &c2))
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return SCPE_OK;
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fhd_buf = (c1 << 8) | c2;
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}
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sim_activate (uptr, fhd_time); /* next word */
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fhd_rdy = 1; /* set ready */
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if (fhd_dma) /* if DMA/DMC, req chan */
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SET_CH_REQ (ch);
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return SCPE_OK;
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}
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/* Read character from disk */
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t_bool fhd_getc (UNIT *uptr, uint32 *ch)
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{
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uint32 sf = CW1_GETSF (fhd_cw1); /* surface */
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uint32 tk = CW1_GETTK (fhd_cw1); /* track */
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uint32 ca = CW2_GETCA (fhd_cw2); /* char addr */
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uint32 wa = ca >> 1; /* word addr */
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uint32 ba = (((sf * FH_NUMTK) + tk) * FH_NUMWD) + wa; /* buffer offset */
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uint16 *fbuf = (uint16 *) uptr->filebuf; /* buffer base */
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uint32 wd;
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if (fhd_bad_wa (wa)) /* addr bad? */
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return TRUE;
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fhd_cw2 = fhd_cw2 + 1; /* incr char addr */
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if (ca & 1) /* select char */
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wd = fbuf[ba] & 0377;
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else wd = (fbuf[ba] >> 8) & 0377;
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fhd_csum = fhd_csword (fhd_csum, wd); /* put in csum */
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*ch = wd; /* return */
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return FALSE;
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}
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/* Write character to disk */
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t_bool fhd_putc (UNIT *uptr, uint32 ch)
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{
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uint32 sf = CW1_GETSF (fhd_cw1); /* surface */
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uint32 tk = CW1_GETTK (fhd_cw1); /* track */
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uint32 ca = CW2_GETCA (fhd_cw2); /* char addr */
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uint32 wa = ca >> 1; /* word addr */
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uint32 ba = (((sf * FH_NUMTK) + tk) * FH_NUMWD) + wa; /* buffer offset */
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uint16 *fbuf = (uint16 *)uptr->filebuf; /* buffer base */
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ch = ch & 0377; /* mask char */
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if (fhd_bad_wa (wa)) /* addr bad? */
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return TRUE;
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fhd_cw2 = fhd_cw2 + 1; /* incr char addr */
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if (ca & 1) /* odd? low char */
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fbuf[ba] = (fbuf[ba] & ~0377) | ch;
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else fbuf[ba] = (fbuf[ba] & 0377) | (ch << 8); /* even, hi char */
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fhd_csum = fhd_csword (fhd_csum, ch); /* put in csum */
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if (ba >= uptr->hwmark) /* update hwmark */
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uptr->hwmark = ba + 1;
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return FALSE;
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}
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/* Check word address */
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t_bool fhd_bad_wa (uint32 wa)
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{
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if (wa >= FH_NUMWD) { /* bad address? */
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fhd_ace = 1; /* access error */
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fhd_busy = 0; /* abort operation */
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SET_INT (INT_FHD);
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return TRUE;
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}
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return FALSE;
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}
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/* Add character to checksum (parity) */
|
|
|
|
uint32 fhd_csword (uint32 cs, uint32 ch)
|
|
{
|
|
while (ch) { /* count bits */
|
|
ch = ch & ~(ch & (-(int32) ch));
|
|
cs = cs ^ 0200; /* invert cs for each 1 */
|
|
}
|
|
return cs;
|
|
}
|
|
|
|
/* Reset routine */
|
|
|
|
t_stat fhd_reset (DEVICE *dptr)
|
|
{
|
|
fhd_busy = 0; /* reset state */
|
|
fhd_rdy = 0;
|
|
fhd_ace = 0;
|
|
fhd_dte = 0;
|
|
fhd_eor = 0;
|
|
fhd_otas = OTA_NOP;
|
|
fhd_cw1 = fhd_cw2 = fhd_buf = 0;
|
|
CLR_INT (INT_FHD); /* clear int, enb */
|
|
CLR_ENB (INT_FHD);
|
|
sim_cancel (&fhd_unit); /* cancel operation */
|
|
return SCPE_OK;
|
|
}
|
|
|
|
/* Attach routine */
|
|
|
|
t_stat fhd_attach (UNIT *uptr, CONST char *cptr)
|
|
{
|
|
uint32 sz, sf;
|
|
uint32 ds_bytes = FH_WDPSF * sizeof (int16);
|
|
|
|
if ((uptr->flags & UNIT_AUTO) && (sz = sim_fsize_name (cptr))) {
|
|
sf = (sz + ds_bytes - 1) / ds_bytes;
|
|
if (sf >= FH_NUMSF)
|
|
sf = FH_NUMSF - 1;
|
|
uptr->flags = (uptr->flags & ~UNIT_SF) |
|
|
(sf << UNIT_V_SF);
|
|
}
|
|
uptr->capac = UNIT_GETSF (uptr->flags) * FH_WDPSF;
|
|
return attach_unit (uptr, cptr);
|
|
}
|
|
|
|
/* Set size routine */
|
|
|
|
t_stat fhd_set_size (UNIT *uptr, int32 val, CONST char *cptr, void *desc)
|
|
{
|
|
if (val < 0)
|
|
return SCPE_IERR;
|
|
if (uptr->flags & UNIT_ATT)
|
|
return SCPE_ALATT;
|
|
uptr->capac = UNIT_GETSF (val) * FH_WDPSF;
|
|
return SCPE_OK;
|
|
}
|