258 lines
12 KiB
C
258 lines
12 KiB
C
/* pdp8_defs.h: PDP-8 simulator definitions
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Copyright (c) 1993-2016, Robert M Supnik
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Permission is hereby granted, free of charge, to any person obtaining a
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copy of this software and associated documentation files (the "Software"),
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to deal in the Software without restriction, including without limitation
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the rights to use, copy, modify, merge, publish, distribute, sublicense,
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and/or sell copies of the Software, and to permit persons to whom the
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Software is furnished to do so, subject to the following conditions:
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The above copyright notice and this permission notice shall be included in
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all copies or substantial portions of the Software.
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THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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ROBERT M SUPNIK BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
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IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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Except as contained in this notice, the name of Robert M Supnik shall not be
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used in advertising or otherwise to promote the sale, use or other dealings
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in this Software without prior written authorization from Robert M Supnik.
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18-Sep-16 RMS Added support for 16 additional terminals
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18-Sep-13 RMS Added set_bootpc prototype
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18-Apr-12 RMS Removed separate timer for additional terminals;
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Added clock_cosched prototype
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22-May-10 RMS Added check for 64b definitions
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21-Aug-07 RMS Added FPP8 support
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13-Dec-06 RMS Added TA8E support
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30-Oct-06 RMS Added infinite loop stop
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13-Oct-03 RMS Added TSC8-75 support
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04-Oct-02 RMS Added variable device number support
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20-Jan-02 RMS Fixed bug in TTx interrupt enable initialization
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25-Nov-01 RMS Added RL8A support
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16-Sep-01 RMS Added multiple KL support
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18-Mar-01 RMS Added DF32 support
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15-Feb-01 RMS Added DECtape support
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14-Apr-99 RMS Changed t_addr to unsigned
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19-Mar-95 RMS Added dynamic memory size
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02-May-94 RMS Added non-existent memory handling
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The author gratefully acknowledges the help of Max Burnet, Richie Lary,
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and Bill Haygood in resolving questions about the PDP-8
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*/
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#ifndef PDP8_DEFS_H_
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#define PDP8_DEFS_H_ 0
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#include "sim_defs.h" /* simulator defns */
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#if defined(USE_INT64) || defined(USE_ADDR64)
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#error "PDP-8 does not support 64b values!"
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#endif
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/* Simulator stop codes */
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#define STOP_RSRV 1 /* must be 1 */
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#define STOP_HALT 2 /* HALT */
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#define STOP_IBKPT 3 /* breakpoint */
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#define STOP_OPBKPT 4 /* Opcode/Instruction breakpoint */
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#define STOP_NOTSTD 5 /* non-std devno */
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#define STOP_DTOFF 6 /* DECtape off reel */
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#define STOP_LOOP 7 /* infinite loop */
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/* Memory */
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#define MAXMEMSIZE 32768 /* max memory size */
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#define MEMSIZE (cpu_unit.capac) /* actual memory size */
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#define ADDRMASK (MAXMEMSIZE - 1) /* address mask */
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#define MEM_ADDR_OK(x) (((uint32) (x)) < MEMSIZE)
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/* IOT subroutine return codes */
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#define IOT_V_SKP 12 /* skip */
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#define IOT_V_REASON 13 /* reason */
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#define IOT_SKP (1 << IOT_V_SKP)
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#define IOT_REASON (1 << IOT_V_REASON)
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#define IORETURN(f,v) ((f)? (v): SCPE_OK) /* stop on error */
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/* Timers */
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#define TMR_CLK 0 /* timer 0 = clock */
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/* Device information block */
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#define DEV_MAXBLK 8 /* max dev block */
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#define DEV_MAX 64 /* total devices */
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typedef struct {
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uint32 dev; /* device number */
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int32 (*dsp)(int32 IR, int32 dat); /* dispatch */
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} DIB_DSP;
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typedef struct {
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uint32 dev; /* base dev number */
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uint32 num; /* number of slots */
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int32 (*dsp[DEV_MAXBLK])(int32 IR, int32 dat);
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DIB_DSP *dsp_tbl; /* optional table */
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} DIB;
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/* Standard device numbers */
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#define DEV_PTR 001 /* paper tape reader */
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#define DEV_PTP 002 /* paper tape punch */
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#define DEV_TTI 003 /* console input */
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#define DEV_TTO 004 /* console output */
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#define DEV_CLK 013 /* clock */
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#define DEV_TSC 036
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#define DEV_KJ8 040 /* extra terminals */
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#define DEV_FPP 055 /* floating point */
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#define DEV_DF 060 /* DF32 */
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#define DEV_RF 060 /* RF08 */
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#define DEV_RL 060 /* RL8A */
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#define DEV_LPT 066 /* line printer */
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#define DEV_MT 070 /* TM8E */
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#define DEV_CT 070 /* TA8E */
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#define DEV_RK 074 /* RK8E */
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#define DEV_RX 075 /* RX8E/RX28 */
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#define DEV_DTA 076 /* TC08 */
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#define DEV_TD8E 077 /* TD8E */
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/* Extra PTO8/KL8JA devices */
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#define DEV_TTI1 040
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#define DEV_TTO1 041
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#define DEV_TTI2 042
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#define DEV_TTO2 043
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#define DEV_TTI3 044
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#define DEV_TTO3 045
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#define DEV_TTI4 046
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#define DEV_TTO4 047
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#define DEV_TTI5 034
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#define DEV_TTO5 035
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#define DEV_TTI6 011
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#define DEV_TTO6 012
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#define DEV_TTI7 030
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#define DEV_TTO7 031
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#define DEV_TTI8 032
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#define DEV_TTO8 033
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#define DEV_TTI9 050
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#define DEV_TTO9 051
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#define DEV_TTI10 052
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#define DEV_TTO10 053
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#define DEV_TTI11 054
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#define DEV_TTO11 055 /* conflict: FPP */
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#define DEV_TTI12 056 /* conflict: FPP */
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#define DEV_TTO12 057
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#define DEV_TTI13 070 /* conflict: CT, MT */
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#define DEV_TTO13 071
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#define DEV_TTI14 036 /* conflict: TSC */
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#define DEV_TTO14 037
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#define DEV_TTI15 072
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#define DEV_TTO15 073
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#define DEV_TTI16 006
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#define DEV_TTO16 007
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/* Interrupt flags
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The interrupt flags consist of three groups:
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1. Devices with individual interrupt enables. These record
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their interrupt requests in device_done and their enables
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in device_enable, and must occupy the low bit positions.
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2. Devices without interrupt enables. These record their
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interrupt requests directly in int_req, and must occupy
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the middle bit positions.
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3. Overhead. These exist only in int_req and must occupy the
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high bit positions.
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Because the PDP-8 does not have priority interrupts, the order
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of devices within groups does not matter.
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Note: all extra KL input and output interrupts must be assigned
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to contiguous bits.
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*/
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#define INT_V_START 0 /* enable start */
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#define INT_V_LPT (INT_V_START+0) /* line printer */
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#define INT_V_PTP (INT_V_START+1) /* tape punch */
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#define INT_V_PTR (INT_V_START+2) /* tape reader */
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#define INT_V_TTO (INT_V_START+3) /* terminal */
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#define INT_V_TTI (INT_V_START+4) /* keyboard */
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#define INT_V_CLK (INT_V_START+5) /* clock */
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#define INT_V_TTO1 (INT_V_START+6) /* tto1 */
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//#define INT_V_TTO2 (INT_V_START+7) /* tto2 */
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//#define INT_V_TTO3 (INT_V_START+8) /* tto3 */
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//#define INT_V_TTO4 (INT_V_START+9) /* tto4 */
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#define INT_V_TTI1 (INT_V_START+10) /* tti1 */
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//#define INT_V_TTI2 (INT_V_START+11) /* tti2 */
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//#define INT_V_TTI3 (INT_V_START+12) /* tti3 */
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//#define INT_V_TTI4 (INT_V_START+13) /* tti4 */
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#define INT_V_DIRECT (INT_V_START+14) /* direct start */
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#define INT_V_RX (INT_V_DIRECT+0) /* RX8E */
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#define INT_V_RK (INT_V_DIRECT+1) /* RK8E */
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#define INT_V_RF (INT_V_DIRECT+2) /* RF08 */
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#define INT_V_DF (INT_V_DIRECT+3) /* DF32 */
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#define INT_V_MT (INT_V_DIRECT+4) /* TM8E */
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#define INT_V_DTA (INT_V_DIRECT+5) /* TC08 */
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#define INT_V_RL (INT_V_DIRECT+6) /* RL8A */
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#define INT_V_CT (INT_V_DIRECT+7) /* TA8E int */
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#define INT_V_PWR (INT_V_DIRECT+8) /* power int */
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#define INT_V_UF (INT_V_DIRECT+9) /* user int */
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#define INT_V_TSC (INT_V_DIRECT+10) /* TSC8-75 int */
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#define INT_V_FPP (INT_V_DIRECT+11) /* FPP8 */
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#define INT_V_OVHD (INT_V_DIRECT+12) /* overhead start */
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#define INT_V_NO_ION_PENDING (INT_V_OVHD+0) /* ion pending */
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#define INT_V_NO_CIF_PENDING (INT_V_OVHD+1) /* cif pending */
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#define INT_V_ION (INT_V_OVHD+2) /* interrupts on */
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#define INT_LPT (1 << INT_V_LPT)
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#define INT_PTP (1 << INT_V_PTP)
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#define INT_PTR (1 << INT_V_PTR)
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#define INT_TTO (1 << INT_V_TTO)
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#define INT_TTI (1 << INT_V_TTI)
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#define INT_CLK (1 << INT_V_CLK)
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#define INT_TTO1 (1 << INT_V_TTO1)
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//#define INT_TTO2 (1 << INT_V_TTO2)
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//#define INT_TTO3 (1 << INT_V_TTO3)
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//#define INT_TTO4 (1 << INT_V_TTO4)
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#define INT_TTI1 (1 << INT_V_TTI1)
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//#define INT_TTI2 (1 << INT_V_TTI2)
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//#define INT_TTI3 (1 << INT_V_TTI3)
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//#define INT_TTI4 (1 << INT_V_TTI4)
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#define INT_RX (1 << INT_V_RX)
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#define INT_RK (1 << INT_V_RK)
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#define INT_RF (1 << INT_V_RF)
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#define INT_DF (1 << INT_V_DF)
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#define INT_MT (1 << INT_V_MT)
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#define INT_DTA (1 << INT_V_DTA)
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#define INT_RL (1 << INT_V_RL)
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#define INT_CT (1 << INT_V_CT)
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#define INT_PWR (1 << INT_V_PWR)
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#define INT_UF (1 << INT_V_UF)
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#define INT_TSC (1 << INT_V_TSC)
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#define INT_FPP (1 << INT_V_FPP)
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#define INT_NO_ION_PENDING (1 << INT_V_NO_ION_PENDING)
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#define INT_NO_CIF_PENDING (1 << INT_V_NO_CIF_PENDING)
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#define INT_ION (1 << INT_V_ION)
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#define INT_DEV_ENABLE ((1 << INT_V_DIRECT) - 1) /* devices w/enables */
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#define INT_ALL ((1 << INT_V_OVHD) - 1) /* all interrupts */
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#define INT_INIT_ENABLE (INT_TTI+INT_TTO+INT_PTR+INT_PTP+INT_LPT) | \
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(INT_TTI1+INT_TTO1)
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#define INT_PENDING (INT_ION+INT_NO_CIF_PENDING+INT_NO_ION_PENDING)
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#define INT_UPDATE ((int_req & ~INT_DEV_ENABLE) | (dev_done & int_enable))
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/* Function prototypes */
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t_stat set_dev (UNIT *uptr, int32 val, CONST char *cptr, void *desc);
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t_stat show_dev (FILE *st, UNIT *uptr, int32 val, CONST void *desc);
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void cpu_set_bootpc (int32 pc);
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#endif
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