- This release of the HP 3000 simulator adds the following device simulation: - 30209A Line Printer Controller with One 2607/13/17/18 Line Printer The simulation supports the use of custom VFU tape images, as well as the built-in HP-standard VFU tape. The simulated device name is "LP". The full set of configurable options is detailed in a new section of the HP 3000 Simulator User's Guide. In addition, the preconfigured MPE-V/R disc image has been updated to add the following features: - The MPE cold load command files attach the line printer to the "lp.txt" output file and specify the "-n" option to clear the file before use. - Preinstalled User-Defined Commands (UDCs) provide access to the COBOL 74 compiler with the MPE-V/E :COBOLII, :COBOLIIPREP, and :COBOLIIGO commands, and to the COBOL 85 compiler with :COBOLIIX, :COBOLIIXPREP, and :COBOLIIXGO. However, see the implementation note below. -------------------- Implementation Notes -------------------- - MPE requires a line printer, so it is recommended that the MPE startup simulator command file include an ATTACH LP <filename> command to load paper into the printer before cold loading. If the printer is not attached, it will appear to MPE to be out of paper. - The line printer terminates each print line with an HP-standard CR/LF pair. If the output file is to be retained as a text file on a Unix system, removal of the carriage returns, e.g., via the "dos2unix" utility, may be desirable. - The simulator currently does not provide the HP 32234A COBOL II firmware instructions, so programs generated by the COBOLII compiler will abort at run time with an "ILLEGAL INSTRUCTION" error. Programs generated by the COBOL compiler do not use these instructions and therefore are not affected. ---------- Bugs Fixed ---------- 1. PROBLEM: The effective address of a byte pointer with a negative index is calculated incorrectly. VERSION: Release 1 OBSERVATION: Defining a :WELCOME message in MPE appears to work, but when the next logon attempts to print the message, an infinite number of CRLFs are printed instead. CAUSE: The welcome message is stored in an extra data segment. The format for each message line is a line length stored in the lower byte of the word preceding the message string. The code defines BYTE POINTER NEXTLINE and points NEXTLINE to the first message character. The line length is set with NEXTLINE(-1) := IOCOUNT. This generates a LOAD <IOCOUNT> ; LDXN 1 ; STB <NEXTLINE>,I,X sequence. In the "cpu_ea" routine, the indexing adds the X register value (-1) to the byte pointer (NEXTLINE). This causes an overflow that is not masked to 16 bits. For a word access, this displacement is added to the base register and then masked to 16 bits, which gives the correct value. However, for byte accesses, the displacement is divided by 2 and then added, and the sum is masked. Dividing by 2 shifts the overflow bit into the MSB, causing the addition result to be off by 32K. The STB goes to the wrong location, the original zero in the length byte location is retained, and when the welcome message is printed, a zero-length line is printed, and the byte pointer is incremented by zero, so the null line is printed forever. RESOLUTION: Modify "cpu_ea" (hp3000_cpu.c) to mask indexed displacements to 16 bits after adding the X register value. STATUS: Fixed in Release 2. 2. PROBLEM: An SMSK instruction may clear the interrupt mask flip-flop of a device that specifies that it is should be "always enabled." VERSION: Release 1 OBSERVATION: If the TOS word is zero, an SMSK instruction will clear the interrupt mask flip-flop of a device whose mask jumper is set to "E" (always enabled). CAUSE: In response to a DSETMASK signal, device interfaces set their interrupt mask flip-flops by "anding" the incoming data word with the interrupt mask jumper setting. The jumper setting value for "always enabled" is %177777, which sets the mask flip-flop in all cases, except when the data word is zero. RESOLUTION: Modify hp3000_atc.c, hp3000_ds.c, and hp3000_ms.c to set their mask flip-flops unconditionally if the jumper setting is "E". STATUS: Fixed in Release 2. 3. PROBLEM: The "SET <dev> INTMASK=<n>" command sets the wrong bit in the device interface's interrupt mask jumper setting. VERSION: Release 1 OBSERVATION: The interrupt mask jumper on a device interface is set by specifying the mask bit number in a "SET <dev> INTMASK=<n>" command. This sets a bit in the device's interrupt mask jumper word corresponding to the bit number requested. However, the bit numbering is incorrect; setting the jumper for bit 15, for example, sets bit 0 of the jumper word. Therefore, the interface's mask flip-flop is not set as expected when an SMSK instruction is executed. CAUSE: The bit numbers were counted from the wrong end of the word. RESOLUTION: Modify "hp_set_dib" and "hp_show_dib" (hp3000_sys.c) to number the bits from the MSB instead of the LSB. STATUS: Fixed in Release 2. 4. PROBLEM: The Multiplexer Channel is not generating the ACKSR signal correctly. VERSION: Release 1 OBSERVATION: The line printer controller hangs when an SIO chained write is performed. The first programmed write completes normally, but the second does not start. The channel is waiting for a service request that does not occur. CAUSE: The service request from the last write of the first block transfer is being cleared by an ACKSR generated by the Multiplexer Channel when it performs the IOCW fetch in State A for the second write request. The channel should omit this ACKSR when the previous I/O order was a chained read or write. However, the simulator is testing the order just fetched (Write) instead of the order that has just completed (Write Chained). RESOLUTION: Modify "mpx_service" (hp3000_mpx.c) to test the correct I/O order in State A. STATUS: Fixed in Release 2.
639 lines
28 KiB
C
639 lines
28 KiB
C
/* hp3000_defs.h: HP 3000 simulator general declarations
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Copyright (c) 2016, J. David Bryan
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Permission is hereby granted, free of charge, to any person obtaining a copy
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of this software and associated documentation files (the "Software"), to deal
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in the Software without restriction, including without limitation the rights
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to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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copies of the Software, and to permit persons to whom the Software is
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furnished to do so, subject to the following conditions:
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The above copyright notice and this permission notice shall be included in
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all copies or substantial portions of the Software.
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THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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AUTHOR BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
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ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
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WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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Except as contained in this notice, the name of the author shall not be used
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in advertising or otherwise to promote the sale, use or other dealings in
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this Software without prior written authorization from the author.
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13-May-16 JDB Modified for revised SCP API function parameter types
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21-Mar-16 JDB Changed uint16 types to HP_WORD
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19-Mar-16 JDB Added UNDEFs for the additional register macros
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04-Feb-16 JDB First release version
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11-Dec-12 JDB Created
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This file provides the general declarations used throughout the HP 3000
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simulator. It is required by all modules.
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The author gratefully acknowledges the help of Frank McConnell in answering
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questions about the HP 3000.
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-----------------------------------------------------
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Implementation Note -- Compiling the Simulator as C++
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-----------------------------------------------------
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Although simulators are written in C, the SIMH project encourages developers
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to compile them with a C++ compiler to obtain the more careful type checking
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provided. To obtain successful compilations, the simulator must be written
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in the subset of C that is also valid C++. Using valid C features beyond
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that subset, as the HP 3000 simulator does, will produce C++ compiler errors.
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The standard C features used by the simulator that prevent error-free C++
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compilation are:
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1. Incomplete types.
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In C, mutually recursive type definitions are allowed by the use of
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incomplete type declarations, such as "DEVICE ms_dev;" followed later by
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"DEVICE ms_dev {...};". Several HP device simulators use this feature to
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place a pointer to the device structure in the "desc" field of an MTAB
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array element, typically when the associated validation or display
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routine handles multiple devices. As the DEVICE contains a pointer to
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the MTAB array, and an MTAB array element contains a pointer to the
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DEVICE, the definitions are mutually recursive, and incomplete types are
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employed. C++ does not permit incomplete types.
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2. Implicit conversion of ints to enums.
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In C, enumeration types are compatible with integer types, and its
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members are constants having type "int". As such, they are semantically
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equivalent to and may be used interchangeably with integers. For the
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developer, though, C enumerations have some advantages. In particular,
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the compiler may check a "switch" statement to ensure that all of the
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enumeration cases are covered. Also, a mathematical set may be modeled
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by an enumeration type with disjoint enumerator values, with the bitwise
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integer OR and AND operators modeling the set union and intersection
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operations. The latter has direct support in the "gdb" debugger, which
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will display an enumerated type value as a union of the various
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enumerators. The HP simulator makes extensive use of both features to
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model hardware signal buses (e.g., INBOUND_SET, OUTBOUND_SET) and so
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performs bitwise integer operations on the enumerations to model signal
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assertion and denial. In C++, implicit conversion from enumerations to
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integers is allowed, but conversion from integers to enumerations is
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illegal without explicit casts. Therefore, the idiom employed by the
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simulator to assert a signal (e.g., "outbound_signals |= INTREQ") is
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rejected by the C++ compiler.
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3. Implicit increment operations on enums.
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Because enums are compatible with integers in C, no special enumerator
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increment operator is provided. To cycle through the range of an
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enumeration type, e.g. in a "for" statement, the standard integer
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increment operator, "++", is used. In C++, the "++" operator must be
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overloaded with a version specific to the enumeration type; applying the
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integer "++" to an enumeration is illegal.
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4. Use of C++ keywords as variable names.
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C++ reserves a number of additional keywords beyond those reserved by C.
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Use of any of these keywords as a variable or type name is legal C but
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illegal C++. The HP simulator uses variables named "class" and
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"operator", which are keywords in C++.
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The HP simulator is written in ISO standard C and will compile cleanly with a
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compiler implementing the 1999 C standard. Compilation as C++ is not a goal
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of the simulator and cannot work, given the incompatibilities listed above.
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*/
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#ifndef HP3000_DEFS_H_
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#define HP3000_DEFS_H_
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#include "sim_rev.h"
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#include "sim_defs.h"
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/* The following pragmas quell clang and Microsoft Visual C++ warnings that are
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on by default but should not be, in my opinion. They warn about the use of
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perfectly valid code and require the addition of redundant parentheses and
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braces to silence them. Rather than clutter up the code with scores of extra
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symbols that, in my view, make the code harder to read and maintain, I elect
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to suppress these warnings.
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VC++ 2008 warning descriptions:
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- 4114: "same type qualifier used more than once" [legal per C99]
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- 4554: "check operator precedence for possible error; use parentheses to
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clarify precedence"
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- 4996: "function was declared deprecated"
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*/
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#if defined (__clang__)
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#pragma clang diagnostic ignored "-Wlogical-op-parentheses"
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#pragma clang diagnostic ignored "-Wbitwise-op-parentheses"
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#pragma clang diagnostic ignored "-Wshift-op-parentheses"
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#pragma clang diagnostic ignored "-Wdangling-else"
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#elif defined (_MSC_VER)
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#pragma warning (disable: 4114 4554 4996)
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#endif
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/* Device register display mode flags */
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#define REG_A (1u << REG_V_UF + 0) /* permit any display */
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#define REG_B (1u << REG_V_UF + 1) /* permit binary display */
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#define REG_M (1u << REG_V_UF + 2) /* default to instruction mnemonic display */
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#define REG_S (1u << REG_V_UF + 3) /* default to status mnemonic display */
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/* Register macros.
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These additional register definition macros are used to define:
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FBDATA -- a one-bit flag in an arrayed register
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SRDATA -- an array of bytes large enough to hold a structure
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YRDATA -- a binary register
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The FBDATA macro defines a flag that is replicated in the same bit position
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in each element of an array; the array element size is assumed to be the
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minimum necessary to hold the bit at the given offset. The SRDATA macro is
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used solely to SAVE data stored in a structure so that it may be RESTOREd
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later. The YRDATA macro extends the functionality of the ORDATA, DRDATA, and
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HRDATA macros to registers with binary (base 2) representation.
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Implementation notes:
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1. Use caution that multiple FBDATA registers referencing the same array
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have offsets that imply the same array element size. For example,
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offsets of 3 and 5 can be used with an array of 8-bit elements, and
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offsets 13 and 15 can be used with an array of 16-bit elements. However,
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offsets 3 and 13 cannot be used, as the first implies 8-bit elements, and
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the second implies 16-bit elements.
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2. The macro names are UNDEFed to avoid potential name clashes with
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sim_def.h macros.
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3. The REG structure for version 4.0 contains several fields that are not
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present in 3.x versions. The 4.x REGDATA macro maps to the REG strcture
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in a field-order- and preprocessor-independent manner. There is no
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corresponding macro in 3.x, so we must handle standard vs. non-standard
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preprocessor differences by creating our own REGMAP macro to handle the
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mapping.
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*/
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#undef FBDATA
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#undef SRDATA
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#undef YRDATA
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#undef REGMAP
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#if (SIM_MAJOR >= 4)
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#define REGMAP(nm,loc,rdx,wd,off,dep,fl) \
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REGDATA (nm, loc, rdx, wd, off, dep, NULL, NULL, fl, 0, 0)
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#elif defined (__STDC__) || defined (_WIN32)
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#define REGMAP(nm,loc,rdx,wd,off,dep,fl) \
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#nm, &(loc), (rdx), (wd), (off), (dep), (fl), 0
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#else
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#define REGMAP(nm,loc,rdx,wd,off,dep,fl) \
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"nm", &(loc), (rdx), (wd), (off), (dep), (fl), 0
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#endif
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/* Macro name loc radix width offset depth flags */
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/* ------------------------- ---- ------ ----- ----- ------ ---------- ----- */
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#define FBDATA(nm,loc,ofs,dep,fl) REGMAP (nm, (loc), 2, 1, (ofs), (dep), (fl) )
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#define SRDATA(nm,loc,fl) REGMAP (nm, (loc), 8, 8, 0, sizeof loc, (fl) )
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#define YRDATA(nm,loc,wid,fl) REGMAP (nm, (loc), 2, (wid), 0, 1, (fl) )
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/* Debugging and console output.
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"dprintf" is used to write debugging messages. It does an "fprintf" to the
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debug output stream if the stream is open and the debug "flag" is currently
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enabled in device "dev". Otherwise, it's a NOP. "..." is the format string
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and associated values.
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"dpprintf" is identical to "dprintf", except that a device pointer is passed
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instead of a device structure.
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"DPRINTING" and "DPPRINTING" implement the test conditions for device and
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device pointer debugging, respectively. They are used explicitly only when
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several debug statements employing the same flag are required, and it is
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desirable to avoid repeating the stream and flag test for each one.
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"cprintf", "cputs", and "cputc" are used to write messages to the console
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and, if console logging is enabled, to the log output stream. They do
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"(f)printf", "fputs", or "(f)putc", respectively. "..." is the format string
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and associated values, "str" is the string to write, and "ch" is the
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character to write.
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Implementation notes:
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1. The "cputs" macro uses "fputs" for both console and log file output
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because "puts" appends a newline, whereas "fputs" does not.
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*/
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#define DPRINTING(d,f) (sim_deb && ((d).dctrl & (f)))
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#define DPPRINTING(d,f) (sim_deb && ((d)->dctrl & (f)))
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#define dprintf(dev, flag, ...) \
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if (DPRINTING (dev, flag)) \
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hp_debug (&(dev), (flag), __VA_ARGS__); \
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else \
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(void) 0
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#define dpprintf(dptr, flag, ...) \
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if (DPPRINTING (dptr, flag)) \
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hp_debug ((dptr), (flag), __VA_ARGS__); \
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else \
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(void) 0
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#define cprintf(...) \
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do { \
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printf (__VA_ARGS__); \
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if (sim_log) \
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fprintf (sim_log, __VA_ARGS__); \
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} while (0)
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#define cputs(str) \
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do { \
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fputs (str, stdout); \
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if (sim_log) \
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fputs (str, sim_log); \
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} while (0)
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#define cputc(ch) \
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do { \
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putc (ch); \
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if (sim_log) \
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fputc (ch, sim_log); \
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} while (0)
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/* Simulation stop codes.
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These VM-specific status codes stop the simulator. The "sim_stop_messages"
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array in "hp3000_sys.c" contains the message strings that correspond
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one-for-one with the stop codes.
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Implementation notes:
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1. Codes before STOP_RERUN cause the instruction to be rerun, so P is backed
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up twice. For codes after, P points to the next instruction to be
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executed (which is the current instruction for an infinite loop stop).
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*/
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#define STOP_SYSHALT 1 /* system halt */
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#define STOP_UNIMPL 2 /* unimplemented instruction stop */
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#define STOP_UNDEF 3 /* undefined instruction stop */
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#define STOP_PAUS 4 /* PAUS instruction stop */
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#define STOP_RERUN 4 /* stops above here cause the instruction to be re-run */
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#define STOP_HALT 5 /* programmed halt */
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#define STOP_BRKPNT 6 /* breakpoint */
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#define STOP_INFLOOP 7 /* infinite loop stop */
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#define STOP_CLOAD 8 /* cold load complete */
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#define STOP_CDUMP 9 /* cold dump complete */
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/* Modifier validation identifiers */
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#define MTAB_XDV (MTAB_XTD | MTAB_VDV)
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#define MTAB_XUN (MTAB_XTD | MTAB_VUN)
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#define VAL_DEVNO 0 /* validate DEVNO=0-127 */
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#define VAL_INTMASK 1 /* validate INTMASK=0-15/E/D */
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#define VAL_INTPRI 2 /* validate INTPRI=0-31 */
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#define VAL_SRNO 3 /* validate SRNO=0-15 */
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/* I/O event timing.
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I/O events are scheduled for future service by specifying the desired delay
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in units of event ticks. Typically, one event tick represents the execution
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of one CPU instruction, and this is the way event ticks are defined in the
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current simulator implementation. However, while the average execution time
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of a typical instruction mix on a Series II is given as 2.57 microseconds,
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actual instruction times vary greatly, due to the presence of block move and
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loop instructions. Variations of an order of magnitude are common, and two
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orders or more are possible for longer blocks.
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To accommodate possible future variable instruction timing, I/O service
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activation times must not assume a constant 2.57 microseconds per event tick.
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Delays should be defined in terms of the "uS" (microseconds), "mS"
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(milliseconds), and "S" (seconds) macros below.
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*/
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#define USEC_PER_EVENT 2.57 /* average CPU instruction time in microseconds */
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#define uS(t) (uint32) ((t) > USEC_PER_EVENT ? (t) / USEC_PER_EVENT + 0.5 : 1)
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#define mS(t) (uint32) (((t) * 1000.0) / USEC_PER_EVENT + 0.5)
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#define S(t) (uint32) (((t) * 1000000.0) / USEC_PER_EVENT + 0.5)
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/* Architectural constants.
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These macros specify the width, sign location, value mask, and minimum and
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maximum signed and unsigned values for the data sizes supported by the
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simulator. In addition, masks for 16-bit and 32-bit overflow are defined (an
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overflow is indicated if the masked bits are not all ones or all zeros).
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The HP_WORD type is used to declare variables that represent 16-bit registers
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or buses in hardware.
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Implementation notes:
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1. The HP_WORD type is a 32-bit unsigned type, instead of the more logical
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16-bit unsigned type. There are two reasons for this. First, SCP
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requires that scalars referenced by REG (register) entries be 32 bits in
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size. Second, IA-32 processors execute instructions with 32-bit operands
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much faster than those with 16-bit operands.
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Using 16-bit operands omits the masking required for 32-bit values. For
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example, the code generated for the following operations is as follows:
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uint16 a, b, c;
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a = b + c & 0xFFFF;
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movzwl _b, %eax
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addw _c, %ax
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movw %ax, _a
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uint32 x, y, z;
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x = y + z & 0xFFFF;
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movl _z, %eax
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addl _y, %eax
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andl $65535, %eax
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movl %eax, _x
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However, the first case uses operand override prefixes, which require
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substantially more time to decode (6 clock cycles vs. 1 clock cycle).
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This time outweighs the additional 32-bit AND instruction, which executes
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in 1 clock cycle.
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On an Intel Core 2 Duo processor, defining HP_WORD as uint16 causes the
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HP 3000 memory diagnostic to run about 10% slower.
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*/
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typedef uint32 HP_WORD; /* HP 16-bit data word representation */
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#define R_MASK 0177777u /* 16-bit register mask */
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|
|
|
#define D8_WIDTH 8 /* 8-bit data bit width */
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|
#define D8_MASK 0377u /* 8-bit data mask */
|
|
#define D8_UMAX 0377u /* 8-bit unsigned maximum value */
|
|
#define D8_SMAX 0177u /* 8-bit signed maximum value */
|
|
#define D8_SMIN 0200u /* 8-bit signed minimum value */
|
|
#define D8_SIGN 0200u /* 8-bit sign */
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|
|
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#define D16_WIDTH 16 /* 16-bit data bit width */
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|
#define D16_MASK 0177777u /* 16-bit data mask */
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|
#define D16_UMAX 0177777u /* 16-bit unsigned maximum value */
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|
#define D16_SMAX 0077777u /* 16-bit signed maximum value */
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|
#define D16_SMIN 0100000u /* 16-bit signed minimum value */
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|
#define D16_SIGN 0100000u /* 16-bit sign */
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|
|
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#define D32_WIDTH 32 /* 32-bit data bit width */
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|
#define D32_MASK 037777777777u /* 32-bit data mask */
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|
#define D32_UMAX 037777777777u /* 32-bit unsigned maximum value */
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|
#define D32_SMAX 017777777777u /* 32-bit signed maximum value */
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#define D32_SMIN 020000000000u /* 32-bit signed minimum value */
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#define D32_SIGN 020000000000u /* 32-bit sign */
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|
|
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#define D48_WIDTH 48 /* 48-bit data bit width */
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|
#define D48_MASK 07777777777777777uL /* 48-bit data mask */
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|
#define D48_UMAX 07777777777777777uL /* 48-bit unsigned maximum value */
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|
#define D48_SMAX 03777777777777777uL /* 48-bit signed maximum value */
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|
#define D48_SMIN 04000000000000000uL /* 48-bit signed minimum value */
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|
#define D48_SIGN 04000000000000000uL /* 48-bit sign */
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|
|
|
#define D64_WIDTH 64 /* 64-bit data bit width */
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|
#define D64_MASK 01777777777777777777777uL /* 64-bit data mask */
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|
#define D64_UMAX 01777777777777777777777uL /* 64-bit unsigned maximum value */
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|
#define D64_SMAX 00777777777777777777777uL /* 64-bit signed maximum value */
|
|
#define D64_SMIN 01000000000000000000000uL /* 64-bit signed minimum value */
|
|
#define D64_SIGN 01000000000000000000000uL /* 64-bit sign */
|
|
|
|
#define S16_OVFL_MASK ((uint32) D16_UMAX << D16_WIDTH | \
|
|
D16_SIGN) /* 16-bit signed overflow mask */
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|
|
|
#define S32_OVFL_MASK ((t_uint64) D32_UMAX << D32_WIDTH | \
|
|
D32_SIGN) /* 32-bit signed overflow mask */
|
|
|
|
|
|
/* Memory constants */
|
|
|
|
#define LA_WIDTH 16 /* logical address bit width */
|
|
#define LA_MASK ((1u << LA_WIDTH) - 1) /* logical address mask (2 ** 16 - 1) */
|
|
#define LA_MAX ((1u << LA_WIDTH) - 1) /* logical address maximum (2 ** 16 - 1) */
|
|
|
|
#define BA_WIDTH 4 /* bank address bit width */
|
|
#define BA_MASK ((1u << BA_WIDTH) - 1) /* bank address mask (2 ** 4 - 1) */
|
|
#define BA_MAX ((1u << BA_WIDTH) - 1) /* bank address maximum (2 ** 4 - 1) */
|
|
|
|
#define PA_WIDTH (LA_WIDTH + BA_WIDTH) /* physical address bit width */
|
|
#define PA_MASK ((1u << PA_WIDTH) - 1) /* physical address mask (2 ** 20 - 1) */
|
|
#define PA_MAX ((1u << PA_WIDTH) - 1) /* physical address maximum (2 ** 20 - 1) */
|
|
|
|
#define DV_WIDTH 16 /* data value bit width */
|
|
#define DV_MASK ((1u << DV_WIDTH) - 1) /* data value mask (2 ** 16 - 1) */
|
|
#define DV_SIGN ( 1u << (DV_WIDTH - 1)) /* data value sign (2 ** 15) */
|
|
#define DV_UMAX ((1u << DV_WIDTH) - 1) /* data value unsigned maximum (2 ** 16 - 1) */
|
|
#define DV_SMAX ((1u << (DV_WIDTH - 1)) - 1) /* data value signed maximum (2 ** 15 - 1) */
|
|
|
|
|
|
/* Memory address macros.
|
|
|
|
These macros convert between logical and physical addresses. The functions
|
|
provided are:
|
|
|
|
- TO_PA -- merge a bank number and offset into a physical address
|
|
- TO_BANK -- extract the bank number part of a physical address
|
|
- TO_OFFSET -- extract the offset part of a physical address
|
|
|
|
|
|
Implementation notes:
|
|
|
|
1. The TO_PA offset parameter is not masked to 16 bits, as this value is
|
|
almost always derived from a value that is inherently 16 bits in size.
|
|
In the few cases where it is not, explicit masking is required.
|
|
*/
|
|
|
|
#define TO_PA(b,o) (((uint32) (b) & BA_MASK) << LA_WIDTH | (uint32) (o))
|
|
#define TO_BANK(p) ((p) >> LA_WIDTH & BA_MASK)
|
|
#define TO_OFFSET(p) ((p) & LA_MASK)
|
|
|
|
|
|
/* Portable conversions.
|
|
|
|
SIMH is written with the assumption that the defined-size types (e.g.,
|
|
uint16) are at least the required number of bits but may be larger.
|
|
Conversions that otherwise would make inherent size assumptions must instead
|
|
be coded explicitly. For example, doing:
|
|
|
|
negative_value_32 = (int32) negative_value_16;
|
|
|
|
...will not guarantee that bits 0-15 of "negative_value_32" are ones, whereas
|
|
the supplied sign-extension macro will.
|
|
|
|
The conversions available are:
|
|
|
|
- SEXT -- int16 sign-extended to int32
|
|
- NEG16 -- int16 negated
|
|
- NEG32 -- int32 negated
|
|
- INT16 -- uint16 to int16
|
|
- INT32 -- uint32 to int32
|
|
|
|
|
|
Implementation notes:
|
|
|
|
1. The routines assume that 16-bit values are masked to exactly 16 bits
|
|
before invoking.
|
|
*/
|
|
|
|
#define SEXT(x) (int32) ((x) & D16_SIGN ? (x) | ~D16_MASK : (x))
|
|
|
|
#define NEG16(x) ((~(x) + 1) & D16_MASK)
|
|
#define NEG32(x) ((~(x) + 1) & D32_MASK)
|
|
|
|
#define INT16(u) ((u) > D16_SMAX ? (-(int16) (D16_UMAX - (u)) - 1) : (int16) (u))
|
|
#define INT32(u) ((u) > D32_SMAX ? (-(int32) (D32_UMAX - (u)) - 1) : (int32) (u))
|
|
|
|
|
|
/* Byte accessors.
|
|
|
|
These macros extract the upper and lower bytes from a word and form a word
|
|
from upper and lower bytes. Replacement of a byte within a word is also
|
|
provided, as is an enumeration type that defines byte selection.
|
|
|
|
The accessors are:
|
|
|
|
- UPPER_BYTE -- return the byte from the upper position of a word value
|
|
- LOWER_BYTE -- return the byte from the lower position of a word value
|
|
- TO_WORD -- return a word with the specified upper and lower bytes
|
|
|
|
- REPLACE_UPPER -- replace the upper byte of the word value
|
|
- REPLACE_LOWER -- replace the lower byte of the word value
|
|
|
|
*/
|
|
|
|
typedef enum {
|
|
upper, /* upper byte selected */
|
|
lower /* lower byte selected */
|
|
} BYTE_SELECTOR;
|
|
|
|
#define UPPER_BYTE(w) (uint8) ((w) >> D8_WIDTH & D8_MASK)
|
|
#define LOWER_BYTE(w) (uint8) ((w) & D8_MASK)
|
|
#define TO_WORD(u,l) (HP_WORD) (((u) & D8_MASK) << D8_WIDTH | (l) & D8_MASK)
|
|
|
|
#define REPLACE_UPPER(w,b) ((w) & D8_MASK | ((b) & D8_MASK) << D8_WIDTH)
|
|
#define REPLACE_LOWER(w,b) ((w) & D8_MASK << D8_WIDTH | (b) & D8_MASK)
|
|
|
|
|
|
/* Double-word accessors */
|
|
|
|
#define UPPER_WORD(d) (HP_WORD) ((d) >> D16_WIDTH & D16_MASK)
|
|
#define LOWER_WORD(d) (HP_WORD) ((d) & D16_MASK)
|
|
|
|
#define TO_DWORD(u,l) ((uint32) (u) << D16_WIDTH | (l))
|
|
|
|
|
|
/* Flip-flops */
|
|
|
|
typedef enum {
|
|
CLEAR = 0, /* the flip-flop is clear */
|
|
SET = 1 /* the flip-flop is set */
|
|
} FLIP_FLOP;
|
|
|
|
#define TOGGLE(ff) ff = (FLIP_FLOP) (ff ^ 1) /* toggle a flip-flop variable */
|
|
|
|
#define D_FF(b) (FLIP_FLOP) ((b) != 0) /* use a Boolean expression for a D flip-flop */
|
|
|
|
|
|
/* Bitset formatting.
|
|
|
|
See the comments at the "fmt_bitset" function (hp3000_sys.c) for details of
|
|
the specification of bitset names and format structures.
|
|
*/
|
|
|
|
typedef enum { /* direction of interpretation */
|
|
msb_first, /* left-to-right */
|
|
lsb_first /* right-to-left */
|
|
} BITSET_DIRECTION;
|
|
|
|
typedef enum { /* alternate names */
|
|
no_alt, /* no alternates are present in the name array */
|
|
has_alt /* the name array contains alternates */
|
|
} BITSET_ALTERNATE;
|
|
|
|
typedef enum { /* trailing separator */
|
|
no_bar, /* omit a trailing separator */
|
|
append_bar /* append a trailing separator */
|
|
} BITSET_BAR;
|
|
|
|
typedef const char *const BITSET_NAME; /* a bit name string pointer */
|
|
|
|
typedef struct { /* bit set format descriptor */
|
|
uint32 name_count; /* count of bit names */
|
|
BITSET_NAME *names; /* pointer to an array of bit names */
|
|
uint32 offset; /* offset from LSB to first bit */
|
|
BITSET_DIRECTION direction; /* direction of interpretation */
|
|
BITSET_ALTERNATE alternate; /* alternate interpretations presence */
|
|
BITSET_BAR bar; /* trailing separator choice */
|
|
} BITSET_FORMAT;
|
|
|
|
/* Bitset format specifier initialization */
|
|
|
|
#define FMT_INIT(names,offset,dir,alt,bar) \
|
|
sizeof (names) / sizeof (names) [0], \
|
|
(names), (offset), (dir), (alt), (bar)
|
|
|
|
|
|
/* System interface global data structures */
|
|
|
|
extern const HP_WORD odd_parity [256]; /* a table of parity bits for odd parity */
|
|
|
|
extern const BITSET_FORMAT inbound_format; /* the inbound signal format structure */
|
|
extern const BITSET_FORMAT outbound_format; /* the outbound signal format structure */
|
|
|
|
|
|
/* System interface global SCP support routines previously declared in scp.h */
|
|
/*
|
|
extern t_stat sim_load (FILE *fptr, CONST char *cptr, CONST char *fnam, int flag);
|
|
extern t_stat fprint_sym (FILE *ofile, t_addr addr, t_value *val, UNIT *uptr, int32 sw);
|
|
extern t_stat parse_sym (CONST char *cptr, t_addr addr, UNIT *uptr, t_value *val, int32 sw);
|
|
*/
|
|
|
|
/* System interface global SCP support routines */
|
|
|
|
extern t_stat hp_set_dib (UNIT *uptr, int32 code, CONST char *cptr, void *desc);
|
|
extern t_stat hp_show_dib (FILE *st, UNIT *uptr, int32 code, CONST void *desc);
|
|
|
|
|
|
/* System interface global utility routines */
|
|
|
|
extern t_bool hp_device_conflict (void);
|
|
extern t_stat fprint_cpu (FILE *ofile, t_value *val, uint32 radix, int32 switches);
|
|
|
|
extern const char *fmt_status (uint32 status);
|
|
extern const char *fmt_char (uint32 charval);
|
|
extern const char *fmt_bitset (uint32 bitset, const BITSET_FORMAT bitfmt);
|
|
|
|
extern void hp_debug (DEVICE *dptr, uint32 flag, ...);
|
|
|
|
|
|
#endif
|