375 lines
14 KiB
C
375 lines
14 KiB
C
/* ipcmultibus.c: Multibus I simulator
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Copyright (c) 2010, William A. Beech
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Permission is hereby granted, free of charge, to any person obtaining a
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copy of this software and associated documentation files (the "Software"),
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to deal in the Software without restriction, including without limitation
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the rights to use, copy, modify, merge, publish, distribute, sublicense,
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and/or sell copies of the Software, and to permit persons to whom the
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Software is furnished to do so, subject to the following conditions:
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The above copyright notice and this permission notice shall be included in
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all copies or substantial portions of the Software.
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THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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WILLIAM A. BEECH BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
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IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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Except as contained in this notice, the name of William A. Beech shall not be
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used in advertising or otherwise to promote the sale, use or other dealings
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in this Software without prior written authorization from William A. Beech.
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MODIFICATIONS:
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?? ??? 10 - Original file.
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24 Apr 15 -- Modified to use simh_debug
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NOTES:
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This software was written by Bill Beech, Dec 2010, to allow emulation of Multibus
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Computer Systems.
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*/
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#include "system_defs.h"
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#define SET_XACK(VAL) (xack = VAL)
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int32 mbirq = 0; /* set no multibus interrupts */
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int32 flag = 0;
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/* function prototypes */
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t_stat multibus_cfg(void);
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t_stat multibus_svc(UNIT *uptr);
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t_stat multibus_reset(DEVICE *dptr);
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void set_irq(int32 int_num);
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void clr_irq(int32 int_num);
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uint8 nulldev(t_bool flag, uint8 data, uint8 devnum);
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t_stat multibus_reset (DEVICE *dptr);
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uint8 multibus_get_mbyte(uint16 addr);
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uint16 multibus_get_mword(uint16 addr);
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void multibus_put_mbyte(uint16 addr, uint8 val);
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void multibus_put_mword(uint16 addr, uint16 val);
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/* external function prototypes */
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extern t_stat SBC_reset(DEVICE *dptr); /* reset the IPC simulator */
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extern void set_cpuint(int32 int_num);
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extern t_stat isbc064_reset (DEVICE *dptr);
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extern t_stat isbc464_reset (DEVICE *dptr);
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extern t_stat zx200a_reset(DEVICE *dptr);
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extern t_stat isbc201_reset (DEVICE *dptr);
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extern t_stat isbc202_reset (DEVICE *dptr);
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extern t_stat isbc206_reset (DEVICE *dptr);
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extern t_stat isbc208_reset (DEVICE *dptr);
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extern uint8 RAM_get_mbyte(uint16 addr);
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extern void RAM_put_mbyte(uint16 addr, uint8 val);
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extern uint8 isbc464_get_mbyte(uint16 addr);
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extern uint8 reg_dev(uint8 (*routine)(t_bool, uint8, uint8), uint8, uint8);
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extern t_stat isbc064_cfg(uint16 base, uint16 size);
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extern t_stat isbc464_cfg(uint16 base, uint16 size);
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extern t_stat isbc201_cfg(uint8 base);
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extern t_stat isbc202_cfg(uint8 base);
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extern t_stat isbc206_cfg(uint8 base);
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extern t_stat isbc208_cfg(uint8 base);
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extern t_stat zx200a_cfg(uint8 base);
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extern t_stat RAM_cfg(uint16 base, uint16 size);
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extern t_stat EPROM_cfg(uint16 base, uint16 size);
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/* external globals */
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extern uint8 xack; /* XACK signal */
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extern int32 int_req; /* i8080 INT signal */
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extern DEVICE isbc064_dev;
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extern DEVICE isbc464_dev;
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extern DEVICE isbc201_dev;
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extern DEVICE isbc202_dev;
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extern DEVICE isbc206_dev;
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extern DEVICE isbc208_dev;
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extern DEVICE zx200a_dev;
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/* multibus Standard SIMH Device Data Structures */
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UNIT multibus_unit = {
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UDATA (&multibus_svc, 0, 0), 20
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};
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REG multibus_reg[] = {
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{ HRDATA (MBIRQ, mbirq, 32) },
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{ HRDATA (XACK, xack, 8) },
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{ NULL }
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};
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DEBTAB multibus_debug[] = {
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{ "ALL", DEBUG_all },
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{ "FLOW", DEBUG_flow },
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{ "READ", DEBUG_read },
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{ "WRITE", DEBUG_write },
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{ "LEV1", DEBUG_level1 },
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{ "LEV2", DEBUG_level2 },
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{ NULL }
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};
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DEVICE multibus_dev = {
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"MBIRQ", //name
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&multibus_unit, //units
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multibus_reg, //registers
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NULL, //modifiers
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1, //numunits
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16, //aradix
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16, //awidth
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1, //aincr
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16, //dradix
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8, //dwidth
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NULL, //examine
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NULL, //deposit
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&multibus_reset, //reset
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NULL, //boot
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NULL, //attach
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NULL, //detach
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NULL, //ctxt
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DEV_DEBUG, //flags
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0, //dctrl
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multibus_debug, //debflags
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NULL, //msize
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NULL //lname
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};
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/* Service routines to handle simulator functions */
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// multibus_cfg
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t_stat multibus_cfg(void)
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{
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sim_printf("Configuring Multibus Devices\n");
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if (SBC064_NUM) isbc064_cfg(SBC064_BASE, SBC064_SIZE);
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if (SBC464_NUM) isbc464_cfg(SBC464_BASE, SBC464_SIZE);
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if (SBC201_NUM) isbc201_cfg(SBC201_BASE);
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if (SBC202_NUM) isbc202_cfg(SBC202_BASE);
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if (SBC206_NUM) isbc206_cfg(SBC206_BASE);
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if (SBC208_NUM) isbc208_cfg(SBC208_BASE);
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if (ZX200A_NUM) zx200a_cfg(ZX200A_BASE);
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return SCPE_OK;
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}
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/* service routine - actually does the simulated interrupts */
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t_stat multibus_svc(UNIT *uptr)
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{
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switch (mbirq) {
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case INT_1:
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set_cpuint(INT_R);
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#if NIPC
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clr_irq(SBC202_INT); /***** bad, bad, bad! */
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#endif
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// sim_printf("multibus_svc: mbirq=%04X int_req=%04X\n", mbirq, int_req);
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break;
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default:
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// sim_printf("multibus_svc: default mbirq=%04X\n", mbirq);
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break;
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}
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sim_activate (&multibus_unit, multibus_unit.wait); /* continue poll */
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return SCPE_OK;
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}
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/* Reset routine */
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t_stat multibus_reset(DEVICE *dptr)
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{
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if (SBC_reset(NULL) == 0) {
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sim_printf(" Multibus: Reset\n");
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if (SBC064_NUM) { //device installed
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isbc064_reset(&isbc064_dev);
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sim_printf(" Multibus: SBC064 reset\n");
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}
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if (SBC464_NUM) { //unit enabled
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isbc464_reset(&isbc464_dev);
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sim_printf(" Multibus: SBC464 reset\n");
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}
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if (SBC201_NUM) { //unit enabled
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isbc201_reset(&isbc201_dev);
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sim_printf(" Multibus: SBC201 reset\n");
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}
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if (SBC202_NUM) { //unit enabled
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isbc202_reset(&isbc202_dev);
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sim_printf(" Multibus: SBC202 reset\n");
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}
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if (SBC206_NUM) { //unit enabled
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isbc206_reset(&isbc206_dev);
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sim_printf(" Multibus: SBC206 reset\n");
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}
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if (SBC208_NUM) { //unit enabled
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isbc208_reset(&isbc208_dev);
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sim_printf(" Multibus: SBC208 reset\n");
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}
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if (ZX200A_NUM) { //unit enabled
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zx200a_reset(&zx200a_dev);
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sim_printf(" Multibus: ZX200A reset\n");
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}
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sim_activate (&multibus_unit, multibus_unit.wait); /* activate unit */
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return SCPE_OK;
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} else {
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sim_printf(" Multibus: SBC not selected\n");
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return SCPE_OK;
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}
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}
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void set_irq(int32 int_num)
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{
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mbirq |= int_num;
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// sim_printf("set_irq: int_num=%04X mbirq=%04X\n", int_num, mbirq);
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}
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void clr_irq(int32 int_num)
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{
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mbirq &= ~int_num;
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}
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/* This is the I/O configuration table. There are 256 possible
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device addresses, if a device is plugged to a port it's routine
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address is here, 'nulldev' means no device has been registered.
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*/
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struct idev {
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uint8 (*routine)(t_bool io, uint8 data, uint8 devnum);
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uint8 port;
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uint8 devnum;
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};
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struct idev dev_table[256] = {
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 000H */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 004H */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 008H */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 00CH */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 010H */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 014H */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 018H */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 01CH */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 020H */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 024H */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 028H */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 02CH */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 030H */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 034H */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 038H */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 03CH */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 040H */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 044H */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 048H */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 04CH */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 050H */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 054H */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 058H */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 05CH */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 060H */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 064H */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 068H */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 06CH */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 070H */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 074H */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 078H */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 07CH */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 080H */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 084H */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 088H */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 08CH */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 090H */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 094H */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 098H */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 09CH */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 0A0H */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 0A4H */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 0A8H */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 0A0H */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 0B0H */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 0B4H */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 0B8H */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 0B0H */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 0C0H */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 0C4H */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 0C8H */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 0CCH */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 0D0H */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 0D4H */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 0D8H */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 0DCH */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 0E0H */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 0E4H */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 0E8H */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 0ECH */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 0F0H */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 0F4H */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 0F8H */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev} /* 0FCH */
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};
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uint8 nulldev(t_bool flag, uint8 data, uint8 devnum)
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{
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SET_XACK(0); /* set no XACK */
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return 0; //should be 0xff, but ISIS won't boot if not 0!
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}
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uint8 reg_dev(uint8 (*routine)(t_bool io, uint8 data, uint8 devnum), uint8 port, uint8 devnum)
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{
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if (dev_table[port].routine != &nulldev) { /* port already assigned */
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if (dev_table[port].routine != routine) { /* different device? */
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sim_printf(" Multibus: I/O Port %02X is already assigned to different device\n", port);
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return 1;
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} else
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return 0;
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} else {
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dev_table[port].routine = routine;
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dev_table[port].devnum = devnum;
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}
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return 0;
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}
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/* get a byte from memory */
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uint8 multibus_get_mbyte(uint16 addr)
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{
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uint8 val = 0;
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SET_XACK(0); /* set no XACK */
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if ((isbc464_dev.flags & DEV_DIS) == 0) { //ROM is enabled
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if (addr >= SBC464_BASE && addr <= (SBC464_BASE + SBC464_SIZE))
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return(isbc464_get_mbyte(addr));
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}
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if (xack == 0)
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val = RAM_get_mbyte(addr);
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return val;
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}
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/* get a word from memory */
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uint16 multibus_get_mword(uint16 addr)
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{
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uint16 val;
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val = multibus_get_mbyte(addr);
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val |= (multibus_get_mbyte(addr+1) << 8);
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return val;
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}
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/* put a byte to memory */
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void multibus_put_mbyte(uint16 addr, uint8 val)
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{
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SET_XACK(0); /* set no XACK */
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RAM_put_mbyte(addr, val);
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}
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/* put a word to memory */
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void multibus_put_mword(uint16 addr, uint16 val)
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{
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multibus_put_mbyte(addr, val & 0xff);
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multibus_put_mbyte(addr+1, val >> 8);
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}
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/* end of ipcmultibus.c */
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