9c4779c061
The makefile now works for Linux and most Unix's. Howevr, for Solaris and MacOS, you must first export the OSTYPE environment variable: > export OSTYPE > make Otherwise, you will get build errors. 1. New Features 1.1 3.8-0 1.1.1 SCP and Libraries - BREAK, NOBREAK, and SHOW BREAK with no argument will set, clear, and show (respectively) a breakpoint at the current PC. 1.1.2 GRI - Added support for the GRI-99 processor. 1.1.3 HP2100 - Added support for the BACI terminal interface. - Added support for RTE OS/VMA/EMA, SIGNAL, VIS firmware extensions. 1.1.4 Nova - Added support for 64KW memory (implemented in third-party CPU's). 1.1.5 PDP-11 - Added support for DC11, RC11, KE11A, KG11A. - Added modem control support for DL11. - Added ASCII character support for all 8b devices. 1.2 3.8-1 1.2.1 SCP and libraries - Added capability to set line connection order for terminal multiplexers. 1.2.2 HP2100 - Added support for 12620A/12936A privileged interrupt fence. - Added support for 12792C eight-channel asynchronous multiplexer. 2. Bugs Fixed Please see the revision history on http://simh.trailing-edge.com or in the source module sim_rev.h.
324 lines
17 KiB
C
324 lines
17 KiB
C
/* hp2100_defs.h: HP 2100 simulator definitions
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Copyright (c) 1993-2008, Robert M. Supnik
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Permission is hereby granted, free of charge, to any person obtaining a
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copy of this software and associated documentation files (the "Software"),
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to deal in the Software without restriction, including without limitation
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the rights to use, copy, modify, merge, publish, distribute, sublicense,
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and/or sell copies of the Software, and to permit persons to whom the
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Software is furnished to do so, subject to the following conditions:
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The above copyright notice and this permission notice shall be included in
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all copies or substantial portions of the Software.
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THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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ROBERT M SUPNIK BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
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IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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Except as contained in this notice, the name of Robert M Supnik shall not
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be used in advertising or otherwise to promote the sale, use or other dealings
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in this Software without prior written authorization from Robert M Supnik.
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07-Sep-08 JDB Added POLL_FIRST to indicate immediate connection attempt
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15-Jul-08 JDB Rearranged declarations with hp2100_cpu.h
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26-Jun-08 JDB Rewrote device I/O to model backplane signals
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25-Jun-08 JDB Added PIF device
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17-Jun-08 JDB Declared fmt_char() function
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26-May-08 JDB Added MPX device
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24-Apr-08 JDB Added I_MRG_I, I_JSB, I_JSB_I, and I_JMP instruction masks
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14-Apr-08 JDB Changed TMR_MUX to TMR_POLL for idle support
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Added POLLMODE, sync_poll() declaration
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Added I_MRG, I_ISZ, I_IOG, I_STF, and I_SFS instruction masks
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07-Dec-07 JDB Added BACI device
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10-Nov-07 JDB Added 16/32-bit unsigned-to-signed conversions
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11-Jan-07 JDB Added 12578A DMA byte packing to DMA structure
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28-Dec-06 JDB Added CRS backplane signal as I/O pseudo-opcode
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Added DMASK32 32-bit mask value
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21-Dec-06 JDB Changed MEM_ADDR_OK for 21xx loader support
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12-Sep-06 JDB Define NOTE_IOG to recalc interrupts after instr exec
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Rename STOP_INDINT to NOTE_INDINT (not a stop condition)
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30-Dec-04 JDB Added IBL_DS_HEAD head number mask
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19-Nov-04 JDB Added STOP_OFFLINE, STOP_PWROFF stop codes
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25-Apr-04 RMS Added additional IBL definitions
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Added DMA EDT I/O pseudo-opcode
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25-Apr-03 RMS Revised for extended file support
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24-Oct-02 RMS Added indirect address interrupt
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08-Feb-02 RMS Added DMS definitions
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01-Feb-02 RMS Added terminal multiplexor support
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16-Jan-02 RMS Added additional device support
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30-Nov-01 RMS Added extended SET/SHOW support
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15-Oct-00 RMS Added dynamic device numbers
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14-Apr-99 RMS Changed t_addr to unsigned
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The author gratefully acknowledges the help of Jeff Moffat in answering
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questions about the HP2100; and of Dave Bryan in adding features and
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correcting errors throughout the simulator.
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*/
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#ifndef _HP2100_DEFS_H_
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#define _HP2100_DEFS_H_ 0
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#include "sim_defs.h" /* simulator defns */
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/* Simulator stop and notification codes */
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#define STOP_RSRV 1 /* must be 1 */
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#define STOP_IODV 2 /* must be 2 */
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#define STOP_HALT 3 /* HALT */
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#define STOP_IBKPT 4 /* breakpoint */
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#define STOP_IND 5 /* indirect loop */
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#define NOTE_INDINT 6 /* indirect intr */
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#define STOP_NOCONN 7 /* no connection */
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#define STOP_OFFLINE 8 /* device offline */
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#define STOP_PWROFF 9 /* device powered off */
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#define NOTE_IOG 10 /* I/O instr executed */
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/* Memory */
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#define MEMSIZE (cpu_unit.capac) /* actual memory size */
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#define VA_N_SIZE 15 /* virtual addr size */
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#define VASIZE (1 << VA_N_SIZE)
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#define VAMASK 077777 /* virt addr mask */
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#define PA_N_SIZE 20 /* phys addr size */
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#define PASIZE (1 << PA_N_SIZE)
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#define PAMASK (PASIZE - 1) /* phys addr mask */
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/* Architectural constants */
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#define SIGN32 020000000000 /* 32b sign */
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#define DMASK32 037777777777 /* 32b data mask/maximum value */
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#define DMAX32 017777777777 /* 32b maximum signed value */
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#define SIGN 0100000 /* 16b sign */
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#define DMASK 0177777 /* 16b data mask/maximum value */
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#define DMAX 0077777 /* 16b maximum signed value */
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#define DMASK8 0377 /* 8b data mask/maximum value */
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/* Portable conversions (sign-extension, unsigned-to-signed) */
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#define SEXT(x) ((int32) (((x) & SIGN)? ((x) | ~DMASK): ((x) & DMASK)))
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#define INT16(u) ((u) > DMAX ? (-(int16) (DMASK - (u)) - 1) : (int16) (u))
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#define INT32(u) ((u) > DMAX32 ? (-(int32) (DMASK32 - (u)) - 1) : (int32) (u))
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/* Timers */
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#define TMR_CLK 0 /* clock */
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#define TMR_POLL 1 /* input polling */
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#define POLL_RATE 100 /* poll 100 times per second */
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#define POLL_FIRST 1 /* first poll is "immediate" */
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#define POLL_WAIT 15800 /* initial poll ~ 10 msec. */
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typedef enum { INITIAL, SERVICE } POLLMODE; /* poll synchronization modes */
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/* I/O instruction sub-opcodes */
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#define soHLT 0 /* halt */
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#define soFLG 1 /* set/clear flag */
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#define soSFC 2 /* skip on flag clear */
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#define soSFS 3 /* skip on flag set */
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#define soMIX 4 /* merge into A/B */
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#define soLIX 5 /* load into A/B */
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#define soOTX 6 /* output from A/B */
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#define soCTL 7 /* set/clear control */
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/* I/O backplane signals.
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The IOSIG declarations mirror the I/O backplane signals. These are sent to
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the device I/O signal handlers for action. Normally, only one signal may be
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sent at a time. However, the ioCLF signal may be added (arithmetically) to
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another signal; the handlers will process the other signal first and then the
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CLF signal.
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Implementation notes:
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1. The first valid signal must have a value > 0, and ioCLF must be
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enumerated last, so that adding ioCLF produces a result > ioCLF.
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2. The signals are structured so that all those that might change the
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interrupt state are enumerated after ioSIR. The handlers will detect
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this and add an ioSIR signal automatically.
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3. In hardware, the POPIO signal is asserted concurrently with the CRS
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signal. Under simulation, ioPOPIO implies ioCRS, so the handlers are
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structured to fall from POPIO handling into CRS handling. It is not
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necessary to send both signals for a PRESET.
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4. In hardware, the SIR signal is generated unconditionally every T5 period
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to time the setting of the IRQ flip-flop. Under simulation, ioSIR is
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sent to set the PRL, IRQ, and SRQ signals as indicated by the interface
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logic. It is necessary to send ioSIR only when that logic indicates a
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change in one or more of the three signals.
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5. In hardware, the ENF signal is unconditionally generated every T2 period
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to time the setting of the flag flip-flop and to reset the IRQ flip-flop.
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If the flag buffer flip-flip is set, then flag will be set by ENF. If
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the flag buffer is clear, ENF will not affect flag. Under simulation,
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ioENF is sent to set the flag buffer and flag flip-flops. For those
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interfaces where this action is identical to that provided by STF, the
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ioENF handler may simply fall into the ioSTF handler.
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6. The ioSKF signal is never sent to an I/O device. Rather, it is returned
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from the device if the SFC or SFS condition is true.
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7. A device will receive ioNONE when a HLT instruction is executed, and the
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H/C bit is clear (i.e., no CLF generated).
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*/
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typedef enum { CLEAR, SET } FLIP_FLOP; /* flip-flop type and values */
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typedef enum { ioNONE, /* no signal asserted */
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ioSKF, /* skip on flag */
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ioSFC, /* skip if flag is clear */
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ioSFS, /* skip if flag is set */
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ioIOI, /* I/O data input */
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ioIOO, /* I/O data output */
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ioEDT, /* end data transfer */
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ioSIR, /* set interrupt request */
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ioIAK, /* interrupt acknowledge */
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ioCRS, /* control reset */
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ioPOPIO, /* power-on preset to I/O */
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ioCLC, /* clear control flip-flop */
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ioSTC, /* set control flip-flop */
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ioENF, /* enable flag */
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ioSTF, /* set flag flip-flop */
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ioCLF } IOSIG; /* clear flag flip-flop */
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/* I/O devices - fixed assignments */
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#define CPU 000 /* interrupt control */
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#define OVF 001 /* overflow */
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#define DMALT0 002 /* DMA 0 alternate */
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#define DMALT1 003 /* DMA 1 alternate */
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#define PWR 004 /* power fail */
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#define PRO 005 /* parity/mem protect */
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#define DMA0 006 /* DMA channel 0 */
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#define DMA1 007 /* DMA channel 1 */
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#define OPTDEV DMALT0 /* start of optional devices */
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#define VARDEV (DMA1 + 1) /* start of var assign */
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#define M_NXDEV (INT_M (CPU) | INT_M (OVF) | \
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INT_M (DMALT0) | INT_M (DMALT1))
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#define M_FXDEV (M_NXDEV | INT_M (PWR) | INT_M (PRO) | \
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INT_M (DMA0) | INT_M (DMA1))
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/* I/O devices - variable assignment defaults */
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#define PTR 010 /* 12597A-002 paper tape reader */
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#define TTY 011 /* 12531C teleprinter */
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#define PTP 012 /* 12597A-005 paper tape punch */
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#define CLK 013 /* 12539C time-base generator */
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#define LPS 014 /* 12653A line printer */
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#define LPT 015 /* 12845A line printer */
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#define MTD 020 /* 12559A data */
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#define MTC 021 /* 12559A control */
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#define DPD 022 /* 12557A data */
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#define DPC 023 /* 12557A control */
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#define DQD 024 /* 12565A data */
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#define DQC 025 /* 12565A control */
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#define DRD 026 /* 12610A data */
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#define DRC 027 /* 12610A control */
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#define MSD 030 /* 13181A data */
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#define MSC 031 /* 13181A control */
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#define IPLI 032 /* 12566B link in */
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#define IPLO 033 /* 12566B link out */
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#define DS 034 /* 13037A control */
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#define BACI 035 /* 12966A Buffered Async Comm Interface */
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#define MPX 036 /* 12792A/B/C 8-channel multiplexer */
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#define PIF 037 /* 12620A/12936A Privileged Interrupt Fence */
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#define MUXL 040 /* 12920A lower data */
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#define MUXU 041 /* 12920A upper data */
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#define MUXC 042 /* 12920A control */
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/* IBL assignments */
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#define IBL_V_SEL 14 /* ROM select */
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#define IBL_M_SEL 03
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#define IBL_PTR 0000000 /* PTR */
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#define IBL_DP 0040000 /* disk: DP */
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#define IBL_DQ 0060000 /* disk: DQ */
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#define IBL_MS 0100000 /* option 0: MS */
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#define IBL_DS 0140000 /* option 1: DS */
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#define IBL_MAN 0010000 /* RPL/man boot */
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#define IBL_V_DEV 6 /* dev in <11:6> */
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#define IBL_OPT 0000070 /* options in <5:3> */
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#define IBL_DP_REM 0000001 /* DP removable */
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#define IBL_DS_HEAD 0000003 /* DS head number */
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#define IBL_LNT 64 /* boot ROM length */
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#define IBL_MASK (IBL_LNT - 1) /* boot length mask */
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#define IBL_DPC (IBL_LNT - 2) /* DMA ctrl word */
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#define IBL_END (IBL_LNT - 1) /* last location */
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typedef uint16 BOOT_ROM [IBL_LNT]; /* boot ROM data */
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/* Dynamic device information table */
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typedef uint32 IODISP (uint32 select_code, IOSIG signal, uint32 data); /* I/O signal dispatch function */
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typedef struct {
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uint32 devno; /* device select code */
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IODISP *iot; /* pointer to I/O signal dispatcher */
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} DIB;
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/* I/O macros */
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#define IOBASE(S) ((S) > ioCLF ? (S) - ioCLF : (S)) /* base signal from compound signal */
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#define INT_V(x) ((x) & 037) /* device bit position */
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#define INT_M(x) (1u << INT_V (x)) /* device bit mask */
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#define setSKF(B) data = (uint32) ((B) ? ioSKF : ioNONE)
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#define setPRL(S,B) dev_prl[(S)/32] = dev_prl[(S)/32] & ~INT_M (S) | (((B) & 1) << INT_V (S))
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#define setIRQ(S,B) dev_irq[(S)/32] = dev_irq[(S)/32] & ~INT_M (S) | (((B) & 1) << INT_V (S))
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#define setSRQ(S,B) dev_srq[(S)/32] = dev_srq[(S)/32] & ~INT_M (S) | (((B) & 1) << INT_V (S))
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#define setstdSKF(N) setSKF ((base_signal == ioSFC) && !N ## _flag || \
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(base_signal == ioSFS) && N ## _flag)
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#define setstdPRL(S,N) setPRL ((S), !(N ## _control & N ## _flag));
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#define setstdIRQ(S,N) setIRQ ((S), N ## _control & N ## _flag & N ## _flagbuf);
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#define setstdSRQ(S,N) setSRQ ((S), N ## _flag);
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#define PRL(S) ((dev_prl[(S)/32] >> INT_V (S)) & 1)
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#define IRQ(S) ((dev_irq[(S)/32] >> INT_V (S)) & 1)
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#define SRQ(S) ((dev_srq[(S)/32] >> INT_V (S)) & 1)
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#define IOT_V_REASON 16
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#define IORETURN(F,V) ((F) ? (V) : SCPE_OK) /* stop on I/O error */
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/* CPU state */
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extern uint32 SR; /* S register (for IBL) */
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extern uint32 dev_prl [2], dev_irq [2], dev_srq [2]; /* I/O signal vectors */
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/* Simulator state */
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extern FILE *sim_deb;
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extern FILE *sim_log;
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extern int32 sim_step;
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extern int32 sim_switches;
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/* CPU functions */
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extern t_stat ibl_copy (const BOOT_ROM rom, int32 dev);
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extern void hp_enbdis_pair (DEVICE *ccp, DEVICE *dcp);
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/* System functions */
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extern t_stat fprint_sym (FILE *ofile, t_addr addr, t_value *val, UNIT *uptr, int32 sw);
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extern const char *fmt_char (uint8 ch);
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extern t_stat hp_setdev (UNIT *uptr, int32 val, char *cptr, void *desc);
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extern t_stat hp_showdev (FILE *st, UNIT *uptr, int32 val, void *desc);
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/* Standard device functions */
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extern int32 sync_poll (POLLMODE poll_mode);
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#endif
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