1da2d9452d
RESTRICTION: The FP15 and XVM features of the PDP-15 are only partially debugged. Do NOT enable these features for normal operations. 1. New Features in 3.1-0 1.1 SCP and libraries - Added simulated Ethernet support for VMS, FreeBSD, Mac OS/X. - Added status return to tmxr_putc_ln. - Added sim_putchar_s to handle possible output stalls. 1.2 All DECtapes - Added "DECtape off reel" error stop. 1.3 All Asynchronous Consoles - Added support for output congestion stall if using a Telnet connection. 1.4 PDP-1 - Added Type 23 parallel drum support. 1.5 PDP-8 - Added instruction history. - Added TSC8-75 option support for ETOS. - Added TD8E DECtape support. 1.6 PDP-18b - Added instruction history. - Changed PDP-9, PDP-15 API default to enabled. 1.7 PDP-11 - Added support for 18b only Qbus devices. - Formalized bus and addressing definitions. - Added control to enable/disable autoconfiguration. - Added stub support for second Unibus Ethernet controller. 1.7 Interdata 32b - Added instruction history. 1.8 Eclipse - Added floating point support. - Added programmable interval timer support. 1.9 H316 - Added DMA/DMC support. - Added fixed head disk support. - Added moving head disk support. - Added magtape support. 1.10 IBM 1130 (Brian Knittel) - Added support for physical card reader, using the Cardread interface (www.ibm1130.org/sim/downloads). - Added support for physical printer (flushes output buffer after each line). 2. Bugs Fixed in 3.1-0 2.1 SCP and libraries - Fixed numerous bugs in Ethernet library. 2.2 All DECtapes - Fixed reverse checksum value in 'read all' mode. - Simplified (and sped up) timing. 2.3 PDP-8 - Fixed bug in RX28 read status (found by Charles Dickman). - Fixed RX28 double density write. 2.4 PDP-18b - Fixed autoincrement bug in PDP-4, PDP-7, PDP-9. 2.5 PDP-11/VAX - Revised RQ MB->LBN conversion for greater accuracy. - Fixed bug in IO configuration (found by David Hittner). - Fixed bug with multiple RQ RAUSER drives. - Fixed bug in second Qbus Ethernet controller interrupts. 2.6 Nova/Eclipse - Fixed bugs in DKP flag clear, map setup, map usage (Charles Owen). - Fixed bug in MT, reset completes despite I/O reset (Charles Owen). - Fixed bug in MT, space operations return word count (Charles Owen). 2.7 IBM 1130 (Brian Knittel) - Fixed bug in setting carry bit in subtract and subtract double. - Fixed timing problem in console printer simulation. 2.8 1620 - Fixed bug in branch digit (found by Dave Babcock). 3. New Features in 3.0 vs prior releases 3.1 SCP and Libraries - Added ASSIGN/DEASSIGN (logical name) commands. - Changed RESTORE to unconditionally detach files. - Added E11 and TPC format support to magtape library. - Fixed bug in SHOW CONNECTIONS. - Added USE_ADDR64 support. 3.2 All magtapes - Magtapes support SIMH format, E11 format, and TPC format (read only). - SET <tape_unit> FORMAT=format sets the specified tape unit's format. - SHOW <tape_unit> FORMAT displays the specified tape unit's format. - Tape format can also be set as part of the ATTACH command, using the -F switch. 3.3 VAX - VAX can be compiled without USE_INT64. - If compiled with USE_INT64 and USE_ADDR64, RQ and TQ controllers support files > 2GB. - VAX ROM has speed control (SET ROM DELAY/NODELAY). 3.4 PDP-1 - Added block loader format support to LOAD. - Changed BOOT PTR to allow loading of all of the first bank of memory. - The LOAD command takes an optional argument specifying the memory field to be loaded. - The PTR BOOT command takes its starting memory field from the TA (address switch) register. 3.5 PDP-18b Family - Added PDP-4 EAE support. - Added PDP-15 FP15 support. - Added PDP-15 XVM support. - Added PDP-15 "re-entrancy ECO". - Added PDP-7, PDP-9, PDP-15 hardware RIM loader support in BOOT PTR. 4. Bugs Fixed in 3.0 vs prior releases 4.1 SCP and Libraries - Fixed end of file problem in dep, idep. - Fixed handling of trailing spaces in dep, idep. 4.2 VAX - Fixed CVTfi bug: integer overflow not set if exponent out of range - Fixed EMODx bugs: o First and second operands reversed o Separated fraction received wrong exponent o Overflow calculation on separated integer incorrect o Fraction not set to zero if exponent out of range - Fixed interval timer and ROM access to pass power-up self-test even on very fast host processors (fixes from Mark Pizzolato). - Fixed bug in user disk size (found by Chaskiel M Grundman). 4.3 1401 - Fixed mnemonic, instruction lengths, and reverse scan length check bug for MCS. - Fixed MCE bug, BS off by 1 if zero suppress. - Fixed chaining bug, D lost if return to SCP. - Fixed H branch, branch occurs after continue. - Added check for invalid 8 character MCW, LCA. - Fixed magtape load-mode end of record response. - Revised fetch to model hardware more closely. - Fixed tape read end-of-record handling based on real 1401. - Added diagnostic read (space forward). 4.4 Nova - Fixed DSK variable size interaction with restore. - Fixed bug in DSK set size routine. 4.5 PDP-1 - Fixed DT variable size interaction with restore. - Updated CPU, line printer, standard devices to detect indefinite I/O wait. - Fixed incorrect logical, missing activate, break in drum simulator. - Fixed bugs in instruction decoding, overprinting for line printer. - Fixed system hang if continue after PTR error. - Fixed PTR to start/stop on successive rpa instructions. 4.6 PDP-11 - Fixed DT variable size interaction with restore. - Fixed bug in MMR1 update (found by Tim Stark). - Added XQ features and fixed bugs: o Corrected XQ interrupts on IE state transition (code by Tom Evans). o Added XQ interrupt clear on soft reset. o Removed XQ interrupt when setting XL or RL (multiple people). o Added SET/SHOW XQ STATS. o Added SHOW XQ FILTERS. o Added ability to split received packet into multiple buffers. o Added explicit runt and giant packet processing. - Fixed bug in user disk size (found by Chaskiel M Grundman). 4.7 PDP-18B - Fixed DT, RF variable size interaction with restore. - Fixed MT bug in MTTR. - Fixed bug in PDP-4 line printer overprinting. - Fixed bug in PDP-15 memory protect/skip interaction. - Fixed bug in RF set size routine. - Increased PTP TIME for PDP-15 operating systems. - Fixed priorities in PDP-15 API (differs from PDP-9). - Fixed sign handling in PDP-15 EAE unsigned mul/div (differs from PDP-9). - Fixed bug in CAF, clears API subsystem. 4.8 PDP-8 - Fixed DT, DF, RF, RX variable size interaction with restore. - Fixed MT bug in SKTR. - Fixed bug in DF, RF set size routine. 4.9 HP2100 - Fixed bug in DP (13210A controller only), DQ read status. - Fixed bug in DP, DQ seek complete. - Fixed DR drum sizes. - Fixed DR variable capacity interaction with SAVE/RESTORE. 4.10 GRI - Fixed bug in SC queue pointer management. 4.11 PDP-10 - Fixed bug in RP read header. 4.12 Ibm1130 - Fixed bugs found by APL 1130. 4.13 Altairz80 - Fixed bug in real-time clock on Windows host. 4.14 1620 - Fixed bug in immediate index add (found by Michael Short).
989 lines
33 KiB
C
989 lines
33 KiB
C
/* nova_sys.c: NOVA simulator interface
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Copyright (c) 1993-2003, Robert M. Supnik
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Permission is hereby granted, free of charge, to any person obtaining a
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copy of this software and associated documentation files (the "Software"),
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to deal in the Software without restriction, including without limitation
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the rights to use, copy, modify, merge, publish, distribute, sublicense,
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and/or sell copies of the Software, and to permit persons to whom the
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Software is furnished to do so, subject to the following conditions:
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The above copyright notice and this permission notice shall be included in
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all copies or substantial portions of the Software.
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THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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ROBERT M SUPNIK BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
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IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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Except as contained in this notice, the name of Robert M Supnik shall not
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be used in advertising or otherwise to promote the sale, use or other dealings
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in this Software without prior written authorization from Robert M Supnik.
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24-Nov-03 CEO Added symbolic support for LEF instruction
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17-Sep-01 RMS Removed multiconsole support
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31-May-01 RMS Added multiconsole support
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14-Mar-01 RMS Revised load/dump interface (again)
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22-Dec-00 RMS Added second terminal support
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10-Dec-00 RMS Added Eclipse support
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08-Dec-00 BKR Added plotter support
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30-Oct-00 RMS Added support for examine to file
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15-Oct-00 RMS Added stack, byte, trap instructions
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14-Apr-99 RMS Changed t_addr to unsigned
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27-Oct-98 RMS V2.4 load interface
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24-Sep-97 RMS Fixed bug in device name table (found by Charles Owen)
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*/
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#include "nova_defs.h"
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#include <ctype.h>
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extern DEVICE cpu_dev;
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extern UNIT cpu_unit;
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#if defined (ECLIPSE)
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extern DEVICE map_dev;
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extern DEVICE fpu_dev;
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extern DEVICE pit_dev;
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extern int32 Usermap;
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extern int32 MapStat;
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#endif
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extern DEVICE ptr_dev;
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extern DEVICE ptp_dev;
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extern DEVICE plt_dev;
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extern DEVICE tti_dev;
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extern DEVICE tto_dev;
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extern DEVICE tti1_dev;
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extern DEVICE tto1_dev;
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extern DEVICE clk_dev;
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extern DEVICE lpt_dev;
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extern DEVICE dkp_dev;
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extern DEVICE dsk_dev;
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extern DEVICE mta_dev;
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extern REG cpu_reg[];
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extern uint16 M[];
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extern int32 saved_PC;
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/* SCP data structures
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sim_name simulator name string
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sim_PC pointer to saved PC register descriptor
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sim_emax number of words needed for examine
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sim_devices array of pointers to simulated devices
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sim_stop_messages array of pointers to stop messages
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sim_load binary loader
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*/
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#if defined (ECLIPSE)
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char sim_name[] = "ECLIPSE";
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#else
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char sim_name[] = "NOVA";
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#endif
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REG *sim_PC = &cpu_reg[0];
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int32 sim_emax = 4;
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DEVICE *sim_devices[] = {
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&cpu_dev,
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#if defined (ECLIPSE)
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&map_dev,
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&fpu_dev,
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&pit_dev,
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#endif
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&ptr_dev,
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&ptp_dev,
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&tti_dev,
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&tto_dev,
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&tti1_dev,
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&tto1_dev,
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&clk_dev,
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&plt_dev,
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&lpt_dev,
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&dsk_dev,
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&dkp_dev,
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&mta_dev,
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NULL };
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const char *sim_stop_messages[] = {
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"Unknown error",
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"Unknown I/O instruction",
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"HALT instruction",
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"Breakpoint",
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"Nested indirect address limit exceeded",
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"Nested indirect interrupt address limit exceeded",
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"Nested indirect trap address limit exceeded",
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"Read breakpoint",
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"Write breakpoint" };
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/* Binary loader
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Loader format consists of blocks, optionally preceded, separated, and
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followed by zeroes. Each block consists of:
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lo_count
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hi_count
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lo_origin
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hi_origin
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lo_checksum
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hi_checksum
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lo_data byte ---
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hi_data byte |
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: > -count words
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lo_data byte |
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hi_data byte ---
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If the word count is [0,-20], then the block is normal data.
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If the word count is [-21,-n], then the block is repeated data.
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If the word count is 1, the block is the start address.
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If the word count is >1, the block is an error block.
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*/
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t_stat sim_load (FILE *fileref, char *cptr, char *fnam, int flag)
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{
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int32 data, csum, count, state, i;
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uint32 origin;
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if ((*cptr != 0) || (flag != 0)) return SCPE_ARG;
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state = 0;
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while ((i = getc (fileref)) != EOF) {
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switch (state) {
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case 0: /* leader */
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count = i;
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state = (count != 0);
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break;
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case 1: /* high count */
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csum = count = (i << 8) | count;
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state = 2;
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break;
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case 2: /* low origin */
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origin = i;
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state = 3;
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break;
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case 3: /* high origin */
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origin = (i << 8) | origin;
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csum = csum + origin;
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state = 4;
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break;
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case 4: /* low checksum */
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csum = csum + i;
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state = 5;
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break;
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case 5: /* high checksum */
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csum = csum + (i << 8);
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if (count == 1) saved_PC = origin; /* count = 1? */
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if (count <= 1) { /* count = 0/1? */
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if (csum & 0177777) return SCPE_CSUM;
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state = 0;
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break; }
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if (count < 0100000) { /* count > 1 */
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state = 8;
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break; }
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count = 0200000 - count;
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state = 6;
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break;
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case 6: /* low data */
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data = i;
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state = 7;
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break;
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case 7: /* high data */
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data = (i << 8) | data;
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csum = csum + data;
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if (count > 20) { /* large block */
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for (count = count - 1; count == 1; count--) {
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if (origin >= MEMSIZE) return SCPE_NXM;
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M[origin] = data;
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origin = origin + 1; } }
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if (origin >= MEMSIZE) return SCPE_NXM;
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M[origin] = data;
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origin = origin + 1;
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count = count - 1;
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if (count == 0) {
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if (csum & 0177777) return SCPE_CSUM;
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state = 0;
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break; }
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state = 6;
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break;
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case 8: /* error block */
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if (i == 0377) state = 0;
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break; } /* end switch */
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} /* end while */
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/* Ok to find end of tape between blocks or in error state */
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return ((state == 0) || (state == 8))? SCPE_OK: SCPE_FMT;
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}
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/* Symbol tables */
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#define I_V_FL 18 /* flag bits */
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#define I_M_FL 037 /* flag width */
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#define I_V_NPN 000 /* no operands */
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#define I_V_R 001 /* reg */
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#define I_V_D 002 /* device */
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#define I_V_RD 003 /* reg,device */
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#define I_V_M 004 /* mem addr */
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#define I_V_RM 005 /* reg,mem addr */
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#define I_V_RR 006 /* operate */
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#define I_V_BY 007 /* Nova byte pointer */
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#define I_V_2AC 010 /* reg,reg */
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#define I_V_RSI 011 /* reg,short imm */
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#define I_V_LI 012 /* long imm */
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#define I_V_RLI 013 /* reg,long imm */
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#define I_V_LM 014 /* long mem addr */
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#define I_V_RLM 015 /* reg,long mem addr */
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#define I_V_FRM 016 /* flt reg,long mem addr */
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#define I_V_FST 017 /* flt long mem, status */
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#define I_V_XP 020 /* XOP */
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#define I_NPN (I_V_NPN << I_V_FL)
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#define I_R (I_V_R << I_V_FL)
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#define I_D (I_V_D << I_V_FL)
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#define I_RD (I_V_RD << I_V_FL)
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#define I_M (I_V_M << I_V_FL)
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#define I_RM (I_V_RM << I_V_FL)
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#define I_RR (I_V_RR << I_V_FL)
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#define I_BY (I_V_BY << I_V_FL)
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#define I_2AC (I_V_2AC << I_V_FL)
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#define I_RSI (I_V_RSI << I_V_FL)
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#define I_LI (I_V_LI << I_V_FL)
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#define I_RLI (I_V_RLI << I_V_FL)
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#define I_LM (I_V_LM << I_V_FL)
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#define I_RLM (I_V_RLM << I_V_FL)
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#define I_FRM (I_V_FRM << I_V_FL)
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#define I_FST (I_V_FST << I_V_FL)
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#define I_XP (I_V_XP << I_V_FL)
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static const int32 masks[] = {
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0177777, 0163777, 0177700, 0163700,
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0174000, 0160000, 0103770, 0163477,
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0103777, 0103777, 0177777, 0163777,
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0176377, 0162377, 0103777, 0163777,
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0100077 };
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static const char *opcode[] = {
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"JMP", "JSR", "ISZ", "DSZ",
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"LDA", "STA",
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#if defined (ECLIPSE)
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"ADI", "SBI", "DAD", "DSB",
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"IOR", "XOR", "ANC", "XCH",
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"SGT", "SGE", "LSH", "DLSH",
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"HXL", "HXR", "DHXL", "DHXR",
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"BTO", "BTZ", "SBZ", "SZBO",
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"LOB", "LRB", "COB", "LDB",
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"STB", "PSH", "POP",
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"LMP", "SYC",
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"PSHR", "POPB", "BAM", "POPJ",
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"RTN", "BLM", "DIVX",
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"MUL", "MULS", "DIV", "DIVS",
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"SAVE", "RSTR",
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"XOP",
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"FAS", "FAD", "FSS", "FSD",
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"FMS", "FMD", "FDS", "FDD",
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"FAMS", "FAMD", "FSMS", "FSMD",
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"FMMS", "FMMD", "FDMS", "FDMD",
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"FLDS", "FLDD", "FSTS", "FSTD",
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"FLAS", "FLMD", "FFAS", "FFMD",
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"FNOM", "FRH", "FAB", "FNEG",
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"FSCAL", "FEXP", "FINT", "FHLV",
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"FNS", "FSA", "FSEQ", "FSNE",
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"FSLT", "FSGE", "FSLE", "FSGT",
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"FSNM", "FSND", "FSNU", "FSNUD",
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"FSNO", "FSNOD", "FSNUO", "FSNER",
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"FSST", "FLST",
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"FTE", "FTD", "FCLE",
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"FPSH", "FPOP",
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"FCMP", "FMOV",
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"CMV", "CMP", "CTR", "CMT",
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"EJMP", "EJSR", "EISZ", "EDSZ",
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"ELDA", "ESTA", "ELEF",
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"ELDB", "ESTB", "DSPA",
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"PSHJ", "CLM", "SNB",
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"MSP", "XCT", "HLV",
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"IORI", "XORI", "ANDI", "ADDI",
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#endif
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"COM", "COMZ", "COMO", "COMC",
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"COML", "COMZL", "COMOL", "COMCL",
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"COMR", "COMZR", "COMOR", "COMCR",
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"COMS", "COMZS", "COMOS", "COMCS",
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"COM#", "COMZ#", "COMO#", "COMC#",
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"COML#", "COMZL#", "COMOL#", "COMCL#",
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"COMR#", "COMZR#", "COMOR#", "COMCR#",
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"COMS#", "COMZS#", "COMOS#", "COMCS#",
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"NEG", "NEGZ", "NEGO", "NEGC",
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"NEGL", "NEGZL", "NEGOL", "NEGCL",
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"NEGR", "NEGZR", "NEGOR", "NEGCR",
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"NEGS", "NEGZS", "NEGOS", "NEGCS",
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"NEG#", "NEGZ#", "NEGO#", "NEGC#",
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"NEGL#", "NEGZL#", "NEGOL#", "NEGCL#",
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"NEGR#", "NEGZR#", "NEGOR#", "NEGCR#",
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"NEGS#", "NEGZS#", "NEGOS#", "NEGCS#",
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"MOV", "MOVZ", "MOVO", "MOVC",
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"MOVL", "MOVZL", "MOVOL", "MOVCL",
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"MOVR", "MOVZR", "MOVOR", "MOVCR",
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"MOVS", "MOVZS", "MOVOS", "MOVCS",
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"MOV#", "MOVZ#", "MOVO#", "MOVC#",
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"MOVL#", "MOVZL#", "MOVOL#", "MOVCL#",
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"MOVR#", "MOVZR#", "MOVOR#", "MOVCR#",
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"MOVS#", "MOVZS#", "MOVOS#", "MOVCS#",
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"INC", "INCZ", "INCO", "INCC",
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"INCL", "INCZL", "INCOL", "INCCL",
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"INCR", "INCZR", "INCOR", "INCCR",
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"INCS", "INCZS", "INCOS", "INCCS",
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"INC#", "INCZ#", "INCO#", "INCC#",
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"INCL#", "INCZL#", "INCOL#", "INCCL#",
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"INCR#", "INCZR#", "INCOR#", "INCCR#",
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"INCS#", "INCZS#", "INCOS#", "INCCS#",
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"ADC", "ADCZ", "ADCO", "ADCC",
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"ADCL", "ADCZL", "ADCOL", "ADCCL",
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"ADCR", "ADCZR", "ADCOR", "ADCCR",
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"ADCS", "ADCZS", "ADCOS", "ADCCS",
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"ADC#", "ADCZ#", "ADCO#", "ADCC#",
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"ADCL#", "ADCZL#", "ADCOL#", "ADCCL#",
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||
"ADCR#", "ADCZR#", "ADCOR#", "ADCCR#",
|
||
"ADCS#", "ADCZS#", "ADCOS#", "ADCCS#",
|
||
"SUB", "SUBZ", "SUBO", "SUBC",
|
||
"SUBL", "SUBZL", "SUBOL", "SUBCL",
|
||
"SUBR", "SUBZR", "SUBOR", "SUBCR",
|
||
"SUBS", "SUBZS", "SUBOS", "SUBCS",
|
||
"SUB#", "SUBZ#", "SUBO#", "SUBC#",
|
||
"SUBL#", "SUBZL#", "SUBOL#", "SUBCL#",
|
||
"SUBR#", "SUBZR#", "SUBOR#", "SUBCR#",
|
||
"SUBS#", "SUBZS#", "SUBOS#", "SUBCS#",
|
||
"ADD", "ADDZ", "ADDO", "ADDC",
|
||
"ADDL", "ADDZL", "ADDOL", "ADDCL",
|
||
"ADDR", "ADDZR", "ADDOR", "ADDCR",
|
||
"ADDS", "ADDZS", "ADDOS", "ADDCS",
|
||
"ADD#", "ADDZ#", "ADDO#", "ADDC#",
|
||
"ADDL#", "ADDZL#", "ADDOL#", "ADDCL#",
|
||
"ADDR#", "ADDZR#", "ADDOR#", "ADDCR#",
|
||
"ADDS#", "ADDZS#", "ADDOS#", "ADDCS#",
|
||
"AND", "ANDZ", "ANDO", "ANDC",
|
||
"ANDL", "ANDZL", "ANDOL", "ANDCL",
|
||
"ANDR", "ANDZR", "ANDOR", "ANDCR",
|
||
"ANDS", "ANDZS", "ANDOS", "ANDCS",
|
||
"AND#", "ANDZ#", "ANDO#", "ANDC#",
|
||
"ANDL#", "ANDZL#", "ANDOL#", "ANDCL#",
|
||
"ANDR#", "ANDZR#", "ANDOR#", "ANDCR#",
|
||
"ANDS#", "ANDZS#", "ANDOS#", "ANDCS#",
|
||
"ION", "IOF",
|
||
"RDSW", "INTA", "MSKO", "IORST", "HALT",
|
||
#if !defined (ECLIPSE)
|
||
"MUL", "DIV", "MULS", "DIVS",
|
||
"PSHA", "POPA", "SAV", "RET",
|
||
"MTSP", "MTFP", "MFSP", "MFFP",
|
||
"LDB", "STB",
|
||
#endif
|
||
"NIO", "NIOS", "NIOC", "NIOP",
|
||
"DIA", "DIAS", "DIAC", "DIAP",
|
||
"DOA", "DOAS", "DOAC", "DOAP",
|
||
"DIB", "DIBS", "DIBC", "DIBP",
|
||
"DOB", "DOBS", "DOBC", "DOBP",
|
||
"DIC", "DICS", "DICC", "DICP",
|
||
"DOC", "DOCS", "DOCC", "DOCP",
|
||
"SKPBN", "SKPBZ", "SKPDN", "SKPDZ",
|
||
#if defined (ECLIPSE)
|
||
"LEF", "LEF", "LEF", "LEF",
|
||
#endif
|
||
NULL };
|
||
|
||
static const opc_val[] = {
|
||
0000000+I_M, 0004000+I_M, 0010000+I_M, 0014000+I_M,
|
||
0020000+I_RM, 0040000+I_RM,
|
||
#if defined (ECLIPSE)
|
||
0100010+I_RSI, 0100110+I_RSI, 0100210+I_2AC, 0100310+I_2AC,
|
||
0100410+I_2AC, 0100510+I_2AC, 0100610+I_2AC, 0100710+I_2AC,
|
||
0101010+I_2AC, 0101110+I_2AC, 0101210+I_RSI, 0101310+I_RSI,
|
||
0101410+I_RSI, 0101510+I_RSI, 0101610+I_RSI, 0101710+I_RSI,
|
||
0102010+I_2AC, 0102110+I_2AC, 0102210+I_2AC, 0102310+I_2AC,
|
||
0102410+I_2AC, 0102510+I_2AC, 0102610+I_2AC, 0102710+I_2AC,
|
||
0103010+I_2AC, 0103110+I_2AC, 0103210+I_2AC,
|
||
0113410+I_NPN, 0103510+I_2AC,
|
||
0103710+I_NPN, 0107710+I_NPN, 0113710+I_NPN, 0117710+I_NPN,
|
||
0127710+I_NPN, 0133710+I_NPN, 0137710+I_NPN,
|
||
0143710+I_NPN, 0147710+I_NPN, 0153710+I_NPN, 0157710+I_NPN,
|
||
0163710+I_LI, 0167710+I_NPN,
|
||
0100030+I_XP,
|
||
0100050+I_2AC, 0100150+I_2AC, 0100250+I_2AC, 0100350+I_2AC,
|
||
0100450+I_2AC, 0100550+I_2AC, 0100650+I_2AC, 0100750+I_2AC,
|
||
0101050+I_FRM, 0101150+I_FRM, 0101250+I_FRM, 0101350+I_FRM,
|
||
0101450+I_FRM, 0101550+I_FRM, 0101650+I_FRM, 0101750+I_FRM,
|
||
0102050+I_FRM, 0102150+I_FRM, 0102250+I_FRM, 0102350+I_FRM,
|
||
0102450+I_2AC, 0102550+I_FRM, 0102650+I_2AC, 0102750+I_FRM,
|
||
0103050+I_R, 0123050+I_R, 0143050+I_R, 0163050+I_R,
|
||
0103150+I_R, 0123150+I_R, 0143150+I_R, 0163150+I_R,
|
||
0103250+I_NPN, 0107250+I_NPN, 0113250+I_NPN, 0117250+I_NPN,
|
||
0123250+I_NPN, 0127250+I_NPN, 0133250+I_NPN, 0137250+I_NPN,
|
||
0143250+I_NPN, 0147250+I_NPN, 0153250+I_NPN, 0157250+I_NPN,
|
||
0163250+I_NPN, 0167250+I_NPN, 0173250+I_NPN, 0177250+I_NPN,
|
||
0103350+I_FST, 0123350+I_FST,
|
||
0143350+I_NPN, 0147350+I_NPN, 0153350+I_NPN,
|
||
0163350+I_NPN, 0167350+I_NPN,
|
||
0103450+I_2AC, 0103550+I_2AC,
|
||
0153650+I_NPN, 0157650+I_NPN, 0163650+I_NPN, 0167650+I_NPN,
|
||
0102070+I_LM, 0106070+I_LM, 0112070+I_LM, 0116070+I_LM,
|
||
0122070+I_RLM, 0142070+I_RLM, 0162070+I_RLM,
|
||
0102170+I_RLM, 0122170+I_RLM, 0142170+I_RLM,
|
||
0102270+I_LM, 0102370+I_2AC, 0102770+I_2AC,
|
||
0103370+I_R, 0123370+I_R, 0143370+I_R,
|
||
0103770+I_RLI, 0123770+I_RLI, 0143770+I_RLI, 0163770+I_RLI,
|
||
#endif
|
||
0100000+I_RR, 0100020+I_RR, 0100040+I_RR, 0100060+I_RR,
|
||
0100100+I_RR, 0100120+I_RR, 0100140+I_RR, 0100160+I_RR,
|
||
0100200+I_RR, 0100220+I_RR, 0100240+I_RR, 0100260+I_RR,
|
||
0100300+I_RR, 0100320+I_RR, 0100340+I_RR, 0100360+I_RR,
|
||
0100010+I_RR, 0100030+I_RR, 0100050+I_RR, 0100070+I_RR,
|
||
0100110+I_RR, 0100130+I_RR, 0100150+I_RR, 0100170+I_RR,
|
||
0100210+I_RR, 0100230+I_RR, 0100250+I_RR, 0100270+I_RR,
|
||
0100310+I_RR, 0100330+I_RR, 0100350+I_RR, 0100370+I_RR,
|
||
0100400+I_RR, 0100420+I_RR, 0100440+I_RR, 0100460+I_RR,
|
||
0100500+I_RR, 0100520+I_RR, 0100540+I_RR, 0100560+I_RR,
|
||
0100600+I_RR, 0100620+I_RR, 0100640+I_RR, 0100660+I_RR,
|
||
0100700+I_RR, 0100720+I_RR, 0100740+I_RR, 0100760+I_RR,
|
||
0100410+I_RR, 0100430+I_RR, 0100450+I_RR, 0100470+I_RR,
|
||
0100510+I_RR, 0100530+I_RR, 0100550+I_RR, 0100570+I_RR,
|
||
0100610+I_RR, 0100630+I_RR, 0100650+I_RR, 0100670+I_RR,
|
||
0100710+I_RR, 0100730+I_RR, 0100750+I_RR, 0100770+I_RR,
|
||
0101000+I_RR, 0101020+I_RR, 0101040+I_RR, 0101060+I_RR,
|
||
0101100+I_RR, 0101120+I_RR, 0101140+I_RR, 0101160+I_RR,
|
||
0101200+I_RR, 0101220+I_RR, 0101240+I_RR, 0101260+I_RR,
|
||
0101300+I_RR, 0101320+I_RR, 0101340+I_RR, 0101360+I_RR,
|
||
0101010+I_RR, 0101030+I_RR, 0101050+I_RR, 0101070+I_RR,
|
||
0101110+I_RR, 0101130+I_RR, 0101150+I_RR, 0101170+I_RR,
|
||
0101210+I_RR, 0101230+I_RR, 0101250+I_RR, 0101270+I_RR,
|
||
0101310+I_RR, 0101330+I_RR, 0101350+I_RR, 0101370+I_RR,
|
||
0101400+I_RR, 0101420+I_RR, 0101440+I_RR, 0101460+I_RR,
|
||
0101500+I_RR, 0101520+I_RR, 0101540+I_RR, 0101560+I_RR,
|
||
0101600+I_RR, 0101620+I_RR, 0101640+I_RR, 0101660+I_RR,
|
||
0101700+I_RR, 0101720+I_RR, 0101740+I_RR, 0101760+I_RR,
|
||
0101410+I_RR, 0101430+I_RR, 0101450+I_RR, 0101470+I_RR,
|
||
0101510+I_RR, 0101530+I_RR, 0101550+I_RR, 0101570+I_RR,
|
||
0101610+I_RR, 0101630+I_RR, 0101650+I_RR, 0101670+I_RR,
|
||
0101710+I_RR, 0101730+I_RR, 0101750+I_RR, 0101770+I_RR,
|
||
0102000+I_RR, 0102020+I_RR, 0102040+I_RR, 0102060+I_RR,
|
||
0102100+I_RR, 0102120+I_RR, 0102140+I_RR, 0102160+I_RR,
|
||
0102200+I_RR, 0102220+I_RR, 0102240+I_RR, 0102260+I_RR,
|
||
0102300+I_RR, 0102320+I_RR, 0102340+I_RR, 0102360+I_RR,
|
||
0102010+I_RR, 0102030+I_RR, 0102050+I_RR, 0102070+I_RR,
|
||
0102110+I_RR, 0102130+I_RR, 0102150+I_RR, 0102170+I_RR,
|
||
0102210+I_RR, 0102230+I_RR, 0102250+I_RR, 0102270+I_RR,
|
||
0102310+I_RR, 0102330+I_RR, 0102350+I_RR, 0102370+I_RR,
|
||
0102400+I_RR, 0102420+I_RR, 0102440+I_RR, 0102460+I_RR,
|
||
0102500+I_RR, 0102520+I_RR, 0102540+I_RR, 0102560+I_RR,
|
||
0102600+I_RR, 0102620+I_RR, 0102640+I_RR, 0102660+I_RR,
|
||
0102700+I_RR, 0102720+I_RR, 0102740+I_RR, 0102760+I_RR,
|
||
0102410+I_RR, 0102430+I_RR, 0102450+I_RR, 0102470+I_RR,
|
||
0102510+I_RR, 0102530+I_RR, 0102550+I_RR, 0102570+I_RR,
|
||
0102610+I_RR, 0102630+I_RR, 0102650+I_RR, 0102670+I_RR,
|
||
0102710+I_RR, 0102730+I_RR, 0102750+I_RR, 0102770+I_RR,
|
||
0103000+I_RR, 0103020+I_RR, 0103040+I_RR, 0103060+I_RR,
|
||
0103100+I_RR, 0103120+I_RR, 0103140+I_RR, 0103160+I_RR,
|
||
0103200+I_RR, 0103220+I_RR, 0103240+I_RR, 0103260+I_RR,
|
||
0103300+I_RR, 0103320+I_RR, 0103340+I_RR, 0103360+I_RR,
|
||
0103010+I_RR, 0103030+I_RR, 0103050+I_RR, 0103070+I_RR,
|
||
0103110+I_RR, 0103130+I_RR, 0103150+I_RR, 0103170+I_RR,
|
||
0103210+I_RR, 0103230+I_RR, 0103250+I_RR, 0103270+I_RR,
|
||
0103310+I_RR, 0103330+I_RR, 0103350+I_RR, 0103370+I_RR,
|
||
0103400+I_RR, 0103420+I_RR, 0103440+I_RR, 0103460+I_RR,
|
||
0103500+I_RR, 0103520+I_RR, 0103540+I_RR, 0103560+I_RR,
|
||
0103600+I_RR, 0103620+I_RR, 0103640+I_RR, 0103660+I_RR,
|
||
0103700+I_RR, 0103720+I_RR, 0103740+I_RR, 0103760+I_RR,
|
||
0103410+I_RR, 0103430+I_RR, 0103450+I_RR, 0103470+I_RR,
|
||
0103510+I_RR, 0103530+I_RR, 0103550+I_RR, 0103570+I_RR,
|
||
0103610+I_RR, 0103630+I_RR, 0103650+I_RR, 0103670+I_RR,
|
||
0103710+I_RR, 0103730+I_RR, 0103750+I_RR, 0103770+I_RR,
|
||
0060177+I_NPN, 0060277+I_NPN,
|
||
0060477+I_R, 0061477+I_R, 0062077+I_R, 0062677+I_NPN, 0063077+I_NPN,
|
||
#if !defined (ECLIPSE)
|
||
0073301+I_NPN, 0073101+I_NPN, 0077201+I_NPN, 0077001+I_NPN,
|
||
0061401+I_R, 0061601+I_R, 0062401+I_NPN, 0062601+I_NPN,
|
||
0061001+I_R, 0060001+I_R, 0061201+I_R, 0060201+I_R,
|
||
0060401+I_BY, 0062001+I_BY,
|
||
#endif
|
||
0060000+I_D, 0060100+I_D, 0060200+I_D, 0060300+I_D,
|
||
0060400+I_RD, 0060500+I_RD, 0060600+I_RD, 0060700+I_RD,
|
||
0061000+I_RD, 0061100+I_RD, 0061200+I_RD, 0061300+I_RD,
|
||
0061400+I_RD, 0061500+I_RD, 0061600+I_RD, 0061700+I_RD,
|
||
0062000+I_RD, 0062100+I_RD, 0062200+I_RD, 0062300+I_RD,
|
||
0062400+I_RD, 0062500+I_RD, 0062600+I_RD, 0062700+I_RD,
|
||
0063000+I_RD, 0063100+I_RD, 0063200+I_RD, 0063300+I_RD,
|
||
0063400+I_D, 0063500+I_D, 0063600+I_D, 0063700+I_D,
|
||
#if defined (ECLIPSE)
|
||
0064000+I_D, 0070000+I_D, 0074000+I_D, 0076000+I_D,
|
||
#endif
|
||
-1 };
|
||
|
||
static const char *skip[] = {
|
||
"SKP", "SZC", "SNC", "SZR", "SNR", "SEZ", "SBN",
|
||
NULL };
|
||
|
||
static const char *device[] = {
|
||
#if defined (ECLIPSE)
|
||
"ERCC", "MAP",
|
||
#endif
|
||
"TTI", "TTO", "PTR", "PTP", "RTC", "PLT", "CDR", "LPT",
|
||
"DSK", "MTA", "DCM", "ADCV", "DKP", "CAS",
|
||
"TTI1", "TTO1", "CPU",
|
||
NULL };
|
||
|
||
static const int32 dev_val[] = {
|
||
#if defined (ECLIPSE)
|
||
002, 003,
|
||
#endif
|
||
010, 011, 012, 013, 014, 015, 016, 017,
|
||
020, 022, 024, 030, 033, 034,
|
||
050, 051, 077,
|
||
-1 };
|
||
|
||
/* Address decode
|
||
|
||
Inputs:
|
||
*of = output stream
|
||
addr = current PC
|
||
ind = indirect flag
|
||
mode = addressing mode
|
||
disp = displacement
|
||
ext = true if extended address
|
||
cflag = true if decoding for CPU
|
||
Outputs:
|
||
return = error code
|
||
*/
|
||
|
||
t_stat fprint_addr (FILE *of, t_addr addr, int32 ind, int32 mode,
|
||
int32 disp, t_bool ext, int32 cflag)
|
||
{
|
||
int32 dsign, dmax;
|
||
|
||
if (ext) dmax = AMASK + 1; /* get max disp */
|
||
else dmax = I_M_DISP + 1;
|
||
dsign = dmax >> 1; /* get disp sign */
|
||
if (ind) fprintf (of, "@"); /* indirect? */
|
||
switch (mode & 03) { /* mode */
|
||
case 0: /* absolute */
|
||
fprintf (of, "%-o", disp);
|
||
break;
|
||
case 1: /* PC rel */
|
||
if (disp & dsign) {
|
||
if (cflag) fprintf (of, "%-o", (addr - (dmax - disp)) & AMASK);
|
||
else fprintf (of, ".-%-o", dmax - disp); }
|
||
else {
|
||
if (cflag) fprintf (of, "%-o", (addr + disp) & AMASK);
|
||
else fprintf (of, ".+%-o", disp); }
|
||
break;
|
||
case 2: /* AC2 rel */
|
||
if (disp & dsign) fprintf (of, "-%-o,2", dmax - disp);
|
||
else fprintf (of, "%-o,2", disp);
|
||
break;
|
||
case 3: /* AC3 rel */
|
||
if (disp & dsign) fprintf (of, "-%-o,3", dmax - disp);
|
||
else fprintf (of, "%-o,3", disp);
|
||
break; } /* end switch */
|
||
return SCPE_OK;
|
||
}
|
||
|
||
/* Symbolic output
|
||
|
||
Inputs:
|
||
*of = output stream
|
||
addr = current PC
|
||
*val = pointer to values
|
||
*uptr = pointer to unit
|
||
sw = switches
|
||
Outputs:
|
||
status = error code
|
||
*/
|
||
|
||
t_stat fprint_sym (FILE *of, t_addr addr, t_value *val,
|
||
UNIT *uptr, int32 sw)
|
||
{
|
||
int32 cflag, i, j, c1, c2, inst, dv, src, dst, skp;
|
||
int32 ind, mode, disp, dev;
|
||
int32 byac, extind, extdisp, xop;
|
||
|
||
cflag = (uptr == NULL) || (uptr == &cpu_unit);
|
||
c1 = ((int32) val[0] >> 8) & 0177;
|
||
c2 = (int32) val[0] & 0177;
|
||
if (sw & SWMASK ('A')) { /* ASCII? */
|
||
fprintf (of, (c2 < 040)? "<%03o>": "%c", c2);
|
||
return SCPE_OK; }
|
||
if (sw & SWMASK ('C')) { /* character? */
|
||
fprintf (of, (c1 < 040)? "<%03o>": "%c", c1);
|
||
fprintf (of, (c2 < 040)? "<%03o>": "%c", c2);
|
||
return SCPE_OK; }
|
||
if (!(sw & SWMASK ('M'))) return SCPE_ARG; /* mnemonic? */
|
||
|
||
/* Instruction decode */
|
||
|
||
inst = (int32) val[0];
|
||
for (i = 0; opc_val[i] >= 0; i++) { /* loop thru ops */
|
||
j = (opc_val[i] >> I_V_FL) & I_M_FL; /* get class */
|
||
if ((opc_val[i] & 0177777) == (inst & masks[j])) { /* match? */
|
||
src = I_GETSRC (inst); /* opr fields */
|
||
dst = I_GETDST (inst);
|
||
skp = I_GETSKP (inst);
|
||
ind = inst & I_IND; /* mem ref fields */
|
||
mode = I_GETMODE (inst);
|
||
disp = I_GETDISP (inst);
|
||
dev = I_GETDEV (inst); /* IOT fields */
|
||
byac = I_GETPULSE (inst); /* byte fields */
|
||
xop = I_GETXOP (inst); /* XOP fields */
|
||
extind = (int32) val[1] & A_IND; /* extended fields */
|
||
extdisp = (int32) val[1] & AMASK;
|
||
for (dv = 0; (dev_val[dv] >= 0) && (dev_val[dv] != dev); dv++) ;
|
||
|
||
switch (j) { /* switch on class */
|
||
case I_V_NPN: /* no operands */
|
||
fprintf (of, "%s", opcode[i]); /* opcode */
|
||
break;
|
||
case I_V_R: /* reg only */
|
||
fprintf (of, "%s %-o", opcode[i], dst);
|
||
break;
|
||
case I_V_D: /* dev only */
|
||
#if defined (ECLIPSE)
|
||
if (Usermap && (MapStat & 0100)) { /* the evil LEF mode */
|
||
fprintf (of, "LEF %-o,", dst);
|
||
fprint_addr (of, addr, ind, mode, disp, FALSE, cflag);
|
||
break;
|
||
}
|
||
#endif
|
||
if (dev_val[dv] >= 0)
|
||
fprintf (of, "%s %s", opcode[i], device[dv]);
|
||
else fprintf (of, "%s %-o", opcode[i], dev);
|
||
break;
|
||
case I_V_RD: /* reg, dev */
|
||
if (dev_val[dv] >= 0)
|
||
fprintf (of, "%s %-o,%s", opcode[i], dst, device[dv]);
|
||
else fprintf (of, "%s %-o,%-o", opcode[i], dst, dev);
|
||
break;
|
||
case I_V_M: /* addr only */
|
||
fprintf (of, "%s ", opcode[i]);
|
||
fprint_addr (of, addr, ind, mode, disp, FALSE, cflag);
|
||
break;
|
||
case I_V_RM: /* reg, addr */
|
||
fprintf (of, "%s %-o,", opcode[i], dst);
|
||
fprint_addr (of, addr, ind, mode, disp, FALSE, cflag);
|
||
break;
|
||
case I_V_RR: /* operate */
|
||
fprintf (of, "%s %-o,%-o", opcode[i], src, dst);
|
||
if (skp) fprintf (of, ",%s", skip[skp-1]);
|
||
break;
|
||
case I_V_BY: /* byte */
|
||
fprintf (of, "%s %-o,%-o", opcode[i], byac, dst);
|
||
break;
|
||
case I_V_2AC: /* reg, reg */
|
||
fprintf (of, "%s %-o,%-o", opcode[i], src, dst);
|
||
break;
|
||
case I_V_RSI: /* reg, short imm */
|
||
fprintf (of, "%s %-o,%-o", opcode[i], src + 1, dst);
|
||
break;
|
||
case I_V_LI: /* long imm */
|
||
fprintf (of, "%s %-o", opcode[i], val[1]);
|
||
return -1;
|
||
case I_V_RLI: /* reg, long imm */
|
||
fprintf (of, "%s %-o,%-o", opcode[i], val[1], dst);
|
||
return -1;
|
||
case I_V_LM: /* long addr */
|
||
fprintf (of, "%s ", opcode[i]);
|
||
fprint_addr (of, addr, extind, mode, extdisp, TRUE, cflag);
|
||
return -1;
|
||
case I_V_RLM: /* reg, long addr */
|
||
fprintf (of, "%s %-o,", opcode[i], dst);
|
||
fprint_addr (of, addr, extind, mode, extdisp, TRUE, cflag);
|
||
return -1;
|
||
case I_V_FRM: /* flt reg, long addr */
|
||
fprintf (of, "%s %-o,", opcode[i], dst);
|
||
fprint_addr (of, addr, extind, src, extdisp, TRUE, cflag);
|
||
return -1;
|
||
case I_V_FST: /* flt status */
|
||
fprintf (of, "%s ", opcode[i]);
|
||
fprint_addr (of, addr, extind, dst, extdisp, AMASK + 1, cflag);
|
||
return -1;
|
||
case I_V_XP: /* XOP */
|
||
fprintf (of, "%s %-o,%-o,%-o", opcode[i], src, dst, xop);
|
||
break; /* end case */
|
||
default:
|
||
fprintf (of, "??? [%-o]", inst);
|
||
break; }
|
||
return SCPE_OK; } /* end if */
|
||
} /* end for */
|
||
return SCPE_ARG;
|
||
}
|
||
|
||
/* Address parse
|
||
|
||
Inputs:
|
||
*cptr = pointer to input string
|
||
addr = current PC
|
||
ext = extended address
|
||
cflag = true if parsing for CPU
|
||
val[3] = output array
|
||
Outputs:
|
||
optr = pointer to next char in input string
|
||
NULL if error
|
||
*/
|
||
|
||
#define A_FL 001 /* CPU flag */
|
||
#define A_NX 002 /* index seen */
|
||
#define A_PER 004 /* period seen */
|
||
#define A_NUM 010 /* number seen */
|
||
#define A_SI 020 /* sign seen */
|
||
#define A_MI 040 /* - seen */
|
||
|
||
char *get_addr (char *cptr, t_addr addr, t_bool ext, int32 cflag, int32 *val)
|
||
{
|
||
int32 d, r, x, pflag;
|
||
char gbuf[CBUFSIZE];
|
||
int32 dmax, dsign;
|
||
|
||
if (ext) dmax = AMASK + 1; /* get max disp */
|
||
else dmax = I_M_DISP + 1;
|
||
dsign = dmax >> 1; /* get disp sign */
|
||
val[0] = 0; /* no indirect */
|
||
val[1] = 0; /* PC rel */
|
||
val[2] = 0; /* no addr */
|
||
|
||
pflag = cflag & A_FL; /* isolate flag */
|
||
if (*cptr == '@') { /* indirect? */
|
||
val[0] = 1;
|
||
cptr++; }
|
||
if (*cptr == '.') { /* relative? */
|
||
pflag = pflag | A_PER;
|
||
x = 1; /* "index" is PC */
|
||
cptr++; }
|
||
if (*cptr == '+') { /* + sign? */
|
||
pflag = pflag | A_SI;
|
||
cptr++; }
|
||
else if (*cptr == '-') { /* - sign? */
|
||
pflag = pflag | A_MI | A_SI;
|
||
cptr++; }
|
||
if (*cptr != 0) { /* number? */
|
||
cptr = get_glyph (cptr, gbuf, ','); /* get glyph */
|
||
d = (int32) get_uint (gbuf, 8, AMASK, &r);
|
||
if (r != SCPE_OK) return NULL;
|
||
pflag = pflag | A_NUM; }
|
||
if (*cptr != 0) { /* index? */
|
||
cptr = get_glyph (cptr, gbuf, 0); /* get glyph */
|
||
x = (int32) get_uint (gbuf, 8, I_M_DST, &r);
|
||
if ((r != SCPE_OK) || (x < 2)) return NULL;
|
||
pflag = pflag | A_NX; }
|
||
|
||
/* Address parse, continued */
|
||
|
||
switch (pflag) { /* case on flags */
|
||
case A_NUM: case A_NUM+A_SI: /* ~CPU, (+)num */
|
||
if (d < dmax) val[2] = d;
|
||
else return NULL;
|
||
break;
|
||
case A_NUM+A_FL: case A_NUM+A_SI+A_FL: /* CPU, (+)num */
|
||
if (d < dmax) val[2] = d;
|
||
else if (((d >= (((int32) addr - dsign) & AMASK)) &&
|
||
(d < (((int32) addr + dsign) & AMASK))) ||
|
||
(d >= ((int32) addr + (-dsign & AMASK)))) {
|
||
val[1] = 1; /* PC rel */
|
||
val[2] = (d - addr) & (dmax - 1); }
|
||
else return NULL;
|
||
break;
|
||
case A_PER: case A_PER+A_FL: /* . */
|
||
case A_PER+A_SI+A_NUM: case A_PER+A_SI+A_NUM+A_FL: /* . + num */
|
||
case A_PER+A_SI+A_MI+A_NUM: /* . - num */
|
||
case A_PER+A_SI+A_MI+A_NUM+A_FL:
|
||
case A_NX+A_NUM: case A_NX+A_NUM+A_FL: /* num, ndx */
|
||
case A_NX+A_SI+A_NUM: case A_NX+A_SI+A_NUM+A_FL: /* +num, ndx */
|
||
case A_NX+A_SI+A_MI+A_NUM: /* -num, ndx */
|
||
case A_NX+A_SI+A_MI+A_NUM+A_FL:
|
||
val[1] = x; /* set mode */
|
||
if (((pflag & A_MI) == 0) && (d < dsign)) val[2] = d;
|
||
else if ((pflag & A_MI) && (d <= dsign)) val[2] = (dmax - d);
|
||
else return NULL;
|
||
break;
|
||
default:
|
||
return NULL; } /* end case */
|
||
return cptr;
|
||
}
|
||
|
||
/* Parse two registers
|
||
|
||
Inputs:
|
||
*cptr = input string
|
||
term = second terminating character
|
||
val = output array
|
||
Outputs:
|
||
optr = pointer to next char in input string
|
||
NULL if error
|
||
*/
|
||
|
||
char *get_2reg (char *cptr, char term, int32 *val)
|
||
{
|
||
char gbuf[CBUFSIZE];
|
||
t_stat r;
|
||
|
||
cptr = get_glyph (cptr, gbuf, ','); /* get register */
|
||
val[0] = (int32) get_uint (gbuf, 8, I_M_SRC, &r);
|
||
if (r != SCPE_OK) return NULL;
|
||
cptr = get_glyph (cptr, gbuf, term); /* get register */
|
||
val[1] = (int32) get_uint (gbuf, 8, I_M_DST, &r);
|
||
if (r != SCPE_OK) return NULL;
|
||
return cptr;
|
||
}
|
||
|
||
/* Symbolic input
|
||
|
||
Inputs:
|
||
*cptr = pointer to input string
|
||
addr = current PC
|
||
*uptr = pointer to unit
|
||
*val = pointer to output values
|
||
sw = switches
|
||
Outputs:
|
||
status = error status
|
||
*/
|
||
|
||
t_stat parse_sym (char *cptr, t_addr addr, UNIT *uptr, t_value *val, int32 sw)
|
||
{
|
||
int32 cflag, d, i, j, amd[3];
|
||
t_stat r, rtn;
|
||
char gbuf[CBUFSIZE];
|
||
|
||
cflag = (uptr == NULL) || (uptr == &cpu_unit);
|
||
while (isspace (*cptr)) cptr++; /* absorb spaces */
|
||
if ((sw & SWMASK ('A')) || ((*cptr == '\'') && cptr++)) { /* ASCII char? */
|
||
if (cptr[0] == 0) return SCPE_ARG; /* must have 1 char */
|
||
val[0] = (t_value) cptr[0];
|
||
return SCPE_OK; }
|
||
if ((sw & SWMASK ('C')) || ((*cptr == '"') && cptr++)) { /* ASCII string? */
|
||
if (cptr[0] == 0) return SCPE_ARG; /* must have 1 char */
|
||
val[0] = ((t_value) cptr[0] << 8) + (t_value) cptr[1];
|
||
return SCPE_OK; }
|
||
|
||
/* Instruction parse */
|
||
|
||
rtn = SCPE_OK; /* assume 1 word */
|
||
cptr = get_glyph (cptr, gbuf, 0); /* get opcode */
|
||
for (i = 0; (opcode[i] != NULL) && (strcmp (opcode[i], gbuf) != 0) ; i++) ;
|
||
if (opcode[i] == NULL) return SCPE_ARG;
|
||
val[0] = opc_val[i] & 0177777; /* get value */
|
||
j = (opc_val[i] >> I_V_FL) & I_M_FL; /* get class */
|
||
|
||
switch (j) { /* case on class */
|
||
case I_V_NPN: /* no operand */
|
||
break;
|
||
case I_V_R: /* IOT reg */
|
||
cptr = get_glyph (cptr, gbuf, 0); /* get register */
|
||
d = (int32) get_uint (gbuf, 8, I_M_DST, &r);
|
||
if (r != SCPE_OK) return SCPE_ARG;
|
||
val[0] = val[0] | (d << I_V_DST); /* put in place */
|
||
break;
|
||
case I_V_RD: /* IOT reg,dev */
|
||
cptr = get_glyph (cptr, gbuf, ','); /* get register */
|
||
d = (int32) get_uint (gbuf, 8, I_M_DST, &r);
|
||
if (r != SCPE_OK) return SCPE_ARG;
|
||
val[0] = val[0] | (d << I_V_DST); /* put in place */
|
||
case I_V_D: /* IOT dev */
|
||
cptr = get_glyph (cptr, gbuf, 0); /* get device */
|
||
for (i = 0; (device[i] != NULL) &&
|
||
(strcmp (device[i], gbuf) != 0); i++);
|
||
if (device[i] != NULL) val[0] = val[0] | dev_val[i];
|
||
else {
|
||
d = (int32) get_uint (gbuf, 8, I_M_DEV, &r);
|
||
if (r != SCPE_OK) return SCPE_ARG;
|
||
val[0] = val[0] | (d << I_V_DEV); }
|
||
break;
|
||
case I_V_RM: /* reg, addr */
|
||
cptr = get_glyph (cptr, gbuf, ','); /* get register */
|
||
d = (int32) get_uint (gbuf, 8, I_M_DST, &r);
|
||
if (r != SCPE_OK) return SCPE_ARG;
|
||
val[0] = val[0] | (d << I_V_DST); /* put in place */
|
||
case I_V_M: /* addr */
|
||
cptr = get_addr (cptr, addr, FALSE, cflag, amd);
|
||
if (cptr == NULL) return SCPE_ARG;
|
||
val[0] = val[0] | (amd[0] << I_V_IND) | (amd[1] << I_V_MODE) | amd[2];
|
||
break;
|
||
case I_V_RR: /* operate */
|
||
cptr = get_2reg (cptr, ',', amd); /* get 2 reg */
|
||
if (cptr == NULL) return SCPE_ARG;
|
||
val[0] = val[0] | (amd[0] << I_V_SRC) | (amd[1] << I_V_DST);
|
||
if (*cptr != 0) { /* skip? */
|
||
cptr = get_glyph (cptr, gbuf, 0); /* get skip */
|
||
for (i = 0; (skip[i] != NULL) &&
|
||
(strcmp (skip[i], gbuf) != 0); i++) ;
|
||
if (skip[i] == NULL) return SCPE_ARG;
|
||
val[0] = val[0] | (i + 1); } /* end for */
|
||
break;
|
||
case I_V_BY: /* byte */
|
||
cptr = get_2reg (cptr, 0, amd); /* get 2 reg */
|
||
if (cptr == NULL) return SCPE_ARG;
|
||
val[0] = val[0] | (amd[0] << I_V_PULSE) | (amd[1] << I_V_DST);
|
||
break;
|
||
case I_V_2AC: /* reg, reg */
|
||
cptr = get_2reg (cptr, 0, amd); /* get 2 reg */
|
||
if (cptr == NULL) return SCPE_ARG;
|
||
val[0] = val[0] | (amd[0] << I_V_SRC) | (amd[1] << I_V_DST);
|
||
break;
|
||
case I_V_RSI: /* reg, short imm */
|
||
cptr = get_glyph (cptr, gbuf, ','); /* get immediate */
|
||
d = (int32) get_uint (gbuf, 8, I_M_SRC + 1, &r);
|
||
if ((d == 0) || (r != SCPE_OK)) return SCPE_ARG;
|
||
val[0] = val[0] | ((d - 1) << I_V_SRC); /* put in place */
|
||
cptr = get_glyph (cptr, gbuf, 0); /* get register */
|
||
d = (int32) get_uint (gbuf, 8, I_M_DST, &r);
|
||
if (r != SCPE_OK) return SCPE_ARG;
|
||
val[0] = val[0] | (d << I_V_DST); /* put in place */
|
||
break;
|
||
case I_V_RLI: /* reg, long imm */
|
||
cptr = get_glyph (cptr, gbuf, ','); /* get immediate */
|
||
val[1] = (int32) get_uint (gbuf, 8, DMASK, &r);
|
||
if (r != SCPE_OK) return SCPE_ARG;
|
||
cptr = get_glyph (cptr, gbuf, 0); /* get register */
|
||
d = (int32) get_uint (gbuf, 8, I_M_DST, &r);
|
||
if (r != SCPE_OK) return SCPE_ARG;
|
||
val[0] = val[0] | (d << I_V_DST); /* put in place */
|
||
rtn = -1;
|
||
break;
|
||
case I_V_LI: /* long imm */
|
||
cptr = get_glyph (cptr, gbuf, 0); /* get immediate */
|
||
val[1] = (int32) get_uint (gbuf, 8, DMASK, &r);
|
||
if (r != SCPE_OK) return SCPE_ARG;
|
||
rtn = -1;
|
||
break;
|
||
case I_V_RLM: /* reg, long mem */
|
||
cptr = get_glyph (cptr, gbuf, ','); /* get register */
|
||
d = (int32) get_uint (gbuf, 8, I_M_DST, &r);
|
||
if (r != SCPE_OK) return SCPE_ARG;
|
||
val[0] = val[0] | (d << I_V_DST); /* put in place */
|
||
case I_V_LM: /* long mem */
|
||
cptr = get_addr (cptr, addr, TRUE, cflag, amd);
|
||
if (cptr == NULL) return SCPE_ARG;
|
||
val[0] = val[0] | (amd[1] << I_V_MODE);
|
||
val[1] = (amd[0] << A_V_IND) | amd[2];
|
||
rtn = -1;
|
||
break;
|
||
case I_V_FRM: /* flt reg, long mem */
|
||
cptr = get_glyph (cptr, gbuf, ','); /* get register */
|
||
d = (int32) get_uint (gbuf, 8, I_M_DST, &r);
|
||
if (r != SCPE_OK) return SCPE_ARG;
|
||
val[0] = val[0] | (d << I_V_DST); /* put in place */
|
||
cptr = get_addr (cptr, addr, TRUE, cflag, amd);
|
||
if (cptr == NULL) return SCPE_ARG;
|
||
val[0] = val[0] | (amd[1] << I_V_SRC);
|
||
val[1] = (amd[0] << A_V_IND) | amd[2];
|
||
rtn = -1;
|
||
break;
|
||
case I_V_FST: /* flt status */
|
||
cptr = get_addr (cptr, addr, TRUE, cflag, amd);
|
||
if (cptr == NULL) return SCPE_ARG;
|
||
val[0] = val[0] | (amd[1] << I_V_DST);
|
||
val[1] = (amd[0] << A_V_IND) | amd[2];
|
||
rtn = -1;
|
||
break;
|
||
case I_V_XP: /* XOP */
|
||
cptr = get_2reg (cptr, ',', amd); /* get 2 reg */
|
||
if (cptr == NULL) return SCPE_ARG;
|
||
val[0] = val[0] | (amd[0] << I_V_SRC) | (amd[1] << I_V_DST);
|
||
cptr = get_glyph (cptr, gbuf, 0); /* get argument */
|
||
d = (int32) get_uint (gbuf, 8, I_M_XOP, &r);
|
||
if (r != SCPE_OK) return SCPE_ARG;
|
||
val[0] = val[0] | (d << I_V_XOP);
|
||
break; } /* end case */
|
||
if (*cptr != 0) return SCPE_ARG; /* any leftovers? */
|
||
return rtn;
|
||
}
|