208 lines
6.8 KiB
C
208 lines
6.8 KiB
C
/* ibmpcxt.c: IBM PC Processor simulator
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Copyright (c) 2016, William A. Beech
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Permission is hereby granted, free of charge, to any person obtaining a
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copy of this software and associated documentation files (the "Software"),
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to deal in the Software without restriction, including without limitation
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the rights to use, copy, modify, merge, publish, distribute, sublicense,
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and/or sell copies of the Software, and to permit persons to whom the
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Software is furnished to do so, subject to the following conditions:
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The above copyright notice and this permission notice shall be included in
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all copies or substantial portions of the Software.
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THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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WILLIAM A. BEECH BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
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IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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Except as contained in this notice, the name of William A. Beech shall not be
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used in advertising or otherwise to promote the sale, use or other dealings
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in this Software without prior written authorization from William A. Beech.
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MODIFICATIONS:
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11 Jul 16 - Original file.
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NOTES:
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This software was written by Bill Beech, Jul 2016, to allow emulation of IBM PC
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Computer Systems.
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*/
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#include "system_defs.h"
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int32 nmiflg = 0; //mask NMI off
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uint8 dmapagreg0, dmapagreg1, dmapagreg2, dmapagreg3;
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extern uint16 port; //port called in dev_table[port]
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/* function prototypes */
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uint8 get_mbyte(uint32 addr);
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uint16 get_mword(uint32 addr);
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void put_mbyte(uint32 addr, uint8 val);
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void put_mword(uint32 addr, uint16 val);
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t_stat SBC_reset (DEVICE *dptr, uint16 base);
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uint8 enbnmi(t_bool io, uint8 data);
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uint8 dmapag(t_bool io, uint8 data);
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uint8 dmapag0(t_bool io, uint8 data);
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uint8 dmapag1(t_bool io, uint8 data);
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uint8 dmapag2(t_bool io, uint8 data);
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uint8 dmapag3(t_bool io, uint8 data);
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/* external function prototypes */
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extern t_stat i8088_reset (DEVICE *dptr); /* reset the 8088 emulator */
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extern uint8 xtbus_get_mbyte(uint32 addr);
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extern void xtbus_put_mbyte(uint32 addr, uint8 val);
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extern uint8 EPROM_get_mbyte(uint32 addr);
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extern uint8 RAM_get_mbyte(uint32 addr);
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extern void RAM_put_mbyte(uint32 addr, uint8 val);
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extern UNIT i8255_unit[];
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extern UNIT EPROM_unit;
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extern UNIT RAM_unit;
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extern t_stat i8237_reset (DEVICE *dptr);
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extern t_stat i8253_reset (DEVICE *dptr);
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extern t_stat i8255_reset (DEVICE *dptr);
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extern t_stat i8259_reset (DEVICE *dptr);
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extern t_stat EPROM_reset (DEVICE *dptr);
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extern t_stat RAM_reset (DEVICE *dptr);
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extern uint16 reg_dev(uint8 (*routine)(t_bool, uint8, uint8), uint16, uint8);
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/* SBC reset routine */
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t_stat SBC_reset (DEVICE *dptr, uint16 base)
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{
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sim_printf("Initializing IBM PC:\n");
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i8088_reset (NULL);
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i8237_reset (I8237_BASE_0);
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i8253_reset (I8253_BASE_0);
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i8255_reset (I8255_BASE_0);
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i8259_reset (I8259_BASE_0);
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EPROM_reset (ROM_BASE, ROM_SIZE);
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RAM_reset (RAM_BASE, RAM_SIZE);
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reg_dev(enbnmi, NMI_BASE);
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reg_dev(dmapag0, DMAPAG_BASE_0);
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reg_dev(dmapag1, DMAPAG_BASE_1);
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reg_dev(dmapag2, DMAPAG_BASE_2);
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reg_dev(dmapag3, DMAPAG_BASE_3);
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return SCPE_OK;
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}
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uint8 dmapag0(t_bool io, uint8 data)
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{
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if (io == 0) { /* read data port */
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;
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} else { /* write data port */
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dmapagreg0 = data;
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//sim_printf("dmapag0: dmapagreg0=%04X\n", data);
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}
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return 0;
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}
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uint8 dmapag1(t_bool io, uint8 data)
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{
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if (io == 0) { /* read data port */
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;
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} else { /* write data port */
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dmapagreg1 = data;
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//sim_printf("dmapag1: dmapagreg1=%04X\n", data);
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}
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return 0;
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}
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uint8 dmapag2(t_bool io, uint8 data)
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{
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if (io == 0) { /* read data port */
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;
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} else { /* write data port */
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dmapagreg2 = data;
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//sim_printf("dmapag2: dmapagreg2=%04X\n", data);
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}
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return 0;
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}
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uint8 dmapag3(t_bool io, uint8 data)
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{
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//sim_printf("dmapag3: entered\n");
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if (io == 0) { /* read data port */
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;
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} else { /* write data port */
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dmapagreg3 = data;
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//sim_printf("dmapag3: dmapagreg3=%04X\n", data);
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}
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return 0;
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}
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uint8 enbnmi(t_bool io, uint8 data)
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{
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if (io == 0) { /* read data port */
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;
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} else { /* write data port */
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if (data & 0x80) {
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nmiflg = 1;
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//sim_printf("enbnmi: NMI enabled\n");
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} else {
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nmiflg = 0;
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//sim_printf("enbnmi: NMI disabled\n");
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}
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}
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return 0;
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}
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/* get a byte from memory - handle RAM, ROM, I/O, and pcbus memory */
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uint8 get_mbyte(uint32 addr)
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{
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/* if local EPROM handle it */
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if ((addr >= (uint32)EPROM_unit.u3) && (addr <= (uint32)(EPROM_unit.u3 + EPROM_unit.capac))) {
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// sim_printf("Write to R/O memory address %05X - ignored\n", addr);
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return EPROM_get_mbyte(addr);
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}
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/* if local RAM handle it */
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if ((addr >= (uint32)RAM_unit.u3) && (addr <= (uint32)(RAM_unit.u3 + RAM_unit.capac))) {
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return RAM_get_mbyte(addr);
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}
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/* otherwise, try the pcbus */
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return xtbus_get_mbyte(addr);
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}
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/* get a word from memory - handle RAM, ROM, I/O, and pcbus memory */
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uint16 get_mword(uint32 addr)
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{
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uint16 val;
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val = get_mbyte(addr);
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val |= (get_mbyte(addr+1) << 8);
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return val;
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}
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/* put a byte to memory - handle RAM, ROM, I/O, and pcbus memory */
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void put_mbyte(uint32 addr, uint8 val)
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{
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/* if local EPROM handle it */
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if ((addr >= (uint32)EPROM_unit.u3) && (addr <= (uint32)(EPROM_unit.u3 + EPROM_unit.capac))) {
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sim_printf("Write to R/O memory address %04X - ignored\n", addr);
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return;
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} /* if local RAM handle it */
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if ((addr >= (uint32)RAM_unit.u3) && (addr <= (uint32)(RAM_unit.u3 + RAM_unit.capac))) {
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RAM_put_mbyte(addr, val);
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return;
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} /* otherwise, try the pcbus */
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xtbus_put_mbyte(addr, val);
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}
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/* put a word to memory - handle RAM, ROM, I/O, and pcbus memory */
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void put_mword(uint32 addr, uint16 val)
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{
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put_mbyte(addr, val & 0xff);
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put_mbyte(addr+1, val >> 8);
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}
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/* end of ibmpc.c */
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