35eac703c3
The makefile now works for Linux and most Unix's. However, for Solaris and MacOS, you must first export the OSTYPE environment variable: > export OSTYPE > make Otherwise, you will get build errors. 1. New Features 1.1 3.8-0 1.1.1 SCP and Libraries - BREAK, NOBREAK, and SHOW BREAK with no argument will set, clear, and show (respectively) a breakpoint at the current PC. 1.1.2 GRI - Added support for the GRI-99 processor. 1.1.3 HP2100 - Added support for the BACI terminal interface. - Added support for RTE OS/VMA/EMA, SIGNAL, VIS firmware extensions. 1.1.4 Nova - Added support for 64KW memory (implemented in third-party CPU's). 1.1.5 PDP-11 - Added support for DC11, RC11, KE11A, KG11A. - Added modem control support for DL11. - Added ASCII character support for all 8b devices. 1.2 3.8-1 1.2.1 SCP and libraries - Added capability to set line connection order for terminal multiplexers. 1.2.2 HP2100 - Added support for 12620A/12936A privileged interrupt fence. - Added support for 12792C eight-channel asynchronous multiplexer. 1.3 3.8-2 1.3.1 1401 - Added "no rewind" option to magtape boot. 1.3.2 PDP-11 - Added RD32 support to RQ - Added debug support to RL 1.3.3 PDP-8 - Added FPP support (many thanks to Rick Murphy for debugging the code) 2. Bugs Fixed Please see the revision history on http://simh.trailing-edge.com or in the source module sim_rev.h.
102 lines
5.9 KiB
C
102 lines
5.9 KiB
C
/* altairz80_defs.h: MITS Altair simulator definitions
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Copyright (c) 2002-2010, Peter Schorn
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Permission is hereby granted, free of charge, to any person obtaining a
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copy of this software and associated documentation files (the "Software"),
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to deal in the Software without restriction, including without limitation
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the rights to use, copy, modify, merge, publish, distribute, sublicense,
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and/or sell copies of the Software, and to permit persons to whom the
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Software is furnished to do so, subject to the following conditions:
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The above copyright notice and this permission notice shall be included in
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all copies or substantial portions of the Software.
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THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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PETER SCHORN BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
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IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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Except as contained in this notice, the name of Peter Schorn shall not
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be used in advertising or otherwise to promote the sale, use or other dealings
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in this Software without prior written authorization from Peter Schorn.
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Based on work by Charles E Owen (c) 1997
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*/
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#include "sim_defs.h" /* simulator definitions */
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#define MAXBANKSIZE 65536 /* maximum memory size, a power of 2 */
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#define MAXBANKSIZELOG2 16 /* log2 of MAXBANKSIZE */
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#define MAXBANKS 16 /* max number of memory banks, a power of 2 */
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#define MAXBANKSLOG2 4 /* log2 of MAXBANKS */
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#define MAXMEMORY (MAXBANKS * MAXBANKSIZE) /* maximum, total memory size */
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#define ADDRMASK (MAXBANKSIZE - 1) /* address mask */
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#define ADDRMASKEXTENDED (MAXMEMORY - 1) /* extended address mask */
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#define BANKMASK (MAXBANKS - 1) /* bank mask */
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#define MEMORYSIZE (cpu_unit.capac) /* actual memory size */
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#define KB 1024 /* kilo byte */
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#define KBLOG2 10 /* log2 of KB */
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#define ALTAIR_ROM_LOW 0xff00 /* start address of regular Altair ROM */
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#define RESOURCE_TYPE_MEMORY 1
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#define RESOURCE_TYPE_IO 2
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#define NUM_OF_DSK 8 /* NUM_OF_DSK must be power of two */
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#define LDA_INSTRUCTION 0x3e /* op-code for LD A,<8-bit value> instruction */
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#define UNIT_NO_OFFSET_1 0x37 /* LD A,<unitno> */
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#define UNIT_NO_OFFSET_2 0xb4 /* LD a,80h | <unitno> */
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#define CHIP_TYPE_8080 0
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#define CHIP_TYPE_Z80 1
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#define CHIP_TYPE_8086 2
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#define MAX_CHIP_TYPE CHIP_TYPE_8086
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/* simulator stop codes */
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#define STOP_HALT 0 /* HALT */
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#define STOP_IBKPT 1 /* breakpoint (program counter) */
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#define STOP_MEM 2 /* breakpoint (memory access) */
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#define STOP_INSTR 3 /* breakpoint (instruction access) */
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#define STOP_OPCODE 4 /* invalid operation encountered (8080, Z80, 8086) */
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#define UNIT_CPU_V_OPSTOP (UNIT_V_UF+0) /* stop on invalid operation */
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#define UNIT_CPU_OPSTOP (1 << UNIT_CPU_V_OPSTOP)
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#define UNIT_CPU_V_BANKED (UNIT_V_UF+1) /* banked memory is used */
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#define UNIT_CPU_BANKED (1 << UNIT_CPU_V_BANKED)
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#define UNIT_CPU_V_ALTAIRROM (UNIT_V_UF+2) /* ALTAIR ROM exists */
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#define UNIT_CPU_ALTAIRROM (1 << UNIT_CPU_V_ALTAIRROM)
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#define UNIT_CPU_V_VERBOSE (UNIT_V_UF+3) /* warn if ROM is written to */
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#define UNIT_CPU_VERBOSE (1 << UNIT_CPU_V_VERBOSE)
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#define UNIT_CPU_V_MMU (UNIT_V_UF+4) /* use MMU and slower CPU */
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#define UNIT_CPU_MMU (1 << UNIT_CPU_V_MMU)
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#define UNIT_CPU_V_STOPONHALT (UNIT_V_UF+5) /* stop simulation on HALT */
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#define UNIT_CPU_STOPONHALT (1 << UNIT_CPU_V_STOPONHALT)
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#define UNIT_CPU_V_SWITCHER (UNIT_V_UF+6) /* switcher 8086 <--> 8080/Z80 enabled */
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#define UNIT_CPU_SWITCHER (1 << UNIT_CPU_V_SWITCHER)
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#if defined (__linux) || defined(__NetBSD__) || defined (__OpenBSD__) || defined (__FreeBSD__) || defined (__APPLE__)
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#define UNIX_PLATFORM 1
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#else
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#define UNIX_PLATFORM 0
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#endif
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#define ADDRESS_FORMAT "[0x%05x]"
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/* use NLP for new line printing while the simulation is running */
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#if UNIX_PLATFORM
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#define NLP "\r\n"
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#else
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#define NLP "\n"
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#endif
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#if (defined (__MWERKS__) && defined (macintosh)) || defined(__DECC)
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#define __FUNCTION__ __FILE__
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#endif
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typedef struct {
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uint32 mem_base; /* Memory Base Address */
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uint32 mem_size; /* Memory Address space requirement */
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uint32 io_base; /* I/O Base Address */
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uint32 io_size; /* I/O Address Space requirement */
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} PNP_INFO;
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