simh-testsetgenerator/PDP10/pdp10_xtnd.c
Bob Supnik 2bcd1e7c4c Notes For V2.10-2
1. New Features in 2.10-2

The build procedures have changed.  There is only one UNIX makefile.
To compile without Ethernet support, simply type

	gmake {target|all}

To compile with Ethernet support, type

	gmake USE_NETWORK=1 {target|all}

The Mingw batch files require Mingw release 2 and invoke the Unix
makefile.  There are still separate batch files for compilation
with or without Ethernet support.

1.1 SCP and Libraries

- The EVAL command will evaluate a symbolic type-in and display
  it in numeric form.
- The ! command (with no arguments) will launch the host operating
  system command shell.  The ! command (with an argument) executes
  the argument as a host operating system command.  (Code from
  Mark Pizzolato)
- Telnet sessions now recognize BREAK.  How a BREAK is transmitted
  dependent on the particular Telnet client.  (Code from Mark
  Pizzolato)
- The sockets library includes code for active connections as
  well as listening connections.
- The RESTORE command will restore saved memory size, if the
  simulator supports dynamic memory resizing.

1.2 PDP-1

- The PDP-1 supports the Type 24 serial drum (based on recently
  discovered documents).

1.3 18b PDP's

- The PDP-4 supports the Type 24 serial drum (based on recently
  discovered documents).

1.4 PDP-11

- The PDP-11 implements a stub DEUNA/DELUA (XU).  The real XU
  module will be included in a later release.

1.5 PDP-10

- The PDP-10 implements a stub DEUNA/DELUA (XU).  The real XU
  module will be included in a later release.

1.6 HP 2100

- The IOP microinstruction set is supported for the 21MX as well
  as the 2100.
- The HP2100 supports the Access Interprocessor Link (IPL).

1.7 VAX

- If the VAX console is attached to a Telnet session, BREAK is
  interpreted as console halt.
- The SET/SHOW HISTORY commands enable and display a history of
  the most recently executed instructions.  (Code from Mark
  Pizzolato)

1.8 Terminals Multiplexors

- BREAK detection was added to the HP, DEC, and Interdata terminal
  multiplexors.

1.9 Interdata 16b and 32b

- First release.  UNIX is not yet working.

1.10 SDS 940

- First release.

2. Bugs Fixed in 2.10-2

- PDP-11 console must default to 7b for early UNIX compatibility.
- PDP-11/VAX TMSCP emulator was using the wrong packet length for
  read/write end packets.
- Telnet IAC+IAC processing was fixed, both for input and output
  (found by Mark Pizzolato).
- PDP-11/VAX Ethernet setting flag bits wrong for chained
  descriptors (found by Mark Pizzolato).

3. New Features in 2.10 vs prior releases

3.1 SCP and Libraries

- The VT emulation package has been replaced by the capability
  to remote the console to a Telnet session.  Telnet clients
  typically have more complete and robust VT100 emulation.
- Simulated devices may now have statically allocated buffers,
  in addition to dynamically allocated buffers or disk-based
  data stores.
- The DO command now takes substitutable arguments (max 9).
  In command files, %n represents substitutable argument n.
- The initial command line is now interpreted as the command
  name and substitutable arguments for a DO command.  This is
  backward compatible to prior versions.
- The initial command line parses switches.  -Q is interpreted
  as quiet mode; informational messages are suppressed.
- The HELP command now takes an optional argument.  HELP <cmd>
  types help on the specified command.
- Hooks have been added for implementing GUI-based consoles,
  as well as simulator-specific command extensions.  A few
  internal data structures and definitions have changed.
- Two new routines (tmxr_open_master, tmxr_close_master) have
  been added to sim_tmxr.c.  The calling sequence for
  sim_accept_conn has been changed in sim_sock.c.
- The calling sequence for the VM boot routine has been modified
  to add an additional parameter.
- SAVE now saves, and GET now restores, controller and unit flags.
- Library sim_ether.c has been added for Ethernet support.

3.2 VAX

- Non-volatile RAM (NVR) can behave either like a memory or like
  a disk-based peripheral.  If unattached, it behaves like memory
  and is saved and restored by SAVE and RESTORE, respectively.
  If attached, its contents are loaded from disk by ATTACH and
  written back to disk at DETACH and EXIT.
- SHOW <device> VECTOR displays the device's interrupt vector.
  A few devices allow the vector to be changed with SET
  <device> VECTOR=nnn.
- SHOW CPU IOSPACE displays the I/O space address map.
- The TK50 (TMSCP tape) has been added.
- The DEQNA/DELQA (Qbus Ethernet controllers) have been added.
- Autoconfiguration support has been added.
- The paper tape reader has been removed from vax_stddev.c and
  now references a common implementation file, dec_pt.h.
- Examine and deposit switches now work on all devices, not just
  the CPU.
- Device address conflicts are not detected until simulation starts.

3.3 PDP-11

- SHOW <device> VECTOR displays the device's interrupt vector.
  Most devices allow the vector to be changed with SET
  <device> VECTOR=nnn.
- SHOW CPU IOSPACE displays the I/O space address map.
- The TK50 (TMSCP tape), RK611/RK06/RK07 (cartridge disk),
  RX211 (double density floppy), and KW11P programmable clock
  have been added.
- The DEQNA/DELQA (Qbus Ethernet controllers) have been added.
- Autoconfiguration support has been added.
- The paper tape reader has been removed from pdp11_stddev.c and
  now references a common implementation file, dec_pt.h.
- Device bootstraps now use the actual CSR specified by the
  SET ADDRESS command, rather than just the default CSR.  Note
  that PDP-11 operating systems may NOT support booting with
  non-standard addresses.
- Specifying more than 256KB of memory, or changing the bus
  configuration, causes all peripherals that are not compatible
  with the current bus configuration to be disabled.
- Device address conflicts are not detected until simulation starts.

3.4 PDP-10

- SHOW <device> VECTOR displays the device's interrupt vector.
  A few devices allow the vector to be changed with SET
  <device> VECTOR=nnn.
- SHOW CPU IOSPACE displays the I/O space address map.
- The RX211 (double density floppy) has been added; it is off
  by default.
- The paper tape now references a common implementation file,
  dec_pt.h.
- Device address conflicts are not detected until simulation starts.

3.5 PDP-1

- DECtape (then known as MicroTape) support has been added.
- The line printer and DECtape can be disabled and enabled.

3.6 PDP-8

- The RX28 (double density floppy) has been added as an option to
  the existing RX8E controller.
- SHOW <device> DEVNO displays the device's device number.  Most
  devices allow the device number to be changed with SET <device>
  DEVNO=nnn.
- Device number conflicts are not detected until simulation starts.

3.7 IBM 1620

- The IBM 1620 simulator has been released.

3.8 AltairZ80

- A hard drive has been added for increased storage.
- Several bugs have been fixed.

3.9 HP 2100

- The 12845A has been added and made the default line printer (LPT).
  The 12653A has been renamed LPS and is off by default.  It also
  supports the diagnostic functions needed to run the DCPC and DMS
  diagnostics.
- The 12557A/13210A disk defaults to the 13210A (7900/7901).
- The 12559A magtape is off by default.
- New CPU options (EAU/NOEAU) enable/disable the extended arithmetic
  instructions for the 2116.  These instructions are standard on
  the 2100 and 21MX.
- New CPU options (MPR/NOMPR) enable/disable memory protect for the
  2100 and 21MX.
- New CPU options (DMS/NODMS) enable/disable the dynamic mapping
  instructions for the 21MX.
- The 12539 timebase generator autocalibrates.

3.10 Simulated Magtapes

- Simulated magtapes recognize end of file and the marker
  0xFFFFFFFF as end of medium.  Only the TMSCP tape simulator
  can generate an end of medium marker.
- The error handling in simulated magtapes was overhauled to be
  consistent through all simulators.

3.11 Simulated DECtapes

- Added support for RT11 image file format (256 x 16b) to DECtapes.

4. Bugs Fixed in 2.10 vs prior releases

- TS11/TSV05 was not simulating the XS0_MOT bit, causing failures
  under VMS.  In addition, two of the CTL options were coded
  interchanged.
- IBM 1401 tape was not setting a word mark under group mark for
  load mode reads.  This caused the diagnostics to crash.
- SCP bugs in ssh_break and set_logon were fixed (found by Dave
  Hittner).
- Numerous bugs in the HP 2100 extended arithmetic, floating point,
  21MX, DMS, and IOP instructions were fixed.  Bugs were also fixed
  in the memory protect and DMS functions.  The moving head disks
  (DP, DQ) were revised to simulate the hardware more accurately.
  Missing functions in DQ (address skip, read address) were added.
- PDP-10 tape wouldn't boot, and then wouldn't read (reported by
  Michael Thompson and Harris Newman, respectively)
- PDP-1 typewriter is half duplex, with only one shift state for
  both input and output (found by Derek Peschel)

5. General Notes

WARNING: V2.10 has reorganized and renamed some of the definition
files for the PDP-10, PDP-11, and VAX.  Be sure to delete all
previous source files before you unpack the Zip archive, or
unpack it into a new directory structure.

WARNING: V2.10 has a new, more comprehensive save file format.
Restoring save files from previous releases will cause 'invalid
register' errors and loss of CPU option flags, device enable/
disable flags, unit online/offline flags, and unit writelock
flags.

WARNING: If you are using Visual Studio .NET through the IDE,
be sure to turn off the /Wp64 flag in the project settings, or
dozens of spurious errors will be generated.

WARNING: Compiling Ethernet support under Windows requires
extra steps; see the Ethernet readme file.  Ethernet support is
currently available only for Windows, Linux, NetBSD, and OpenBSD.
2011-04-15 08:33:56 -07:00

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/* pdp10_xtnd.c: PDP-10 extended instruction simulator
Copyright (c) 1993-2002, Robert M Supnik
Permission is hereby granted, free of charge, to any person obtaining a
copy of this software and associated documentation files (the "Software"),
to deal in the Software without restriction, including without limitation
the rights to use, copy, modify, merge, publish, distribute, sublicense,
and/or sell copies of the Software, and to permit persons to whom the
Software is furnished to do so, subject to the following conditions:
The above copyright notice and this permission notice shall be included in
all copies or substantial portions of the Software.
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
ROBERT M SUPNIK BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
Except as contained in this notice, the name of Robert M Supnik shall not
be used in advertising or otherwise to promote the sale, use or other dealings
in this Software without prior written authorization from Robert M Supnik.
12-May-01 RMS Fixed compiler warning in xlate
Instructions handled in this module:
MOVSLJ move string left justified
MOVSO move string offset
MOVST move string translated
MOVSRJ move string right justified
CMPSL compare string, skip on less
CMPSE compare string, skip on equal
CMPSLE compare string, skip on less or equal
CMPSGE compare string, skip on greater or equal
CMPSN compare string, skip on unequal
CMPSG compare string, skip on greater
CVTDBO convert decimal to binary offset
CVTDBT convert decimal to binary translated
CVTBDO convert binary to decimal offset
CVTBDT convert binary to decimal translated
EDIT edit
The PDP-10 extended instructions deal with non-binary data types,
particularly byte strings and decimal strings. (In the KL10, the
extended instructions include G floating support as well.) They
are very complicated microcoded subroutines that can potentially
run for a very long time. Accordingly, the instructions must test
for interrupts as well as page faults, and be prepared to restart
from either.
In general, the simulator attempts to keep the AC block up to date,
so that page fails and interrupts can be taken directly at any point.
If the AC block is not up to date, memory accessibility must be tested
before the actual read or write is done.
The extended instruction routine returns a status code as follows:
XT_NOSK no skip completion
XT_SKIP skip completion
XT_MUUO invalid extended instruction
*/
#include "pdp10_defs.h"
#include <setjmp.h>
#define MM_XSRC (pflgs & XSRC_PXCT)
#define MM_XDST (pflgs & XDST_PXCT)
#define MM_EA_XSRC ((pflgs & EA_PXCT) && MM_XSRC)
#define MM_EA_XDST ((pflgs & EA_PXCT) && MM_XDST)
#define XT_CMPSL 001 /* opcodes */
#define XT_CMPSE 002
#define XT_CMPSLE 003
#define XT_EDIT 004
#define XT_CMPSGE 005
#define XT_CMPSN 006
#define XT_CMPSG 007
#define XT_CVTDBO 010
#define XT_CVTDBT 011
#define XT_CVTBDO 012
#define XT_CVTBDT 013
#define XT_MOVSO 014
#define XT_MOVST 015
#define XT_MOVSLJ 016
#define XT_MOVSRJ 017
/* Translation control */
#define XT_LFLG 0400000000000 /* L flag */
#define XT_SFLG 0400000000000 /* S flag */
#define XT_NFLG 0200000000000 /* N flag */
#define XT_MFLG 0100000000000 /* M flag */
/* Translation table */
#define XT_V_CODE 15 /* translation op */
#define XT_M_CODE 07
#define XT_BYMASK 07777 /* byte mask */
#define XT_DGMASK 017 /* digit mask */
#define XT_GETCODE(x) ((int32) (((x) >> XT_V_CODE) & XT_M_CODE))
/* AC masks */
#define XLNTMASK 0000777777777 /* length */
#define XFLGMASK 0700000000000 /* flags */
#define XT_MBZ 0777000000000 /* must be zero */
#define XT_MBZE 0047777000000 /* must be zero, edit */
/* Register change log */
#define XT_N_RLOG 5 /* entry width */
#define XT_M_RLOG ((1 << XT_N_RLOG) - 1) /* entry mask */
#define XT_O_RLOG 1 /* entry offset */
#define XT_INSRLOG(x,v) v = ((v << XT_N_RLOG) | (((x) + XT_O_RLOG) & XT_M_RLOG))
#define XT_REMRLOG(x,v) x = (v & XT_M_RLOG) - XT_O_RLOG; \
v = v >> XT_N_RLOG
/* Edit */
#define ED_V_PBYN 30 /* pattern byte # */
#define ED_M_PBYN 03
#define ED_PBYNO 0040000000000 /* overflow bit */
#define ED_GETPBYN(x) ((int32) (((x) >> ED_V_PBYN) & ED_M_PBYN))
#define ED_V_POPC 6 /* pattern byte opcode */
#define ED_M_PAT 0777 /* pattern byte mask */
#define ED_M_NUM 0077 /* number for msg, etc */
#define ED_PBYTE(x,y) ((int32) (((x) >> (27 - (ED_GETPBYN (y) * 9))) & ED_M_PAT))
#define ED_STOP 0000 /* stop */
#define ED_SELECT 0001 /* select source */
#define ED_SIGST 0002 /* start significance */
#define ED_FLDSEP 0003 /* field separator */
#define ED_EXCHMD 0004 /* exchange mark, dst */
#define ED_MESSAG 0100 /* message */
#define ED_SKPM 0500 /* skip if M */
#define ED_SKPN 0600 /* skip if N */
#define ED_SKPA 0700 /* skip always */
extern d10 *ac_cur; /* current AC block */
extern d10 bytemask[64];
extern int32 flags;
extern int32 rlog;
extern jmp_buf save_env;
extern d10 Read (int32 ea, int32 prv);
extern void Write (int32 ea, d10 val, int32 prv);
extern a10 calc_ea (d10 inst, int32 prv);
extern int32 test_int (void);
d10 incbp (d10 bp);
d10 incloadbp (int32 ac, int32 pflgs);
void incstorebp (d10 val, int32 ac, int32 pflgs);
d10 xlate (d10 by, a10 tblad, d10 *xflgs, int32 pflgs);
void filldst (d10 fill, int32 ac, d10 cnt, int32 pflgs);
static const d10 pwrs10[23][2] = {
0, 0,
0, 1,
0, 10,
0, 100,
0, 1000,
0, 10000,
0, 100000,
0, 1000000,
0, 10000000,
0, 100000000,
0, 1000000000,
0, 10000000000,
2, 31280523264,
29, 3567587328,
291, 1316134912,
2910, 13161349120,
29103, 28534276096,
291038, 10464854016,
2910383, 1569325056,
29103830, 15693250560,
291038304, 19493552128,
2910383045, 23136829440,
29103830456, 25209864192 };
int xtend (int32 ac, int32 ea, int32 pflgs)
{
d10 b1, b2, ppi;
d10 xinst, xoff, digit, f1, f2, rs[2];
d10 xflgs = 0;
a10 e1, entad;
int32 p1 = ADDAC (ac, 1);
int32 p3 = ADDAC (ac, 3);
int32 p4 = ADDAC (ac, 4);
int32 flg, i, s2, t, pp, pat, xop, xac, ret;
xinst = Read (ea, MM_OPND); /* get extended instr */
xop = GET_OP (xinst); /* get opcode */
xac = GET_AC (xinst); /* get AC */
if (xac || (xop == 0) || (xop > XT_MOVSRJ)) return XT_MUUO;
rlog = 0; /* clear log */
switch (xop) { /* case on opcode */
/* String compares - checked against KS10 ucode
If both strings are zero length, they are considered equal.
Both source and destination lengths are MBZ checked.
AC = source1 length
AC + 1 = source1 byte pointer
AC + 3 = source2 length
AC + 4 = source2 byte pointer
*/
case XT_CMPSL: /* CMPSL */
case XT_CMPSE: /* CMPSE */
case XT_CMPSLE: /* CMPSLE */
case XT_CMPSGE: /* CMPSGE */
case XT_CMPSN: /* CMPSN */
case XT_CMPSG: /* CMPSG */
if ((AC(ac) | AC(p3)) & XT_MBZ) return XT_MUUO; /* check length MBZ */
f1 = Read (ADDA (ea, 1), MM_OPND) & bytemask[GET_S (AC(p1))];
f2 = Read (ADDA (ea, 2), MM_OPND) & bytemask[GET_S (AC(p4))];
b1 = b2 = 0;
for (flg = 0; (AC(ac) | AC(p3)) && (b1 == b2); flg++) {
if (flg && (t = test_int ())) ABORT (t);
rlog = 0; /* clear log */
if (AC(ac)) b1 = incloadbp (p1, pflgs); /* src1 */
else b1 = f1;
if (AC(p3)) b2 = incloadbp (p4, pflgs); /* src2 */
else b2 = f2;
if (AC(ac)) AC(ac) = (AC(ac) - 1) & XLNTMASK;
if (AC(p3)) AC(p3) = (AC(p3) - 1) & XLNTMASK; }
switch (xop) {
case XT_CMPSL: return (b1 < b2)? XT_SKIP: XT_NOSK;
case XT_CMPSE: return (b1 == b2)? XT_SKIP: XT_NOSK;
case XT_CMPSLE: return (b1 <= b2)? XT_SKIP: XT_NOSK;
case XT_CMPSGE: return (b1 >= b2)? XT_SKIP: XT_NOSK;
case XT_CMPSN: return (b1 != b2)? XT_SKIP: XT_NOSK;
case XT_CMPSG: return (b1 > b2)? XT_SKIP: XT_NOSK; }
return XT_MUUO;
/* Convert binary to decimal instructions - checked against KS10 ucode
There are no MBZ tests.
AC'AC + 1 = double precision integer source
AC + 3 = flags and destination length
AC + 4 = destination byte pointer
*/
case XT_CVTBDO: /* CVTBDO */
case XT_CVTBDT: /* CVTBDT */
e1 = calc_ea (xinst, MM_EA); /* get ext inst addr */
if (xop == XT_CVTBDO) /* offset? */
xoff = (e1 & RSIGN)? (e1 | LMASK): e1; /* get offset */
rs[0] = AC(ac); /* get src opnd */
rs[1] = CLRS (AC(p1));
if (!TSTF (F_FPD)) { /* set up done yet? */
if (TSTS (AC(ac))) { DMOVN (rs); } /* get abs value */
for (i = 22; i > 1; i--) { /* find field width */
if (DCMPGE (rs, pwrs10[i])) break; }
if (i > (AC(p3) & XLNTMASK)) return XT_NOSK;
if ((i < (AC(p3) & XLNTMASK)) && (AC(p3) & XT_LFLG)) {
f1 = Read (ADDA (ea, 1), MM_OPND);
filldst (f1, p3, (AC(p3) & XLNTMASK) - i, pflgs); }
else AC(p3) = (AC(p3) & XFLGMASK) | i;
if (TSTS (AC(ac))) AC(p3) = AC(p3) | XT_MFLG;
if (AC(ac) | AC(p1)) AC(p3) = AC(p3) | XT_NFLG;
AC(ac) = rs[0]; /* update state */
AC(p1) = rs[1];
SETF (F_FPD); } /* mark set up done */
/* Now do actual binary to decimal conversion */
for (flg = 0; AC(p3) & XLNTMASK; flg++) {
if (flg && (t = test_int ())) ABORT (t);
rlog = 0; /* clear log */
i = (int32) AC(p3) & XLNTMASK; /* get length */
if (i > 22) i = 22; /* put in range */
for (digit = 0; (digit < 10) && DCMPGE (rs, pwrs10[i]); digit++) {
rs[0] = rs[0] - pwrs10[i][0] - (rs[1] < pwrs10[i][1]);
rs[1] = (rs[1] - pwrs10[i][1]) & MMASK; }
if (xop == XT_CVTBDO) digit = (digit + xoff) & DMASK;
else {
f1 = Read (e1 + (int32) digit, MM_OPND);
if ((i == 1) && (AC(p3) & XT_LFLG)) f1 = f1 >> 18;
digit = f1 & RMASK; }
incstorebp (digit, p4, pflgs); /* store digit */
AC(ac) = rs[0]; /* mem access ok */
AC(p1) = rs[1]; /* update state */
AC(p3) = (AC(p3) & XFLGMASK) | ((AC(p3) - 1) & XLNTMASK); }
CLRF (F_FPD); /* clear FPD */
return XT_SKIP;
/* Convert decimal to binary instructions - checked against KS10 ucode
There are no MBZ tests.
AC = flags and source length
AC + 1 = source byte pointer
AC + 3'AC + 4 = double precision integer result
*/
case XT_CVTDBT: /* CVTDBT */
case XT_CVTDBO: /* CVTDBO */
e1 = calc_ea (xinst, MM_EA); /* get ext inst addr */
if ((AC(ac) & XT_SFLG) == 0) AC(p3) = AC(p4) = 0; /* !S? clr res */
else AC(p4) = CLRS (AC(p4)); /* clear low sign */
if (xop == XT_CVTDBO) { /* offset? */
xoff = (e1 & RSIGN)? (e1 | LMASK): e1; /* get offset */
AC(ac) = AC(ac) | XT_SFLG; } /* set S flag */
xflgs = AC(ac) & XFLGMASK; /* get xlation flags */
for (flg = 0; AC(ac) & XLNTMASK; flg++) {
if (flg && (t = test_int ())) ABORT (t);
rlog = 0; /* clear log */
b1 = incloadbp (p1, pflgs); /* get byte */
if (xop == XT_CVTDBO) b1 = (b1 + xoff) & DMASK;
else {
b1 = xlate (b1, e1, &xflgs, MM_OPND);
if (b1 < 0) { /* terminated? */
AC(ac) = xflgs | ((AC(ac) - 1) & XLNTMASK);
if (TSTS (AC(p3))) AC(p4) = SETS (AC(p4));
return XT_NOSK; }
if (xflgs & XT_SFLG) b1 = b1 & XT_DGMASK;
else b1 = 0; }
AC(ac) = xflgs | ((AC(ac) - 1) & XLNTMASK);
if ((b1 < 0) || (b1 > 9)) { /* bad digit? done */
if (TSTS (AC(p3))) AC(p4) = SETS (AC(p4));
return XT_NOSK; }
AC(p4) = (AC(p4) * 10) + b1; /* base * 10 + digit */
AC(p3) = ((AC(p3) * 10) + (AC(p4) >> 35)) & DMASK;
AC(p4) = AC(p4) & MMASK; }
if (AC(ac) & XT_MFLG) {
AC(p4) = -AC(p4) & MMASK;
AC(p3) = (~AC(p3) + (AC(p4) == 0)) & DMASK; }
if (TSTS (AC(p3))) AC(p4) = SETS (AC(p4));
return XT_SKIP;
/* String move instructions - checked against KS10 ucode
Only the destination length is MBZ checked.
AC = flags (MOVST only) and source length
AC + 1 = source byte pointer
AC + 3 = destination length
AC + 4 = destination byte pointer
*/
case XT_MOVSO: /* MOVSO */
case XT_MOVST: /* MOVST */
case XT_MOVSRJ: /* MOVSRJ */
case XT_MOVSLJ: /* MOVSLJ */
if (AC(p3) & XT_MBZ) return XT_MUUO; /* test dst lnt MBZ */
f1 = Read (ADDA (ea, 1), MM_OPND); /* get fill */
switch (xop) { /* case on instr */
case XT_MOVSO: /* MOVSO */
AC(ac) = AC(ac) & XLNTMASK; /* trim src length */
xoff = calc_ea (xinst, MM_EA); /* get offset */
if (xoff & RSIGN) xoff = xoff | LMASK; /* sign extend 18b */
s2 = GET_S (AC(p4)); /* get dst byte size */
break;
case XT_MOVST: /* MOVST */
e1 = calc_ea (xinst, MM_EA); /* get xlate tbl addr */
break;
case XT_MOVSRJ: /* MOVSRJ */
AC(ac) = AC(ac) & XLNTMASK; /* trim src length */
if (AC(p3) == 0) return (AC(ac)? XT_NOSK: XT_SKIP);
if (AC(ac) > AC(p3)) { /* adv src ptr */
for (flg = 0; AC(ac) > AC(p3); flg++) {
if (flg && (t = test_int ())) ABORT (t);
AC(p1) = incbp (AC(p1));
AC(ac) = (AC(ac) - 1) & XLNTMASK; } }
else if (AC(ac) < AC(p3))
filldst (f1, p3, AC(p3) - AC(ac), pflgs);
break;
case XT_MOVSLJ: /* MOVSLJ */
AC(ac) = AC(ac) & XLNTMASK; /* trim src length */
break; }
xflgs = AC(ac) & XFLGMASK; /* get xlation flags */
if (AC(p3) == 0) return (AC(ac)? XT_NOSK: XT_SKIP);
for (flg = 0; AC(p3) & XLNTMASK; flg++) {
if (flg && (t = test_int ())) ABORT (t);
rlog = 0; /* clear log */
if (AC(ac) & XLNTMASK) { /* any source? */
b1 = incloadbp (p1, pflgs); /* src byte */
if (xop == XT_MOVSO) { /* offset? */
b1 = (b1 + xoff) & DMASK; /* test fit */
if (b1 & ~bytemask[s2]) {
AC(ac) = xflgs | ((AC(ac) - 1) & XLNTMASK);
return XT_NOSK; } }
else if (xop == XT_MOVST) { /* translate? */
b1 = xlate (b1, e1, &xflgs, MM_OPND);
if (b1 < 0) { /* upd flags in AC */
AC(ac) = xflgs | ((AC(ac) - 1) & XLNTMASK);
return XT_NOSK; }
if (xflgs & XT_SFLG) b1 = b1 & XT_BYMASK;
else b1 = -1; } }
else b1 = f1;
if (b1 >= 0) { /* valid byte? */
incstorebp (b1, p4, pflgs); /* store byte */
AC(p3) = (AC(p3) - 1) & XLNTMASK; } /* update state */
if (AC(ac) & XLNTMASK) AC(ac) = xflgs | ((AC(ac) - 1) & XLNTMASK); }
return (AC(ac) & XLNTMASK)? XT_NOSK: XT_SKIP;
/* Edit - checked against KS10 ucode
Only the flags/pattern pointer word is MBZ checked.
AC = flags, pattern pointer
AC + 1 = source byte pointer
AC + 3 = mark address
AC + 4 = destination byte pointer
*/
case XT_EDIT: /* EDIT */
if (AC(ac) & XT_MBZE) return XT_MUUO; /* check pattern MBZ */
xflgs = AC(ac) & XFLGMASK; /* get xlation flags */
e1 = calc_ea (xinst, MM_EA); /* get xlate tbl addr */
for (ppi = 1, ret = -1, flg = 0; ret < 0; flg++, ppi = 1) {
if (flg && (t = test_int ())) ABORT (t);
rlog = 0; /* clear log */
pp = (int32) AC(ac) & AMASK; /* get pattern ptr */
b1 = Read (pp, MM_OPND); /* get pattern word */
pat = ED_PBYTE (b1, AC(ac)); /* get pattern byte */
switch ((pat < 0100)? pat: ((pat >> ED_V_POPC) + 0100)) {
case ED_STOP: /* stop */
ret = XT_SKIP; /* exit loop */
break;
case ED_SELECT: /* select source */
b1 = incloadbp (p1, pflgs); /* get src */
entad = (e1 + ((int32) b1 >> 1)) & AMASK;
f1 = ((Read (entad, MM_OPND) >> ((b1 & 1)? 0: 18)) & RMASK);
i = XT_GETCODE (f1);
if (i & 2) xflgs =
(i & 1)? xflgs | XT_MFLG: xflgs & ~XT_MFLG;
switch (i) {
case 00: case 02: case 03:
if (xflgs & XT_SFLG) f1 = f1 & XT_BYMASK;
else {
f1 = Read (INCA (ea), MM_OPND);
if (f1 == 0) break; }
incstorebp (f1, p4, pflgs);
break;
case 01:
ret = XT_NOSK; /* exit loop */
break;
case 04: case 06: case 07:
xflgs = xflgs | XT_NFLG;
f1 = f1 & XT_BYMASK;
if ((xflgs & XT_SFLG) == 0) {
f2 = Read (ADDA (ea, 2), MM_OPND);
Write ((a10) AC(p3), AC(p4), MM_OPND);
if (f2) incstorebp (f2, p4, pflgs);
xflgs = xflgs | XT_SFLG; }
incstorebp (f1, p4, pflgs);
break;
case 05:
xflgs = xflgs | XT_NFLG;
ret = XT_NOSK; /* exit loop */
break; } /* end case xlate op */
break;
case ED_SIGST: /* start significance */
if ((xflgs & XT_SFLG) == 0) {
f2 = Read (ADDA (ea, 2), MM_OPND);
Write ((a10) AC(p3), AC(p4), MM_OPND);
if (f2) incstorebp (f2, p4, pflgs);
xflgs = xflgs | XT_SFLG; }
break;
case ED_FLDSEP: /* separate fields */
xflgs = 0;
break;
case ED_EXCHMD: /* exchange */
f2 = Read ((int32) (AC(p3) & AMASK), MM_OPND);
Write ((int32) (AC(p3) & AMASK), AC(p4), MM_OPND);
AC(p4) = f2;
break;
case (0100 + (ED_MESSAG >> ED_V_POPC)): /* message */
if (xflgs & XT_SFLG)
f1 = Read (ea + (pat & ED_M_NUM) + 1, MM_OPND);
else {
f1 = Read (ea + 1, MM_OPND);
if (f1 == 0) break; }
incstorebp (f1, p4, pflgs);
break;
case (0100 + (ED_SKPM >> ED_V_POPC)): /* skip on M */
if (xflgs & XT_MFLG) ppi = (pat & ED_M_NUM) + 2;
break;
case (0100 + (ED_SKPN >> ED_V_POPC)): /* skip on N */
if (xflgs & XT_NFLG) ppi = (pat & ED_M_NUM) + 2;
break;
case (0100 + (ED_SKPA >> ED_V_POPC)): /* skip always */
ppi = (pat & ED_M_NUM) + 2;
break;
default: /* NOP or undefined */
break; } /* end case pttrn op */
AC(ac) = AC(ac) + ((ppi & ED_M_PBYN) << ED_V_PBYN);
AC(ac) = AC(ac) + (ppi >> 2) + ((AC(ac) & ED_PBYNO)? 1: 0);
AC(ac) = xflgs | (AC(ac) & ~(XT_MBZE | XFLGMASK)); }
return ret; } /* end case xop */
return XT_MUUO;
}
/* Supporting subroutines */
/* Increment byte pointer, register version */
d10 incbp (d10 bp)
{
int32 p, s;
p = GET_P (bp); /* get P and S */
s = GET_S (bp);
p = p - s; /* adv P */
if (p < 0) { /* end of word? */
bp = (bp & LMASK) | (INCR (bp)); /* increment addr */
p = (36 - s) & 077; } /* reset P */
bp = PUT_P (bp, p); /* store new P */
return bp;
}
/* Increment and load byte, extended version - uses register log */
d10 incloadbp (int32 ac, int32 pflgs)
{
a10 ba;
d10 bp, wd;
int32 p, s;
bp = AC(ac) = incbp (AC(ac)); /* increment bp */
XT_INSRLOG (ac, rlog); /* log change */
p = GET_P (bp); /* get P and S */
s = GET_S (bp);
ba = calc_ea (bp, MM_EA_XSRC); /* calc bp eff addr */
wd = Read (ba, MM_XSRC); /* read word */
wd = (wd >> p) & bytemask[s]; /* get byte */
return wd;
}
/* Increment and deposit byte, extended version - uses register log */
void incstorebp (d10 val, int32 ac, int32 pflgs)
{
a10 ba;
d10 bp, wd, mask;
int32 p, s;
bp = AC(ac) = incbp (AC(ac)); /* increment bp */
XT_INSRLOG (ac, rlog); /* log change */
p = GET_P (bp); /* get P and S */
s = GET_S (bp);
ba = calc_ea (bp, MM_EA_XDST); /* calc bp eff addr */
wd = Read (ba, MM_XDST); /* read, write test */
mask = bytemask[s] << p; /* shift mask, val */
val = val << p;
wd = (wd & ~mask) | (val & mask); /* insert byte */
Write (ba, wd & DMASK, MM_XDST);
return;
}
/* Translate byte
Arguments
by = byte to translate
tblad = virtual address of translation table
*xflgs = pointer to word containing translation flags
prv = previous mode flag for table lookup
Returns
xby = >= 0, translated byte
< 0, terminate translation
*/
d10 xlate (d10 by, a10 tblad, d10 *xflgs, int32 prv)
{
a10 ea;
int32 tcode;
d10 tblent;
ea = (tblad + ((int32) by >> 1)) & AMASK;
tblent = ((Read (ea, prv) >> ((by & 1)? 0: 18)) & RMASK);
tcode = XT_GETCODE (tblent); /* get xlate code */
switch (tcode) {
case 00:
return (*xflgs & XT_SFLG)? tblent: by;
case 01:
break;
case 02:
*xflgs = *xflgs & ~XT_MFLG;
return (*xflgs & XT_SFLG)? tblent: by;
case 03:
*xflgs = *xflgs | XT_MFLG;
return (*xflgs & XT_SFLG)? tblent: by;
case 04:
*xflgs = *xflgs | XT_SFLG | XT_NFLG;
return tblent;
case 05:
*xflgs = *xflgs | XT_NFLG;
break;
case 06:
*xflgs = (*xflgs | XT_SFLG | XT_NFLG) & ~XT_MFLG;
return tblent;
case 07:
*xflgs = *xflgs | XT_SFLG | XT_NFLG | XT_MFLG;
return tblent; } /* end case xlate code */
return -1;
}
/* Fill out the destination string
Arguments:
fill = fill
ac = 2 word AC block (length, byte pointer)
cnt = fill count
pflgs = PXCT flags
*/
void filldst (d10 fill, int32 ac, d10 cnt, int32 pflgs)
{
int32 i, t;
int32 p1 = ADDA (ac, 1);
for (i = 0; i < cnt; i++) {
if (i && (t = test_int ())) ABORT (t);
rlog = 0; /* clear log */
incstorebp (fill, p1, pflgs);
AC(ac) = (AC(ac) & XFLGMASK) | ((AC(ac) - 1) & XLNTMASK); }
rlog = 0;
return;
}
/* Clean up after page fault
Arguments:
logv = register change log
For each register in logv, decrement the register's contents as
though it were a byte pointer. Note that the KS10 does <not>
do a full decrement calculation but merely adds S to P.
*/
void xtcln (int32 logv)
{
int32 p, reg;
while (logv) {
XT_REMRLOG (reg, logv); /* get next reg */
if ((reg >= 0) && (reg < AC_NUM)) {
p = GET_P (AC(reg)) + GET_S (AC(reg)); /* get p + s */
AC(reg) = PUT_P (AC(reg), p); } /* p <- p + s */
}
return;
}