WARNING: V2.10 has reorganized and renamed some of the definition files for the PDP-10, PDP-11, and VAX. Be sure to delete all previous source files before you unpack the Zip archive, or unpack it into a new directory structure. WARNING: V2.10 has a new, more comprehensive save file format. Restoring save files from previous releases will cause 'invalid register' errors and loss of CPU option flags, device enable/ disable flags, unit online/offline flags, and unit writelock flags. WARNING: If you are using Visual Studio .NET through the IDE, be sure to turn off the /Wp64 flag in the project settings, or dozens of spurious errors will be generated. WARNING: Compiling Ethernet support under Windows requires extra steps; see the Ethernet readme file. Ethernet support is currently available only for Windows, Linux, NetBSD, and OpenBSD. 1. New Features 1.1 SCP and Libraries - The VT emulation package has been replaced by the capability to remote the console to a Telnet session. Telnet clients typically have more complete and robust VT100 emulation. - Simulated devices may now have statically allocated buffers, in addition to dynamically allocated buffers or disk-based data stores. - The DO command now takes substitutable arguments (max 9). In command files, %n represents substitutable argument n. - The initial command line is now interpreted as the command name and substitutable arguments for a DO command. This is backward compatible to prior versions. - The initial command line parses switches. -Q is interpreted as quiet mode; informational messages are suppressed. - The HELP command now takes an optional argument. HELP <cmd> types help on the specified command. - Hooks have been added for implementing GUI-based consoles, as well as simulator-specific command extensions. A few internal data structures and definitions have changed. - Two new routines (tmxr_open_master, tmxr_close_master) have been added to sim_tmxr.c. The calling sequence for sim_accept_conn has been changed in sim_sock.c. - The calling sequence for the VM boot routine has been modified to add an additional parameter. - SAVE now saves, and GET now restores, controller and unit flags. - Library sim_ether.c has been added for Ethernet support. 1.2 VAX - Non-volatile RAM (NVR) can behave either like a memory or like a disk-based peripheral. If unattached, it behaves like memory and is saved and restored by SAVE and RESTORE, respectively. If attached, its contents are loaded from disk by ATTACH and written back to disk at DETACH and EXIT. - SHOW <device> VECTOR displays the device's interrupt vector. A few devices allow the vector to be changed with SET <device> VECTOR=nnn. - SHOW CPU IOSPACE displays the I/O space address map. - The TK50 (TMSCP tape) has been added. - The DEQNA/DELQA (Qbus Ethernet controllers) have been added. - Autoconfiguration support has been added. - The paper tape reader has been removed from vax_stddev.c and now references a common implementation file, dec_pt.h. - Examine and deposit switches now work on all devices, not just the CPU. - Device address conflicts are not detected until simulation starts. 1.3 PDP-11 - SHOW <device> VECTOR displays the device's interrupt vector. Most devices allow the vector to be changed with SET <device> VECTOR=nnn. - SHOW CPU IOSPACE displays the I/O space address map. - The TK50 (TMSCP tape), RK611/RK06/RK07 (cartridge disk), RX211 (double density floppy), and KW11P programmable clock have been added. - The DEQNA/DELQA (Qbus Ethernet controllers) have been added. - Autoconfiguration support has been added. - The paper tape reader has been removed from pdp11_stddev.c and now references a common implementation file, dec_pt.h. - Device bootstraps now use the actual CSR specified by the SET ADDRESS command, rather than just the default CSR. Note that PDP-11 operating systems may NOT support booting with non-standard addresses. - Specifying more than 256KB of memory, or changing the bus configuration, causes all peripherals that are not compatible with the current bus configuration to be disabled. - Device address conflicts are not detected until simulation starts. 1.4 PDP-10 - SHOW <device> VECTOR displays the device's interrupt vector. A few devices allow the vector to be changed with SET <device> VECTOR=nnn. - SHOW CPU IOSPACE displays the I/O space address map. - The RX211 (double density floppy) has been added; it is off by default. - The paper tape now references a common implementation file, dec_pt.h. - Device address conflicts are not detected until simulation starts. 1.5 PDP-1 - DECtape (then known as MicroTape) support has been added. - The line printer and DECtape can be disabled and enabled. 1.6 PDP-8 - The RX28 (double density floppy) has been added as an option to the existing RX8E controller. - SHOW <device> DEVNO displays the device's device number. Most devices allow the device number to be changed with SET <device> DEVNO=nnn. - Device number conflicts are not detected until simulation starts. 1.7 IBM 1620 - The IBM 1620 simulator has been released. 1.8 AltairZ80 - A hard drive has been added for increased storage. - Several bugs have been fixed. 1.9 HP 2100 - The 12845A has been added and made the default line printer (LPT). The 12653A has been renamed LPS and is off by default. It also supports the diagnostic functions needed to run the DCPC and DMS diagnostics. - The 12557A/13210A disk defaults to the 13210A (7900/7901). - The 12559A magtape is off by default. - New CPU options (EAU/NOEAU) enable/disable the extended arithmetic instructions for the 2116. These instructions are standard on the 2100 and 21MX. - New CPU options (MPR/NOMPR) enable/disable memory protect for the 2100 and 21MX. - New CPU options (DMS/NODMS) enable/disable the dynamic mapping instructions for the 21MX. - The 12539 timebase generator autocalibrates. 1.10 Simulated Magtapes - Simulated magtapes recognize end of file and the marker 0xFFFFFFFF as end of medium. Only the TMSCP tape simulator can generate an end of medium marker. - The error handling in simulated magtapes was overhauled to be consistent through all simulators. 1.11 Simulated DECtapes - Added support for RT11 image file format (256 x 16b) to DECtapes. 2. Release Notes 2.1 Bugs Fixed - TS11/TSV05 was not simulating the XS0_MOT bit, causing failures under VMS. In addition, two of the CTL options were coded interchanged. - IBM 1401 tape was not setting a word mark under group mark for load mode reads. This caused the diagnostics to crash. - SCP bugs in ssh_break and set_logon were fixed (found by Dave Hittner). - Numerous bugs in the HP 2100 extended arithmetic, floating point, 21MX, DMS, and IOP instructions were fixed. Bugs were also fixed in the memory protect and DMS functions. The moving head disks (DP, DQ) were revised to simulate the hardware more accurately. Missing functions in DQ (address skip, read address) were added. 2.2 HP 2100 Debugging - The HP 2100 CPU nows runs all of the CPU diagnostics. - The peripherals run most of the peripheral diagnostics. There is still a problem in overlapped seek operation on the disks. See the file hp2100_diag.txt for details. 3. In Progress These simulators are not finished and are available in a separate Zip archive distribution. - Interdata 16b/32b: coded, partially tested. See the file id_diag.txt for details. - SDS 940: coded, partially tested.
787 lines
20 KiB
C
787 lines
20 KiB
C
/* s3_disk.c: IBM 5444 Disk Drives
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Copyright (c) 2001, Charles E. Owen
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Permission is hereby granted, free of charge, to any person obtaining a
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copy of this software and associated documentation files (the "Software"),
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to deal in the Software without restriction, including without limitation
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the rights to use, copy, modify, merge, publish, distribute, sublicense,
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and/or sell copies of the Software, and to permit persons to whom the
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Software is furnished to do so, subject to the following conditions:
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The above copyright notice and this permission notice shall be included in
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all copies or substantial portions of the Software.
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THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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ROBERT M SUPNIK BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
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IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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Except as contained in this notice, the name of Charles E. Owen shall not
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be used in advertising or otherwise to promote the sale, use or other dealings
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in this Software without prior written authorization from Charles E. Owen.
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r1 Removeable disk 1
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f1 Fixed disk 1
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r2 Removeable disk 2
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f2 Fixed disk 2
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08-Oct-02 RMS Added impossible function catcher
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*/
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#include "s3_defs.h"
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#include <ctype.h>
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extern uint8 M[];
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extern int32 IAR[], level;
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extern FILE *trace;
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extern int32 debug_reg;
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char dbuf[DSK_SECTSIZE]; /* Disk buffer */
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int32 dsk (int32 disk, int32 op, int32 m, int32 n, int32 data);
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int32 read_sector(UNIT *uptr, char *dbuf, int32 sect);
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int32 write_sector(UNIT *uptr, char *dbuf, int32 sect);
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t_stat r1_svc (UNIT *uptr);
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t_stat r1_boot (int32 unitno, DEVICE *dptr);
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t_stat r1_attach (UNIT *uptr, char *cptr);
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t_stat r1_reset (DEVICE *dptr);
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t_stat f1_svc (UNIT *uptr);
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t_stat f1_boot (int32 unitno, DEVICE *dptr);
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t_stat f1_attach (UNIT *uptr, char *cptr);
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t_stat f1_reset (DEVICE *dptr);
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t_stat r2_svc (UNIT *uptr);
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t_stat r2_boot (int32 unitno, DEVICE *dptr);
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t_stat r2_attach (UNIT *uptr, char *cptr);
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t_stat r2_reset (DEVICE *dptr);
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t_stat f2_svc (UNIT *uptr);
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t_stat f2_boot (int32 unitno, DEVICE *dptr);
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t_stat f2_attach (UNIT *uptr, char *cptr);
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t_stat f2_reset (DEVICE *dptr);
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extern int32 GetMem(int32 addr);
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extern int32 PutMem(int32 addr, int32 data);
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char opstr[5][5] = { "SIO", "LIO", "TIO", "SNS", "APL" };
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int32 DDAR[2]; /* Data address register */
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int32 DCAR[2]; /* Disk Control Address Register */
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int32 diskerr[2] = { 0, 0 }; /* Error status */
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int32 notrdy[2] = { 0, 0 }; /* Not ready error */
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int32 seekbusy[2] = { 0, 0 }; /* Drive busy flags */
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int32 seekhead[2] = { 0, 0 }; /* Disk head 0,1 */
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int32 found[2] = { 0, 0 }; /* Scan found bit */
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int32 RIDsect[2] = { 0, 0 }; /* for Read ID */
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/* Disk data structures
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xy_dev CDR descriptor
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xy_unit CDR unit descriptor
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xy_reg CDR register list
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x = F or R
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y = 1 or 2
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*/
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UNIT r1_unit = {
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UDATA (&r1_svc, UNIT_FIX+UNIT_ATTABLE, 0), 100 };
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REG r1_reg[] = {
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{ FLDATA (NOTRDY, notrdy[0], 0) },
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{ FLDATA (SEEK, seekbusy[0], 0) },
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{ HRDATA (DAR, DDAR[0], 16) },
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{ HRDATA (CAR, DCAR[0], 16) },
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{ HRDATA (ERR, diskerr[0], 16) },
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{ DRDATA (CYL, r1_unit.u3, 8) },
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{ DRDATA (HEAD, seekhead[0], 8) },
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{ DRDATA (POS, r1_unit.pos, 32), PV_LEFT },
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{ DRDATA (TIME, r1_unit.wait, 24), PV_LEFT },
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{ BRDATA (BUF, dbuf, 8, 8, 256) },
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{ NULL } };
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DEVICE r1_dev = {
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"R1", &r1_unit, r1_reg, NULL,
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1, 10, 31, 1, 8, 7,
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NULL, NULL, &r1_reset,
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&r1_boot, &r1_attach, NULL };
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UNIT f1_unit = {
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UDATA (&f1_svc, UNIT_FIX+UNIT_ATTABLE, 0), 100 };
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REG f1_reg[] = {
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{ FLDATA (NOTRDY, notrdy[0], 0) },
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{ FLDATA (SEEK, seekbusy[0], 0) },
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{ HRDATA (DAR, DDAR[0], 16) },
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{ HRDATA (CAR, DCAR[0], 16) },
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{ HRDATA (ERR, diskerr[0], 16) },
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{ DRDATA (CYL, f1_unit.u3, 8) },
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{ DRDATA (HEAD, seekhead[0], 8) },
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{ DRDATA (POS, f1_unit.pos, 32), PV_LEFT },
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{ DRDATA (TIME, f1_unit.wait, 24), PV_LEFT },
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{ BRDATA (BUF, dbuf, 8, 8, 256) },
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{ NULL } };
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DEVICE f1_dev = {
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"F1", &f1_unit, f1_reg, NULL,
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1, 10, 31, 1, 8, 7,
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NULL, NULL, &f1_reset,
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&f1_boot, &f1_attach, NULL };
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UNIT r2_unit = {
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UDATA (&r2_svc, UNIT_FIX+UNIT_ATTABLE, 0), 100 };
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REG r2_reg[] = {
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{ FLDATA (NOTRDY, notrdy[1], 0) },
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{ FLDATA (SEEK, seekbusy[1], 0) },
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{ HRDATA (DAR, DDAR[1], 16) },
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{ HRDATA (CAR, DCAR[1], 16) },
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{ HRDATA (ERR, diskerr[1], 16) },
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{ DRDATA (CYL, r2_unit.u3, 8) },
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{ DRDATA (HEAD, seekhead[1], 8) },
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{ DRDATA (POS, r2_unit.pos, 32), PV_LEFT },
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{ DRDATA (TIME, r2_unit.wait, 24), PV_LEFT },
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{ BRDATA (BUF, dbuf, 8, 8, 256) },
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{ NULL } };
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DEVICE r2_dev = {
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"R2", &r2_unit, r2_reg, NULL,
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1, 10, 31, 1, 8, 7,
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NULL, NULL, &r2_reset,
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&r2_boot, &r2_attach, NULL };
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UNIT f2_unit = {
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UDATA (&f2_svc, UNIT_FIX+UNIT_ATTABLE, 0), 100 };
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REG f2_reg[] = {
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{ FLDATA (NOTRDY, notrdy[1], 0) },
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{ FLDATA (SEEK, seekbusy[1], 0) },
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{ HRDATA (DAR, DDAR[1], 16) },
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{ HRDATA (CAR, DCAR[1], 16) },
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{ HRDATA (ERR, diskerr[1], 16) },
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{ DRDATA (CYL, f2_unit.u3, 8) },
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{ DRDATA (HEAD, seekhead[1], 8) },
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{ DRDATA (POS, f2_unit.pos, 32), PV_LEFT },
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{ DRDATA (TIME, f2_unit.wait, 24), PV_LEFT },
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{ BRDATA (BUF, dbuf, 8, 8, 256) },
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{ NULL } };
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DEVICE f2_dev = {
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"F2", &f2_unit, f2_reg, NULL,
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1, 10, 31, 1, 8, 7,
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NULL, NULL, &f2_reset,
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&f2_boot, &f2_attach, NULL };
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/* -------------------------------------------------------------------- */
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/* 5444: master routines */
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int32 dsk1 (int32 op, int32 m, int32 n, int32 data)
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{
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int32 r;
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r = dsk(0, op, m, n, data);
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return (r);
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}
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int32 dsk2 (int32 op, int32 m, int32 n, int32 data)
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{
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int32 r;
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r = dsk(1, op, m, n, data);
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return (r);
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}
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/* 5444: operational routine */
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int32 dsk (int32 disk, int32 op, int32 m, int32 n, int32 data)
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{
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int32 iodata, i, j, u, sect, nsects, addr, r, c, res;
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int32 F, C, S, N, usave;
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UNIT *uptr;
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u = m;
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if (disk == 1) u += 2;
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F = GetMem(DCAR[disk]+0); /* Flag bits */
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C = GetMem(DCAR[disk]+1); /* Cylinder */
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S = GetMem(DCAR[disk]+2); /* Sector */
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N = GetMem(DCAR[disk]+3); /* Number of sectors */
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switch (u) {
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case 0:
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uptr = r1_dev.units;
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break;
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case 1:
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uptr = f1_dev.units;
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break;
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case 2:
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uptr = r2_dev.units;
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break;
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case 3:
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uptr = f2_dev.units;
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break;
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default:
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break;
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}
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if (debug_reg & 0x02)
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fprintf(trace, "==> %04X %s %01X,%d,%04X DAR=%04X CAR=%04X C=%02X, S=%02X, N=%02X\n",
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IAR[level],
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opstr[op],
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m, n, data,
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DDAR[disk],
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DCAR[disk],
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C, S, N);
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switch (op) {
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/* SIO 5444 */
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case 0:
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if ((uptr->flags & UNIT_ATT) == 0)
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return SCPE_UNATT;
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diskerr[disk] = 0; /* SIO resets errors */
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found[disk] = 0; /* ... and found bit */
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iodata = 0;
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switch (n) {
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case 0x00: /* Seek */
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if (S & 0x80)
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seekhead[disk] = 1;
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else
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seekhead[disk] = 0;
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if (S & 1) {
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uptr -> u3 += N;
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} else {
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uptr -> u3 -= N;
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}
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if (uptr -> u3 < 0)
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uptr -> u3 = 0;
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if (uptr -> u3 > 203) {
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uptr -> u3 = 0;
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diskerr[disk] |= 0x0100;
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if (debug_reg & 0x02)
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fprintf(trace, "==> Seek Past End of Disk\n");
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}
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/*sim_activate(uptr, uptr -> wait);*/
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sim_activate(uptr, 1);
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/* Seek arms are the same for both disks on a drive:
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update the other arm */
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usave = uptr -> u3;
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if (u == 0) uptr = f1_dev.units;
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if (u == 1) uptr = r1_dev.units;
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if (u == 2) uptr = f2_dev.units;
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if (u == 3) uptr = r2_dev.units;
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uptr -> u3 = usave;
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seekbusy[disk] = 1;
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iodata = SCPE_OK;
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break;
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case 0x01: /* Read */
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switch (data) {
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case 0: /* Read data */
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sect = (S >> 2) & 0x3F;
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nsects = N + 1;
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addr = DDAR[disk];
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for (i = 0; i < nsects; i++) {
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r = read_sector(uptr, dbuf, sect);
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if (r != 1 || uptr->u3 != C) {
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diskerr[disk] |= 0x0800;
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break;
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}
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for (j = 0; j < DSK_SECTSIZE; j++) {
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PutMem(addr, dbuf[j]);
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addr++;
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}
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if ((sect == 55) ) { /* HJS MODS */
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S = sect;
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N = nsects - i - 2;
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if (N > -1) diskerr[disk] |= 0x0020; /* end of cyl. */
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DDAR[disk] = addr & 0xFFFF; /* HJS mod */
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PutMem(DCAR[disk]+2, S << 2);
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PutMem(DCAR[disk]+3, N);
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sim_activate(uptr, 1);
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iodata = SCPE_OK;
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break;
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}
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sect++;
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S = sect - 1;
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N = nsects - i - 2;
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if (sect == 24)
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sect = 32;
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}
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DDAR[disk] = addr & 0xFFFF; /* HJS mod */
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PutMem(DCAR[disk]+2, S << 2);
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PutMem(DCAR[disk]+3, N);
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/*sim_activate(uptr, uptr -> wait);*/
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sim_activate(uptr, 1);
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iodata = SCPE_OK;
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break;
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case 1: /* Read ID */
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if (uptr -> u3 > 0 && uptr -> u3 < 4)
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PutMem(DCAR[disk], 1);
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else
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PutMem(DCAR[disk], 0);
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PutMem(DCAR[disk]+1, uptr -> u3);
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PutMem(DCAR[disk]+2, RIDsect[disk]);
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RIDsect[disk]++;
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if (RIDsect[disk] > 23)
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RIDsect[disk] = 32;
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if (RIDsect[disk] > 55)
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RIDsect[disk] = 0;
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break;
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case 2: /* Read Diagnostic */
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iodata = STOP_INVDEV;
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break;
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case 3: /* Verify */
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sect = (S >> 2) & 0x3F;
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nsects = N + 1;
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addr = DDAR[disk];
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for (i = 0; i < nsects; i++) {
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r = read_sector(uptr, dbuf, sect);
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if (r != 1 || uptr->u3 != C) {
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diskerr[disk] |= 0x0800;
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break;
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}
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if ((sect == 55) ) { /* HJS MODS */
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S = sect;
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N = nsects - i - 2;
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if (N > -1) diskerr[disk] |= 0x0020; /* end of cyl. */
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DDAR[disk] = addr & 0xFFFF;
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PutMem(DCAR[disk]+2, S << 2);
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PutMem(DCAR[disk]+3, N);
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sim_activate(uptr, 1);
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iodata = SCPE_OK;
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break;
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}
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sect++;
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S = sect - 1;
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N = nsects - i - 2;
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if (sect == 24)
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sect = 32;
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}
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DDAR[disk] = addr & 0xFFFF;
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PutMem(DCAR[disk]+2, S << 2);
|
|
PutMem(DCAR[disk]+3, N);
|
|
/*sim_activate(uptr, uptr -> wait);*/
|
|
sim_activate(uptr, 1);
|
|
break;
|
|
default:
|
|
return STOP_INVDEV;
|
|
}
|
|
break;
|
|
case 0x02: /* Write */
|
|
switch (data) {
|
|
case 0: /* Write Data */
|
|
sect = (S >> 2) & 0x3F;
|
|
nsects = N + 1;
|
|
addr = DDAR[disk];
|
|
for (i = 0; i < nsects; i++) {
|
|
for (j = 0; j < DSK_SECTSIZE; j++) {
|
|
dbuf[j] = GetMem(addr);
|
|
addr++;
|
|
}
|
|
r = write_sector(uptr, dbuf, sect);
|
|
if (r != 1 || uptr->u3 != C) {
|
|
diskerr[disk] |= 0x0400;
|
|
break;
|
|
}
|
|
if ((sect == 55) ) { /* HJS MODS */
|
|
S = sect;
|
|
N = nsects - i - 2;
|
|
if (N > -1) diskerr[disk] |= 0x0020; /* end of cyl. */
|
|
DDAR[disk] = addr & 0xFFFF;
|
|
PutMem(DCAR[disk]+2, S << 2);
|
|
PutMem(DCAR[disk]+3, N);
|
|
sim_activate(uptr, 1);
|
|
iodata = SCPE_OK;
|
|
break;
|
|
}
|
|
sect++;
|
|
S = sect - 1;
|
|
N = nsects - i - 2;
|
|
if (sect == 24)
|
|
sect = 32;
|
|
}
|
|
DDAR[disk] = addr & 0xFFFF; /* HJS mod */
|
|
PutMem(DCAR[disk]+2, S << 2);
|
|
PutMem(DCAR[disk]+3, N);
|
|
/*sim_activate(uptr, uptr -> wait);*/
|
|
sim_activate(uptr, 1);
|
|
break;
|
|
case 1: /* Write identifier */
|
|
if (seekhead[disk] == 0)
|
|
S = 0;
|
|
else
|
|
S = 0x80;
|
|
N = 23;
|
|
|
|
sect = (S >> 2) & 0x3F;
|
|
nsects = N + 1;
|
|
addr = DDAR[disk];
|
|
for (i = 0; i < nsects; i++) {
|
|
for (j = 0; j < DSK_SECTSIZE; j++) {
|
|
dbuf[j] = GetMem(addr);
|
|
}
|
|
r = write_sector(uptr, dbuf, sect);
|
|
if (r != 1) {
|
|
diskerr[disk] |= 0x0400;
|
|
break;
|
|
}
|
|
if ((sect == 55) ) {
|
|
S = sect;
|
|
N = nsects - i - 2;
|
|
if (N > 0) diskerr[disk] |= 0x0020;
|
|
DDAR[disk] = addr & 0xFFFF;
|
|
PutMem(DCAR[disk]+2, S << 2);
|
|
PutMem(DCAR[disk]+3, N);
|
|
sim_activate(uptr, 1);
|
|
iodata = SCPE_OK;
|
|
break;
|
|
}
|
|
sect++;
|
|
S = sect - 1;
|
|
N = nsects - i - 2;
|
|
if (sect == 24)
|
|
sect = 32;
|
|
}
|
|
DDAR[disk] = addr & 0xFFFF;
|
|
PutMem(DCAR[disk]+2, S << 2);
|
|
PutMem(DCAR[disk]+3, N);
|
|
/*sim_activate(uptr, uptr -> wait);*/
|
|
sim_activate(uptr, 1);
|
|
break;
|
|
default:
|
|
return STOP_INVDEV;
|
|
}
|
|
break;
|
|
case 0x03: /* Scan */
|
|
sect = (S >> 2) & 0x3F;
|
|
nsects = N + 1;
|
|
addr = DDAR[disk];
|
|
for (i = 0; i < nsects; i++) {
|
|
r = read_sector(uptr, dbuf, sect);
|
|
if (r != 1 || uptr->u3 != C) {
|
|
diskerr[disk] |= 0x0800;
|
|
break;
|
|
}
|
|
res = 0;
|
|
for (j = 0; j < DSK_SECTSIZE; j++) {
|
|
c = GetMem(addr);
|
|
if (j != 0xff) {
|
|
if (dbuf[i] < c)
|
|
res = 1;
|
|
if (dbuf[i] > c)
|
|
res = 3;
|
|
}
|
|
addr++;
|
|
}
|
|
if (res == 0)
|
|
found[disk] = 1;
|
|
if (res == data)
|
|
break;
|
|
if ((sect == 55) ) { /* HJS MODS */
|
|
S = sect;
|
|
N = nsects - i - 2;
|
|
if (N > -1) diskerr[disk] |= 0x0020; /* end of cyl. */
|
|
DDAR[disk] = addr & 0xFFFF;
|
|
PutMem(DCAR[disk]+2, S << 2);
|
|
PutMem(DCAR[disk]+3, N);
|
|
sim_activate(uptr, 1);
|
|
iodata = SCPE_OK;
|
|
break;
|
|
}
|
|
sect++;
|
|
S = sect - 1;
|
|
N = nsects - i - 2;
|
|
if (sect == 24)
|
|
sect = 32;
|
|
}
|
|
PutMem(DCAR[disk]+2, S << 2);
|
|
PutMem(DCAR[disk]+3, N);
|
|
/*sim_activate(uptr, uptr -> wait);*/
|
|
sim_activate(uptr, 1);
|
|
break;
|
|
default:
|
|
return STOP_INVDEV;
|
|
}
|
|
return iodata;
|
|
|
|
/* LIO 5444 */
|
|
case 1:
|
|
if ((uptr->flags & UNIT_ATT) == 0)
|
|
return SCPE_UNATT;
|
|
switch (n) {
|
|
case 0x04: /* Data Addr */
|
|
DDAR[disk] = data;
|
|
break;
|
|
case 0x06: /* Control Addr */
|
|
DCAR[disk] = data;
|
|
break;
|
|
default:
|
|
return STOP_INVDEV;
|
|
}
|
|
return SCPE_OK;
|
|
case 2: /* TIO 5444 */
|
|
if ((uptr->flags & UNIT_ATT) == 0)
|
|
return SCPE_UNATT << 16;
|
|
iodata = 0;
|
|
switch (n) {
|
|
case 0x00: /* Error */
|
|
if (diskerr[disk] || notrdy[disk])
|
|
iodata = 1;
|
|
if ((uptr -> flags & UNIT_ATT) == 0)
|
|
iodata = 1;
|
|
break;
|
|
case 0x02: /* Busy */
|
|
if (sim_is_active (uptr))
|
|
iodata = 1;
|
|
break;
|
|
case 0x04:
|
|
if (found[disk])
|
|
iodata = 1;
|
|
break;
|
|
default:
|
|
return (STOP_INVDEV << 16);
|
|
}
|
|
return ((SCPE_OK << 16) | iodata);
|
|
|
|
/* SNS 5444 */
|
|
case 3:
|
|
if ((uptr->flags & UNIT_ATT) == 0)
|
|
return SCPE_UNATT << 16;
|
|
iodata = 0;
|
|
switch (n) {
|
|
case 0x01:
|
|
break;
|
|
case 0x02:
|
|
iodata = diskerr[disk];
|
|
if (notrdy[disk])
|
|
iodata |= 0x4000;
|
|
if ((uptr -> flags & UNIT_ATT) == 0)
|
|
iodata |= 0x4000;
|
|
if (seekbusy[disk])
|
|
iodata |= 0x0010;
|
|
if (uptr -> u3 == 0)
|
|
iodata |= 0x0040;
|
|
break;
|
|
case 0x03:
|
|
iodata = 0;
|
|
break;
|
|
case 0x04:
|
|
iodata = DDAR[disk];
|
|
break;
|
|
case 0x06:
|
|
iodata = DCAR[disk];
|
|
break;
|
|
default:
|
|
return (STOP_INVDEV << 16);
|
|
}
|
|
iodata |= ((SCPE_OK << 16) & 0xffff0000);
|
|
return (iodata);
|
|
|
|
/* APL 5444 */
|
|
case 4:
|
|
if ((uptr->flags & UNIT_ATT) == 0)
|
|
return SCPE_UNATT << 16;
|
|
iodata = 0;
|
|
switch (n) {
|
|
case 0x00: /* Error */
|
|
if (diskerr[disk] || notrdy[disk])
|
|
iodata = 1;
|
|
if ((uptr -> flags & UNIT_ATT) == 0)
|
|
iodata = 1;
|
|
break;
|
|
case 0x02: /* Busy */
|
|
if (sim_is_active (uptr))
|
|
iodata = 1;
|
|
break;
|
|
default:
|
|
return (STOP_INVDEV << 16);
|
|
}
|
|
return ((SCPE_OK << 16) | iodata);
|
|
default:
|
|
break;
|
|
}
|
|
printf (">>DSK%d non-existent function %d\n", disk, op);
|
|
return SCPE_OK;
|
|
}
|
|
|
|
/* Disk unit service. If a stacker select is active, copy to the
|
|
selected stacker. Otherwise, copy to the normal stacker. If the
|
|
unit is unattached, simply exit.
|
|
*/
|
|
|
|
t_stat r1_svc (UNIT *uptr)
|
|
{
|
|
seekbusy[0] = 0;
|
|
return SCPE_OK;
|
|
}
|
|
t_stat f1_svc (UNIT *uptr)
|
|
{
|
|
seekbusy[0] = 0;
|
|
return SCPE_OK;
|
|
}
|
|
t_stat r2_svc (UNIT *uptr)
|
|
{
|
|
seekbusy[1] = 0;
|
|
return SCPE_OK;
|
|
}
|
|
t_stat f2_svc (UNIT *uptr)
|
|
{
|
|
seekbusy[1] = 0;
|
|
return SCPE_OK;
|
|
}
|
|
|
|
|
|
/* Disk reset */
|
|
|
|
t_stat r1_reset (DEVICE *dptr)
|
|
{
|
|
diskerr[0] = notrdy[0] = seekbusy[0] = 0; /* clear indicators */
|
|
found[0] = 0;
|
|
sim_cancel (&r1_unit); /* clear event */
|
|
r1_unit.u3 = 0; /* cylinder 0 */
|
|
return SCPE_OK;
|
|
}
|
|
t_stat f1_reset (DEVICE *dptr)
|
|
{
|
|
diskerr[0] = notrdy[0] = seekbusy[0] = 0; /* clear indicators */
|
|
found[0] = 0;
|
|
sim_cancel (&f1_unit); /* clear event */
|
|
f1_unit.u3 = 0; /* cylinder 0 */
|
|
return SCPE_OK;
|
|
}
|
|
t_stat r2_reset (DEVICE *dptr)
|
|
{
|
|
diskerr[1] = notrdy[1] = seekbusy[1] = 0; /* clear indicators */
|
|
found[1] = 0;
|
|
sim_cancel (&r2_unit); /* clear event */
|
|
r2_unit.u3 = 0; /* cylinder 0 */
|
|
return SCPE_OK;
|
|
}
|
|
t_stat f2_reset (DEVICE *dptr)
|
|
{
|
|
diskerr[1] = notrdy[1] = seekbusy[1] = 0; /* clear indicators */
|
|
found[1] = 0;
|
|
sim_cancel (&f2_unit); /* clear event */
|
|
f2_unit.u3 = 0; /* cylinder 0 */
|
|
return SCPE_OK;
|
|
}
|
|
|
|
/* Disk unit attach */
|
|
|
|
t_stat r1_attach (UNIT *uptr, char *cptr)
|
|
{
|
|
diskerr[0] = notrdy[0] = seekbusy[0] = 0; /* clear status */
|
|
found[0] = 0;
|
|
uptr -> u3 = 0; /* cylinder 0 */
|
|
return attach_unit (uptr, cptr);
|
|
}
|
|
t_stat f1_attach (UNIT *uptr, char *cptr)
|
|
{
|
|
diskerr[0] = notrdy[0] = seekbusy[0] = 0; /* clear status */
|
|
found[0] = 0;
|
|
uptr -> u3 = 0; /* cylinder 0 */
|
|
return attach_unit (uptr, cptr);
|
|
}
|
|
t_stat r2_attach (UNIT *uptr, char *cptr)
|
|
{
|
|
diskerr[1] = notrdy[1] = seekbusy[1] = 0; /* clear status */
|
|
found[1] = 0;
|
|
uptr -> u3 = 0; /* cylinder 0 */
|
|
return attach_unit (uptr, cptr);
|
|
}
|
|
t_stat f2_attach (UNIT *uptr, char *cptr)
|
|
{
|
|
diskerr[1] = notrdy[1] = seekbusy[1] = 0; /* clear status */
|
|
found[1] = 0;
|
|
uptr -> u3 = 0; /* cylinder 0 */
|
|
return attach_unit (uptr, cptr);
|
|
}
|
|
|
|
/* Bootstrap routine */
|
|
|
|
t_stat r1_boot (int32 unitno, DEVICE *dptr)
|
|
{
|
|
int i;
|
|
r1_unit.u3 = 0;
|
|
read_sector(r1_dev.units, dbuf, 0);
|
|
for (i = 0; i < 256; i++) {
|
|
M[i] = dbuf[i];
|
|
}
|
|
return SCPE_OK;
|
|
}
|
|
t_stat f1_boot (int32 unitno, DEVICE *dptr)
|
|
{
|
|
int i;
|
|
f1_unit.u3 = 0;
|
|
read_sector(f1_dev.units, dbuf, 0);
|
|
for (i = 0; i < 256; i++) {
|
|
M[i] = dbuf[i];
|
|
}
|
|
return SCPE_OK;
|
|
}
|
|
t_stat r2_boot (int32 unitno, DEVICE *dptr)
|
|
{
|
|
int i;
|
|
r2_unit.u3 = 0;
|
|
read_sector(r2_dev.units, dbuf, 0);
|
|
for (i = 0; i < 256; i++) {
|
|
M[i] = dbuf[i];
|
|
}
|
|
return SCPE_OK;
|
|
}
|
|
t_stat f2_boot (int32 unitno, DEVICE *dptr)
|
|
{
|
|
int i;
|
|
f2_unit.u3 = 0;
|
|
read_sector(f2_dev.units, dbuf, 0);
|
|
for (i = 0; i < 256; i++) {
|
|
M[i] = dbuf[i];
|
|
}
|
|
return SCPE_OK;
|
|
}
|
|
|
|
|
|
/* Raw Disk Data In/Out */
|
|
|
|
int32 read_sector(UNIT *uptr, char *dbuf, int32 sect)
|
|
{
|
|
static int32 rtn, realsect;
|
|
static long pos;
|
|
|
|
/* calculate real sector no */
|
|
if (sect > 23)
|
|
realsect = sect - 8;
|
|
else
|
|
realsect = sect;
|
|
/* physically read the sector */
|
|
pos = DSK_CYLSIZE * uptr -> u3;
|
|
pos += DSK_SECTSIZE * realsect;
|
|
rtn = fseek(uptr -> fileref, pos, 0);
|
|
rtn = fread(dbuf, DSK_SECTSIZE, 1, uptr -> fileref);
|
|
return (rtn);
|
|
}
|
|
|
|
int32 write_sector(UNIT *uptr, char *dbuf, int32 sect)
|
|
{
|
|
static int32 rtn, realsect;
|
|
static long pos;
|
|
|
|
/* calculate real sector no */
|
|
if (sect > 23)
|
|
realsect = sect - 8;
|
|
else
|
|
realsect = sect;
|
|
if (uptr -> u3 == 0 && realsect == 32)
|
|
rtn = 0;
|
|
/* physically write the sector */
|
|
pos = DSK_CYLSIZE * uptr -> u3;
|
|
pos += DSK_SECTSIZE * realsect;
|
|
rtn = fseek(uptr -> fileref, pos, 0);
|
|
rtn = fwrite(dbuf, DSK_SECTSIZE, 1, uptr -> fileref);
|
|
return (rtn);
|
|
}
|