177be95e5d
This change is a major refactor of how DMA and the DUART interact. DMA implementation can now be overridden by individual devices that require DMA. Disk and Floppy both continue to use a generic DMA implementation, but the DUART code replaces the generic DMA with its own implementation that correctly rate-limits TX. Among other things, this allows the simulator to work correctly with real serial terminals. This functionality has been tested on an AT&T 5620 "Blit" terminal, which can run the 'layers' windowing software from the simulator.
90 lines
2.9 KiB
C
90 lines
2.9 KiB
C
/* 3b2_dmac.h: AT&T 3B2 Model 400 AM9517A DMA Controller Header
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Copyright (c) 2017, Seth J. Morabito
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Permission is hereby granted, free of charge, to any person
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obtaining a copy of this software and associated documentation
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files (the "Software"), to deal in the Software without
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restriction, including without limitation the rights to use, copy,
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modify, merge, publish, distribute, sublicense, and/or sell copies
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of the Software, and to permit persons to whom the Software is
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furnished to do so, subject to the following conditions:
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The above copyright notice and this permission notice shall be
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included in all copies or substantial portions of the Software.
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THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
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ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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SOFTWARE.
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Except as contained in this notice, the name of the author shall
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not be used in advertising or otherwise to promote the sale, use or
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other dealings in this Software without prior written authorization
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from the author.
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*/
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#ifndef _3B2_DMAC_H_
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#define _3B2_DMAC_H_
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#include "3b2_sysdev.h"
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#include "3b2_id.h"
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#include "3b2_if.h"
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/* DMA Controller */
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#define DMACBASE 0x48000
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#define DMACSIZE 0x11
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/* DMA integrated disk page buffer */
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#define DMAIDBASE 0x45000
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#define DMAIDSIZE 0x5
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/* DMA integrated uart A page buffer */
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#define DMAIUABASE 0x46000
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#define DMAIUASIZE 0x5
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/* DMA integrated uart B page buffer */
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#define DMAIUBBASE 0x47000
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#define DMAIUBSIZE 0x5
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/* DMA integrated floppy page buffer */
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#define DMAIFBASE 0x4E000
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#define DMAIFSIZE 0x5
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#define DMA_ID_CHAN 0
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#define DMA_IF_CHAN 1
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#define DMA_IUA_CHAN 2
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#define DMA_IUB_CHAN 3
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#define DMA_ID 0x45
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#define DMA_IUA 0x46
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#define DMA_IUB 0x47
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#define DMA_C 0x48
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#define DMA_IF 0x4E
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#define DMA_MODE_VERIFY 0
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#define DMA_MODE_WRITE 1 /* Write to memory from device */
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#define DMA_MODE_READ 2 /* Read from memory to device */
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#define DMA_IF_READ (IFBASE + IF_DATA_REG)
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typedef struct {
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uint8 channel;
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uint32 service_address;
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t_bool *drq;
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void (*dma_handler)(uint8 channel, uint32 service_address);
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void (*after_dma_callback)();
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} dmac_dma_handler;
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/* DMAC */
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t_stat dmac_reset(DEVICE *dptr);
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uint32 dmac_read(uint32 pa, size_t size);
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void dmac_write(uint32 pa, uint32 val, size_t size);
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void dmac_service_drqs();
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void dmac_generic_dma(uint8 channel, uint32 service_address);
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#endif
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