5531ccb175
These changes facilitate more robust parameter type checking and helps to identify unexpected coding errors. Most simulators can now also be compiled with a C++ compiler without warnings. Additionally, these changes have also been configured to facilitate easier backporting of simulator and device simulation modules to run under the simh v3.9+ SCP framework.
394 lines
14 KiB
C
394 lines
14 KiB
C
/* id_uvc.c: Interdata universal clock
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Copyright (c) 2001-2012, Robert M. Supnik
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Permission is hereby granted, free of charge, to any person obtaining a
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copy of this software and associated documentation files (the "Software"),
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to deal in the Software without restriction, including without limitation
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the rights to use, copy, modify, merge, publish, distribute, sublicense,
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and/or sell copies of the Software, and to permit persons to whom the
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Software is furnished to do so, subject to the following conditions:
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The above copyright notice and this permission notice shall be included in
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all copies or substantial portions of the Software.
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THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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ROBERT M SUPNIK BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
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IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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Except as contained in this notice, the name of Robert M Supnik shall not be
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used in advertising or otherwise to promote the sale, use or other dealings
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in this Software without prior written authorization from Robert M Supnik.
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pic precision incremental clock
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lfc line frequency clock
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18-Apr-12 RMS Added lfc_cosched routine
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18-Jun-07 RMS Added UNIT_IDLE flag
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18-Oct-06 RMS Changed LFC to be free running, export tmr_poll
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23-Jul-05 RMS Fixed {} error in OC
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01-Mar-03 RMS Added SET/SHOW LFC FREQ support
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Changed precision clock algorithm for V7 UNIX
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*/
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#include "id_defs.h"
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#include <ctype.h>
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/* Device definitions */
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#define UNIT_V_DIAG (UNIT_V_UF + 0) /* diag mode */
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#define UNIT_DIAG (1 << UNIT_V_DIAG)
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#define STA_OVF 0x08 /* PIC overflow */
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#define CMD_STRT 0x20 /* start */
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#define PIC_V_RATE 12 /* rate */
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#define PIC_M_RATE 0xF
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#define PIC_RATE (PIC_M_RATE << PIC_V_RATE)
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#define PIC_CTR 0x0FFF /* PIC counters */
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#define GET_RATE(x) (((x) >> PIC_V_RATE) & PIC_M_RATE)
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#define GET_CTR(x) ((x) & PIC_CTR)
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#define PIC_TPS 1000
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extern uint32 int_req[INTSZ], int_enb[INTSZ];
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int32 pic_db = 0; /* output buf */
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int32 pic_ric = 0; /* reset count */
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int32 pic_cic = 0; /* current count */
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uint32 pic_save = 0; /* saved time */
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uint32 pic_ovf = 0; /* overflow */
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uint32 pic_rdp = 0;
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uint32 pic_wdp = 0;
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uint32 pic_cnti = 0; /* instr/timer */
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uint32 pic_arm = 0; /* int arm */
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uint32 pic_decr = 1; /* decrement */
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uint16 pic_time[4] = { 1, 10, 100, 1000 }; /* delays */
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uint16 pic_usec[4] = { 1, 10, 100, 1000 }; /* usec per tick */
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static int32 pic_map[16] = { /* map rate to delay */
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0, 0, 1, 0, 2, 0, 1, 0, 3, 0, 1, 0, 2, 0, 1, 0
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};
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uint32 pic (uint32 dev, uint32 op, uint32 dat);
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t_stat pic_svc (UNIT *uptr);
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t_stat pic_reset (DEVICE *dptr);
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void pic_sched (t_bool strt);
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uint32 pic_rd_cic (void);
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int32 lfc_tps = 120; /* ticks per */
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int32 lfc_poll = 8000;
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uint32 lfc_arm = 0; /* int arm */
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uint32 lfc (uint32 dev, uint32 op, uint32 dat);
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t_stat lfc_svc (UNIT *uptr);
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t_stat lfc_reset (DEVICE *dptr);
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t_stat lfc_set_freq (UNIT *uptr, int32 val, CONST char *cptr, void *desc);
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t_stat lfc_show_freq (FILE *st, UNIT *uptr, int32 val, CONST void *desc);
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/* PIC data structures
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pic_dev PIC device descriptor
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pic_unit PIC unit descriptor
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pic_reg PIC register list
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*/
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DIB pic_dib = { d_PIC, -1, v_PIC, NULL, &pic, NULL };
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UNIT pic_unit = { UDATA (&pic_svc, UNIT_IDLE, 0), 1000 };
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REG pic_reg[] = {
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{ HRDATA (BUF, pic_db, 16) },
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{ HRDATA (RIC, pic_ric, 16) },
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{ HRDATA (CIC, pic_cic, 12) },
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{ FLDATA (RDP, pic_rdp, 0) },
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{ FLDATA (WDP, pic_wdp, 0) },
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{ FLDATA (OVF, pic_ovf, 0) },
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{ FLDATA (IREQ, int_req[l_PIC], i_PIC) },
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{ FLDATA (IENB, int_enb[l_PIC], i_PIC) },
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{ FLDATA (IARM, pic_arm, 0) },
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{ BRDATA (TIME, pic_time, 10, 16, 4), REG_NZ + PV_LEFT },
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{ DRDATA (SAVE, pic_save, 32), REG_HRO + PV_LEFT },
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{ DRDATA (DECR, pic_decr, 16), REG_HRO + PV_LEFT },
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{ FLDATA (MODE, pic_cnti, 0), REG_HRO },
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{ HRDATA (DEVNO, pic_dib.dno, 8), REG_HRO },
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{ NULL }
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};
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MTAB pic_mod[] = {
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{ UNIT_DIAG, UNIT_DIAG, "diagnostic mode", "DIAG", NULL },
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{ UNIT_DIAG, 0, NULL, "NORMAL", NULL },
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{ MTAB_XTD|MTAB_VDV, 0, "DEVNO", "DEVNO",
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&set_dev, &show_dev, NULL },
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{ 0 }
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};
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DEVICE pic_dev = {
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"PIC", &pic_unit, pic_reg, pic_mod,
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1, 0, 0, 0, 0, 0,
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NULL, NULL, &pic_reset,
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NULL, NULL, NULL,
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&pic_dib, DEV_DISABLE
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};
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/* LFC data structures
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lfc_dev LFC device descriptor
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lfc_unit LFC unit descriptor
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lfc_reg LFC register list
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*/
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DIB lfc_dib = { d_LFC, -1, v_LFC, NULL, &lfc, NULL };
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UNIT lfc_unit = { UDATA (&lfc_svc, UNIT_IDLE, 0), 8333 };
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REG lfc_reg[] = {
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{ FLDATA (IREQ, int_req[l_LFC], i_LFC) },
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{ FLDATA (IENB, int_enb[l_LFC], i_LFC) },
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{ FLDATA (IARM, lfc_arm, 0) },
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{ DRDATA (TIME, lfc_unit.wait, 24), REG_NZ + PV_LEFT },
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{ DRDATA (TPS, lfc_tps, 8), PV_LEFT + REG_HRO },
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{ HRDATA (DEVNO, lfc_dib.dno, 8), REG_HRO },
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{ NULL }
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};
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MTAB lfc_mod[] = {
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{ MTAB_XTD|MTAB_VDV, 100, NULL, "50HZ",
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&lfc_set_freq, NULL, NULL },
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{ MTAB_XTD|MTAB_VDV, 120, NULL, "60HZ",
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&lfc_set_freq, NULL, NULL },
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{ MTAB_XTD|MTAB_VDV, 0, "FREQUENCY", NULL,
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NULL, &lfc_show_freq, NULL },
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{ MTAB_XTD|MTAB_VDV, 0, "DEVNO", "DEVNO",
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&set_dev, &show_dev, NULL },
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{ 0 }
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};
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DEVICE lfc_dev = {
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"LFC", &lfc_unit, lfc_reg, lfc_mod,
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1, 0, 0, 0, 0, 0,
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NULL, NULL, &lfc_reset,
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NULL, NULL, NULL,
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&lfc_dib, DEV_DISABLE
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};
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/* Precision clock: IO routine */
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uint32 pic (uint32 dev, uint32 op, uint32 dat)
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{
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int32 t;
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switch (op) { /* case IO op */
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case IO_ADR: /* select */
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return HW; /* HW capable */
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case IO_RH: /* read halfword */
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pic_rdp = 0; /* clr ptr */
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return pic_rd_cic ();
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case IO_RD: /* read */
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t = pic_rd_cic (); /* get cic */
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if (pic_rdp) /* 2nd? get lo */
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t = t & DMASK8;
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else t = (t >> 8) & DMASK8; /* 1st? get hi */
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pic_rdp = pic_rdp ^ 1; /* flip byte ptr */
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return t;
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case IO_WH: /* write halfword */
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pic_wdp = 0; /* clr ptr */
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pic_db = dat;
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break;
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case IO_WD: /* write */
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if (pic_wdp)
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pic_db = (pic_db & 0xFF00) | dat;
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else pic_db = (pic_db & 0xFF) | (dat << 8);
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pic_wdp = pic_wdp ^ 1; /* flip byte ptr */
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break;
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case IO_SS: /* sense status */
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if (pic_ovf) { /* overflow? */
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pic_ovf = 0; /* clear flag */
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CLR_INT (v_PIC); /* clear intr */
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return STA_OVF;
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}
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return 0;
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case IO_OC: /* output cmd */
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pic_arm = int_chg (v_PIC, dat, pic_arm); /* upd int ctrl */
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if (dat & CMD_STRT) { /* start? */
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pic_ric = pic_db; /* new ric */
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pic_cic = GET_CTR (pic_ric); /* new cic */
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pic_ovf = 0; /* clear flag */
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sim_cancel (&pic_unit); /* stop clock */
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pic_rdp = pic_wdp = 0; /* init ptrs */
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if (pic_ric & PIC_RATE) /* any rate? */
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pic_sched (TRUE);
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} /* end if start */
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break;
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} /* end case */
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return 0;
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}
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/* Unit service */
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t_stat pic_svc (UNIT *uptr)
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{
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t_bool rate_chg = FALSE;
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if (pic_cnti) /* one shot? */
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pic_cic = 0;
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pic_cic = pic_cic - pic_decr; /* decrement */
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if (pic_cic <= 0) { /* overflow? */
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if (pic_wdp) /* broken wr? set flag */
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pic_ovf = 1;
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if (pic_arm) /* if armed, intr */
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SET_INT (v_PIC);
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if (GET_RATE (pic_ric) != GET_RATE (pic_db)) /* rate change? */
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rate_chg = TRUE;
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pic_ric = pic_db; /* new ric */
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pic_cic = GET_CTR (pic_ric); /* new cic */
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if ((pic_ric & PIC_RATE) == 0)
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return SCPE_OK;
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}
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pic_sched (rate_chg);
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return SCPE_OK;
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}
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/* Schedule next interval
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If eff rate < 1ms, or diagnostic mode, count instructions
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If eff rate = 1ms, and not diagnostic mode, use timer
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*/
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void pic_sched (t_bool strt)
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{
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int32 r, t, intv, intv_usec;
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pic_save = sim_grtime (); /* save start */
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r = pic_map[GET_RATE (pic_ric)]; /* get mapped rate */
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intv = pic_cic? pic_cic: 1; /* get cntr */
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intv_usec = intv * pic_usec[r]; /* cvt to usec */
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if (!(pic_unit.flags & UNIT_DIAG) && /* not diag? */
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((intv_usec % 1000) == 0)) { /* 1ms multiple? */
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pic_cnti = 0; /* clr mode */
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pic_decr = pic_usec[3 - r]; /* set decrement */
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if (strt) /* init or */
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t = sim_rtcn_init (pic_time[3], TMR_PIC);
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else t = sim_rtcn_calb (PIC_TPS, TMR_PIC); /* calibrate */
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}
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else {
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pic_cnti = 1; /* set mode */
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pic_decr = 1; /* decr = 1 */
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t = pic_time[r] * intv; /* interval */
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if (t == 1) /* for diagn */
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t++;
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}
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sim_activate (&pic_unit, t); /* activate */
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return;
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}
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/* Read (interpolated) current interval */
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uint32 pic_rd_cic (void)
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{
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if (sim_is_active (&pic_unit) && pic_cnti) { /* running, one shot? */
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uint32 delta = sim_grtime () - pic_save; /* interval */
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uint32 tm = pic_time[pic_map[GET_RATE (pic_ric)]]; /* ticks/intv */
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delta = delta / tm; /* ticks elapsed */
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if (delta >= ((uint32) pic_cic)) /* cap value */
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return 0;
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return pic_cic - delta;
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}
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return pic_cic;
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}
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/* Reset routine */
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t_stat pic_reset (DEVICE *dptr)
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{
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sim_cancel (&pic_unit); /* cancel unit */
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pic_ric = pic_cic = 0;
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pic_db = 0;
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pic_ovf = 0; /* clear state */
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pic_cnti = 0;
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pic_decr = 1;
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pic_rdp = pic_wdp = 0;
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CLR_INT (v_PIC); /* clear int */
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CLR_ENB (v_PIC); /* disable int */
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pic_arm = 0; /* disarm int */
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return SCPE_OK;
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}
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/* Line clock: IO routine */
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uint32 lfc (uint32 dev, uint32 op, uint32 dat)
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{
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switch (op) { /* case IO op */
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case IO_ADR: /* select */
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return BY; /* byte only */
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case IO_OC: /* command */
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lfc_arm = int_chg (v_LFC, dat, lfc_arm); /* upd int ctrl */
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break;
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}
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return 0;
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}
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/* Unit service */
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t_stat lfc_svc (UNIT *uptr)
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{
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lfc_poll = sim_rtcn_calb (lfc_tps, TMR_LFC); /* calibrate */
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sim_activate (uptr, lfc_poll); /* reactivate */
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if (lfc_arm) { /* armed? */
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SET_INT (v_LFC); /* req intr */
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}
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return SCPE_OK;
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}
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/* Clock coscheduling routine */
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int32 lfc_cosched (int32 wait)
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{
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int32 t;
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t = sim_activate_time (&lfc_unit);
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return (t? t - 1: wait);
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}
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/* Reset routine */
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t_stat lfc_reset (DEVICE *dptr)
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{
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lfc_poll = sim_rtcn_init (lfc_unit.wait, TMR_LFC);
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sim_activate (&lfc_unit, lfc_poll); /* init clock */
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CLR_INT (v_LFC); /* clear int */
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CLR_ENB (v_LFC); /* disable int */
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lfc_arm = 0; /* disarm int */
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return SCPE_OK;
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}
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/* Set frequency */
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t_stat lfc_set_freq (UNIT *uptr, int32 val, CONST char *cptr, void *desc)
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{
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if (cptr)
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return SCPE_ARG;
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if ((val != 100) && (val != 120))
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return SCPE_IERR;
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lfc_tps = val;
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return SCPE_OK;
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}
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/* Show frequency */
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t_stat lfc_show_freq (FILE *st, UNIT *uptr, int32 val, CONST void *desc)
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{
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fprintf (st, (lfc_tps == 100)? "50Hz": "60Hz");
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return SCPE_OK;
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}
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