691 lines
25 KiB
C
691 lines
25 KiB
C
/* vax_syscm.c: PDP-11 compatibility mode symbolic decode and parse
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Copyright (c) 1993-2012, Robert M Supnik
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Permission is hereby granted, free of charge, to any person obtaining a
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copy of this software and associated documentation files (the "Software"),
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to deal in the Software without restriction, including without limitation
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the rights to use, copy, modify, merge, publish, distribute, sublicense,
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and/or sell copies of the Software, and to permit persons to whom the
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Software is furnished to do so, subject to the following conditions:
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The above copyright notice and this permission notice shall be included in
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all copies or substantial portions of the Software.
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THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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ROBERT M SUPNIK BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
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IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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Except as contained in this notice, the name of Robert M Supnik shall not be
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used in advertising or otherwise to promote the sale, use or other dealings
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in this Software without prior written authorization from Robert M Supnik.
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29-Apr-12 RMS Fixed compiler warning (Mark Pizzolato)
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22-May-10 RMS Fixed t_addr printouts for 64b big-endian systems
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(Mark Pizzolato)
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12-Nov-06 RMS Fixed operand order in EIS instructions (W.F.J. Mueller)
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27-Sep-05 RMS Fixed warnings compiling with 64b addresses
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15-Sep-04 RMS Cloned from pdp11_sys.c
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*/
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#include "vax_defs.h"
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#include <ctype.h>
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extern UNIT cpu_unit;
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/* Symbol tables */
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/* Warning: for literals, the class number MUST equal the field width!! */
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#define I_V_CL 18 /* class bits */
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#define I_M_CL 017 /* class mask */
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#define I_V_NPN 0 /* no operands */
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#define I_V_REG 1 /* reg */
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#define I_V_SOP 2 /* operand */
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#define I_V_3B 3 /* 3b literal */
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#define I_V_RSOP 4 /* reg, operand */
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#define I_V_BR 5 /* cond branch */
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#define I_V_6B 6 /* 6b literal */
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#define I_V_SOB 7 /* reg, disp */
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#define I_V_8B 8 /* 8b literal */
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#define I_V_DOP 9 /* double operand */
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#define I_V_CCC 10 /* CC clear */
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#define I_V_CCS 11 /* CC set */
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#define I_V_SOPR 12 /* operand, reg */
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#define I_NPN (I_V_NPN << I_V_CL)
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#define I_REG (I_V_REG << I_V_CL)
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#define I_SOP (I_V_SOP << I_V_CL)
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#define I_3B (I_V_3B << I_V_CL)
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#define I_6B (I_V_6B << I_V_CL)
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#define I_BR (I_V_BR << I_V_CL)
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#define I_8B (I_V_8B << I_V_CL)
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#define I_RSOP (I_V_RSOP << I_V_CL)
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#define I_SOB (I_V_SOB << I_V_CL)
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#define I_DOP (I_V_DOP << I_V_CL)
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#define I_CCC (I_V_CCC << I_V_CL)
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#define I_CCS (I_V_CCS << I_V_CL)
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#define I_SOPR (I_V_SOPR << I_V_CL)
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static const int32 masks[] = {
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0177777, 0177770, 0177700, 0177770,
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0177000, 0177400, 0177700, 0177000,
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0177400, 0170000, 0177777, 0177777,
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0177000
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};
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static const char *opcode[] = {
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"HALT","WAIT","RTI","BPT",
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"IOT","RESET","RTT","MFPT",
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"JMP","RTS","SPL",
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"NOP","CLC","CLV","CLV CLC",
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"CLZ","CLZ CLC","CLZ CLV","CLZ CLV CLC",
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"CLN","CLN CLC","CLN CLV","CLN CLV CLC",
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"CLN CLZ","CLN CLZ CLC","CLN CLZ CLC","CCC",
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"NOP","SEC","SEV","SEV SEC",
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"SEZ","SEZ SEC","SEZ SEV","SEZ SEV SEC",
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"SEN","SEN SEC","SEN SEV","SEN SEV SEC",
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"SEN SEZ","SEN SEZ SEC","SEN SEZ SEC","SCC",
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"SWAB","BR","BNE","BEQ",
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"BGE","BLT","BGT","BLE",
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"JSR",
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"CLR","COM","INC","DEC",
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"NEG","ADC","SBC","TST",
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"ROR","ROL","ASR","ASL",
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"MARK","MFPI","MTPI","SXT",
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"CSM", "TSTSET","WRTLCK",
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"MOV","CMP","BIT","BIC",
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"BIS","ADD",
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"MUL","DIV","ASH","ASHC",
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"XOR",
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"FADD","FSUB","FMUL","FDIV",
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"L2DR",
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"MOVC","MOVRC","MOVTC",
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"LOCC","SKPC","SCANC","SPANC",
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"CMPC","MATC",
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"ADDN","SUBN","CMPN","CVTNL",
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"CVTPN","CVTNP","ASHN","CVTLN",
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"L3DR",
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"ADDP","SUBP","CMPP","CVTPL",
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"MULP","DIVP","ASHP","CVTLP",
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"MOVCI","MOVRCI","MOVTCI",
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"LOCCI","SKPCI","SCANCI","SPANCI",
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"CMPCI","MATCI",
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"ADDNI","SUBNI","CMPNI","CVTNLI",
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"CVTPNI","CVTNPI","ASHNI","CVTLNI",
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"ADDPI","SUBPI","CMPPI","CVTPLI",
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"MULPI","DIVPI","ASHPI","CVTLPI",
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"SOB",
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"BPL","BMI","BHI","BLOS",
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"BVC","BVS","BCC","BCS",
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"BHIS","BLO", /* encode only */
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"EMT","TRAP",
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"CLRB","COMB","INCB","DECB",
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"NEGB","ADCB","SBCB","TSTB",
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"RORB","ROLB","ASRB","ASLB",
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"MTPS","MFPD","MTPD","MFPS",
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"MOVB","CMPB","BITB","BICB",
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"BISB","SUB",
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NULL
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};
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static const int32 opc_val[] = {
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0000000+I_NPN, 0000001+I_NPN, 0000002+I_NPN, 0000003+I_NPN,
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0000004+I_NPN, 0000005+I_NPN, 0000006+I_NPN, 0000007+I_NPN,
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0000100+I_SOP, 0000200+I_REG, 0000230+I_3B,
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0000240+I_CCC, 0000241+I_CCC, 0000242+I_CCC, 0000243+I_NPN,
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0000244+I_CCC, 0000245+I_NPN, 0000246+I_NPN, 0000247+I_NPN,
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0000250+I_CCC, 0000251+I_NPN, 0000252+I_NPN, 0000253+I_NPN,
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0000254+I_NPN, 0000255+I_NPN, 0000256+I_NPN, 0000257+I_CCC,
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0000260+I_CCS, 0000261+I_CCS, 0000262+I_CCS, 0000263+I_NPN,
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0000264+I_CCS, 0000265+I_NPN, 0000266+I_NPN, 0000267+I_NPN,
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0000270+I_CCS, 0000271+I_NPN, 0000272+I_NPN, 0000273+I_NPN,
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0000274+I_NPN, 0000275+I_NPN, 0000276+I_NPN, 0000277+I_CCS,
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0000300+I_SOP, 0000400+I_BR, 0001000+I_BR, 0001400+I_BR,
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0002000+I_BR, 0002400+I_BR, 0003000+I_BR, 0003400+I_BR,
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0004000+I_RSOP,
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0005000+I_SOP, 0005100+I_SOP, 0005200+I_SOP, 0005300+I_SOP,
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0005400+I_SOP, 0005500+I_SOP, 0005600+I_SOP, 0005700+I_SOP,
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0006000+I_SOP, 0006100+I_SOP, 0006200+I_SOP, 0006300+I_SOP,
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0006400+I_6B, 0006500+I_SOP, 0006600+I_SOP, 0006700+I_SOP,
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0007000+I_SOP, 0007200+I_SOP, 0007300+I_SOP,
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0010000+I_DOP, 0020000+I_DOP, 0030000+I_DOP, 0040000+I_DOP,
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0050000+I_DOP, 0060000+I_DOP,
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0070000+I_SOPR, 0071000+I_SOPR, 0072000+I_SOPR, 0073000+I_SOPR,
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0074000+I_RSOP,
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0075000+I_REG, 0075010+I_REG, 0075020+I_REG, 0075030+I_REG,
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0076020+I_REG,
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0076030+I_NPN, 0076031+I_NPN, 0076032+I_NPN,
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0076040+I_NPN, 0076041+I_NPN, 0076042+I_NPN, 0076043+I_NPN,
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0076044+I_NPN, 0076045+I_NPN,
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0076050+I_NPN, 0076051+I_NPN, 0076052+I_NPN, 0076053+I_NPN,
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0076054+I_NPN, 0076055+I_NPN, 0076056+I_NPN, 0076057+I_NPN,
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0076060+I_REG,
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0076070+I_NPN, 0076071+I_NPN, 0076072+I_NPN, 0076073+I_NPN,
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0076074+I_NPN, 0076075+I_NPN, 0076076+I_NPN, 0076077+I_NPN,
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0076130+I_NPN, 0076131+I_NPN, 0076132+I_NPN,
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0076140+I_NPN, 0076141+I_NPN, 0076142+I_NPN, 0076143+I_NPN,
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0076144+I_NPN, 0076145+I_NPN,
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0076150+I_NPN, 0076151+I_NPN, 0076152+I_NPN, 0076153+I_NPN,
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0076154+I_NPN, 0076155+I_NPN, 0076156+I_NPN, 0076157+I_NPN,
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0076170+I_NPN, 0076171+I_NPN, 0076172+I_NPN, 0076173+I_NPN,
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0076174+I_NPN, 0076175+I_NPN, 0076176+I_NPN, 0076177+I_NPN,
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0077000+I_SOB,
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0100000+I_BR, 0100400+I_BR, 0101000+I_BR, 0101400+I_BR,
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0102000+I_BR, 0102400+I_BR, 0103000+I_BR, 0103400+I_BR,
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0103000+I_BR, 0103400+I_BR,
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0104000+I_8B, 0104400+I_8B,
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0105000+I_SOP, 0105100+I_SOP, 0105200+I_SOP, 0105300+I_SOP,
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0105400+I_SOP, 0105500+I_SOP, 0105600+I_SOP, 0105700+I_SOP,
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0106000+I_SOP, 0106100+I_SOP, 0106200+I_SOP, 0106300+I_SOP,
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0106400+I_SOP, 0106500+I_SOP, 0106600+I_SOP, 0106700+I_SOP,
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0110000+I_DOP, 0120000+I_DOP, 0130000+I_DOP, 0140000+I_DOP,
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0150000+I_DOP, 0160000+I_DOP,
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-1
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};
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static const char *rname [] = {
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"R0", "R1", "R2", "R3", "R4", "R5", "SP", "PC"
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};
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static const char r50_to_asc[] = " ABCDEFGHIJKLMNOPQRSTUVWXYZ$._0123456789";
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/* Specifier decode
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Inputs:
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*of = output stream
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addr = current PC
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spec = specifier
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nval = next word
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flag = TRUE if decoding for CPU
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iflag = TRUE if decoding integer instruction
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Outputs:
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count = -number of extra words retired
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*/
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int32 fprint_spec (FILE *of, t_addr addr, int32 spec, int32 nval)
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{
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int32 reg, mode;
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static const int32 rgwd[8] = { 0, 0, 0, 0, 0, 0, -1, -1 };
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static const int32 pcwd[8] = { 0, 0, -1, -1, 0, 0, -1, -1 };
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reg = spec & 07;
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mode = ((spec >> 3) & 07);
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switch (mode) {
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case 0:
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fprintf (of, "%s", rname[reg]);
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break;
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case 1:
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fprintf (of, "(%s)", rname[reg]);
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break;
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case 2:
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if (reg != 7)
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fprintf (of, "(%s)+", rname[reg]);
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else fprintf (of, "#%-X", nval);
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break;
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case 3:
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if (reg != 7)
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fprintf (of, "@(%s)+", rname[reg]);
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else fprintf (of, "@#%-X", nval);
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break;
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case 4:
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fprintf (of, "-(%s)", rname[reg]);
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break;
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case 5:
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fprintf (of, "@-(%s)", rname[reg]);
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break;
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case 6:
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if (reg != 7)
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fprintf (of, "%-X(%s)", nval, rname[reg]);
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else fprintf (of, "%-X", (int32)((nval + addr + 4) & 0177777));
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break;
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case 7:
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if (reg != 7)
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fprintf (of, "@%-X(%s)", nval, rname[reg]);
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else fprintf (of, "@%-X", (int32)((nval + addr + 4) & 0177777));
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break;
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} /* end case */
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return ((reg == 07)? pcwd[mode]: rgwd[mode]);
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}
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/* Symbolic decode
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Inputs:
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*of = output stream
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addr = current PC
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*val = values to decode
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*uptr = pointer to unit
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sw = switches
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Outputs:
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return = if >= 0, error code
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if < 0, number of extra words retired
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*/
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t_stat fprint_sym_cm (FILE *of, t_addr addr, t_value *bytes, int32 sw)
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{
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int32 i, j, c1, c2, c3, inst, srcm, srcr, dstm, dstr;
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int32 l8b, brdisp, wd1;
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uint32 val[3];
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for (i = j = 0; i < 3; i++, j = j + 2)
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val[i] = (int32) (bytes[j] | (bytes[j + 1] << 8));
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if (sw & SWMASK ('R')) { /* radix 50? */
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if (val[0] > 0174777) /* max value */
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return SCPE_ARG;
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c3 = val[0] % 050;
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c2 = (val[0] / 050) % 050;
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c1 = val[0] / (050 * 050);
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fprintf (of, "%c%c%c", r50_to_asc[c1],
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r50_to_asc[c2], r50_to_asc[c3]);
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return -1;
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}
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if (!(sw & SWMASK ('P')) || (addr & 1) || (addr > WMASK))
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return SCPE_ARG;
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inst = val[0]; /* inst */
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wd1 = 0;
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for (i = 0; opc_val[i] >= 0; i++) { /* loop thru ops */
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j = (opc_val[i] >> I_V_CL) & I_M_CL; /* get class */
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if ((opc_val[i] & 0177777) == (inst & masks[j])) { /* match? */
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srcm = (inst >> 6) & 077; /* opr fields */
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srcr = srcm & 07;
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dstm = inst & 077;
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dstr = dstm & 07;
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l8b = inst & 0377;
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switch (j) { /* case on class */
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case I_V_NPN: case I_V_CCC: case I_V_CCS: /* no operands */
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fprintf (of, "%s", opcode[i]);
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break;
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case I_V_REG: /* reg */
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fprintf (of, "%s %-s", opcode[i], rname[dstr]);
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break;
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case I_V_SOP: /* sop */
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fprintf (of, "%s ", opcode[i]);
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wd1 = fprint_spec (of, addr, dstm, val[1]);
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break;
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case I_V_3B: /* 3b */
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fprintf (of, "%s %-X", opcode[i], dstr);
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break;
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case I_V_6B: /* 6b */
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fprintf (of, "%s %-X", opcode[i], dstm);
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break;
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case I_V_BR: /* cond branch */
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fprintf (of, "%s ", opcode[i]);
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brdisp = (l8b + l8b + ((l8b & 0200)? 0177002: 2)) & 0177777;
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fprintf (of, "%-X", (int32)((addr + brdisp) & 0177777));
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break;
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case I_V_8B: /* 8b */
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fprintf (of, "%s %-X", opcode[i], l8b);
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break;
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case I_V_SOB: /* sob */
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fprintf (of, "%s %s,", opcode[i], rname[srcr]);
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brdisp = (dstm * 2) - 2;
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fprintf (of, "%-X", (int32)((addr - brdisp) & 0177777));
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break;
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case I_V_RSOP: /* rsop */
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fprintf (of, "%s %s,", opcode[i], rname[srcr]);
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wd1 = fprint_spec (of, addr, dstm, val[1]);
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break;
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case I_V_SOPR: /* sopr */
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fprintf (of, "%s ", opcode[i]);
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wd1 = fprint_spec (of, addr, dstm, val[1]);
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fprintf (of, ",%s", rname[srcr]);
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break;
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case I_V_DOP: /* dop */
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fprintf (of, "%s ", opcode[i]);
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wd1 = fprint_spec (of, addr, srcm, val[1]);
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fprintf (of, ",");
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wd1 += fprint_spec (of, addr - wd1 - wd1, dstm,
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val[1 - wd1]);
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break;
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} /* end case */
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return ((wd1 * 2) - 1);
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} /* end if */
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} /* end for */
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return SCPE_ARG; /* no match */
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}
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#define A_PND 100 /* # seen */
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#define A_MIN 040 /* -( seen */
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#define A_PAR 020 /* (Rn) seen */
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#define A_REG 010 /* Rn seen */
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#define A_PLS 004 /* + seen */
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#define A_NUM 002 /* number seen */
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#define A_REL 001 /* relative addr seen */
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/* Register number
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Inputs:
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*cptr = pointer to input string
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mchar = character to match after register name
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Outputs:
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rnum = 0..7 if a legitimate register
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< 0 if error
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*/
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int32 get_reg (char *cptr, char mchar)
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{
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int32 i;
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if (*(cptr + 2) != mchar)
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return -1;
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for (i = 0; i < 8; i++) {
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if (strncmp (cptr, rname[i], 2) == 0)
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return i;
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}
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return -1;
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}
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/* Number or memory address
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Inputs:
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*cptr = pointer to input string
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*dptr = pointer to output displacement
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*pflag = pointer to accumulating flags
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Outputs:
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cptr = pointer to next character in input string
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NULL if parsing error
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Flags: 0 (no result), A_NUM (number), A_REL (relative)
|
|
*/
|
|
|
|
char *get_addr (char *cptr, int32 *dptr, int32 *pflag)
|
|
{
|
|
int32 val, minus;
|
|
char *tptr;
|
|
|
|
minus = 0;
|
|
|
|
if (*cptr == '.') { /* relative? */
|
|
*pflag = *pflag | A_REL;
|
|
cptr++;
|
|
}
|
|
if (*cptr == '+') { /* +? */
|
|
*pflag = *pflag | A_NUM;
|
|
cptr++;
|
|
}
|
|
if (*cptr == '-') { /* -? */
|
|
*pflag = *pflag | A_NUM;
|
|
minus = 1;
|
|
cptr++;
|
|
}
|
|
errno = 0;
|
|
val = strtoul (cptr, &tptr, 16);
|
|
if (cptr == tptr) { /* no number? */
|
|
if (*pflag == (A_REL + A_NUM)) /* .+, .-? */
|
|
return NULL;
|
|
*dptr = 0;
|
|
return cptr;
|
|
}
|
|
if (errno || (*pflag == A_REL)) /* .n? */
|
|
return NULL;
|
|
*dptr = (minus? -val: val) & 0177777;
|
|
*pflag = *pflag | A_NUM;
|
|
return tptr;
|
|
}
|
|
|
|
/* Specifier decode
|
|
|
|
Inputs:
|
|
*cptr = pointer to input string
|
|
addr = current PC
|
|
n1 = 0 if no extra word used
|
|
-1 if extra word used in prior decode
|
|
*sptr = pointer to output specifier
|
|
*dptr = pointer to output displacement
|
|
Outputs:
|
|
status = = -1 extra word decoded
|
|
= 0 ok
|
|
= +1 error
|
|
*/
|
|
|
|
t_stat get_spec (char *cptr, int32 addr, int32 n1, int32 *sptr, int32 *dptr)
|
|
{
|
|
int32 reg, indir, pflag, disp;
|
|
|
|
indir = 0; /* no indirect */
|
|
pflag = 0;
|
|
|
|
if (*cptr == '@') { /* indirect? */
|
|
indir = 010;
|
|
cptr++;
|
|
}
|
|
if (*cptr == '#') { /* literal? */
|
|
pflag = pflag | A_PND;
|
|
cptr++;
|
|
}
|
|
if (strncmp (cptr, "-(", 2) == 0) { /* autodecrement? */
|
|
pflag = pflag | A_MIN;
|
|
cptr++;
|
|
}
|
|
else if ((cptr = get_addr (cptr, &disp, &pflag)) == NULL)
|
|
return 1;
|
|
if (*cptr == '(') { /* register index? */
|
|
pflag = pflag | A_PAR;
|
|
if ((reg = get_reg (cptr + 1, ')')) < 0)
|
|
return 1;
|
|
cptr = cptr + 4;
|
|
if (*cptr == '+') { /* autoincrement? */
|
|
pflag = pflag | A_PLS;
|
|
cptr++;
|
|
}
|
|
}
|
|
else if ((reg = get_reg (cptr, 0)) >= 0) {
|
|
pflag = pflag | A_REG;
|
|
cptr = cptr + 2;
|
|
}
|
|
if (*cptr != 0) /* all done? */
|
|
return 1;
|
|
|
|
switch (pflag) { /* case on syntax */
|
|
|
|
case A_REG: /* Rn, @Rn */
|
|
*sptr = indir + reg;
|
|
return 0;
|
|
|
|
case A_PAR: /* (Rn), @(Rn) */
|
|
if (indir) { /* @(Rn) = @0(Rn) */
|
|
*sptr = 070 + reg;
|
|
*dptr = 0;
|
|
return -1;
|
|
}
|
|
else *sptr = 010 + reg;
|
|
return 0;
|
|
|
|
case A_PAR+A_PLS: /* (Rn)+, @(Rn)+ */
|
|
*sptr = 020 + indir + reg;
|
|
return 0;
|
|
|
|
case A_MIN+A_PAR: /* -(Rn), @-(Rn) */
|
|
*sptr = 040 + indir + reg;
|
|
return 0;
|
|
|
|
case A_NUM+A_PAR: /* d(Rn), @d(Rn) */
|
|
*sptr = 060 + indir + reg;
|
|
*dptr = disp;
|
|
return -1;
|
|
|
|
case A_PND+A_REL: case A_PND+A_REL+A_NUM: /* #.+n, @#.+n */
|
|
disp = (disp + addr) & 0177777; /* fall through */
|
|
case A_PND+A_NUM: /* #n, @#n */
|
|
*sptr = 027 + indir;
|
|
*dptr = disp;
|
|
return -1;
|
|
|
|
case A_REL: case A_REL+A_NUM: /* .+n, @.+n */
|
|
*sptr = 067 + indir;
|
|
*dptr = (disp - 4 + (2 * n1)) & 0177777;
|
|
return -1;
|
|
|
|
case A_NUM: /* n, @n */
|
|
*sptr = 067 + indir;
|
|
*dptr = (disp - addr - 4 + (2 * n1)) & 0177777;
|
|
return -1;
|
|
|
|
default:
|
|
return 1;
|
|
} /* end case */
|
|
}
|
|
|
|
/* Symbolic input
|
|
|
|
Inputs:
|
|
*cptr = pointer to input string
|
|
addr = current PC
|
|
*uptr = pointer to unit
|
|
*val = pointer to output values
|
|
sw = switches
|
|
Outputs:
|
|
status = > 0 error code
|
|
<= 0 -number of extra words
|
|
*/
|
|
|
|
t_stat parse_sym_cm (char *cptr, t_addr addr, t_value *bytes, int32 sw)
|
|
{
|
|
int32 d, i, j, reg, spec, n1, n2, disp, pflag;
|
|
int32 val[3];
|
|
int32 ad32 = (int32) addr;
|
|
t_stat r;
|
|
char *tptr, gbuf[CBUFSIZE];
|
|
|
|
if (sw & SWMASK ('R')) /* radix 50 */
|
|
return SCPE_ARG;
|
|
if (!(sw & SWMASK ('P')) || (ad32 & 1) || (ad32 > WMASK))
|
|
return SCPE_ARG;
|
|
|
|
cptr = get_glyph (cptr, gbuf, 0); /* get opcode */
|
|
n1 = n2 = pflag = 0;
|
|
for (i = 0; (opcode[i] != NULL) && (strcmp (opcode[i], gbuf) != 0) ; i++) ;
|
|
if (opcode[i] == NULL)
|
|
return SCPE_ARG;
|
|
val[0] = opc_val[i] & 0177777; /* get value */
|
|
j = (opc_val[i] >> I_V_CL) & I_M_CL; /* get class */
|
|
|
|
switch (j) { /* case on class */
|
|
|
|
case I_V_NPN: /* no operand */
|
|
break;
|
|
|
|
case I_V_REG: /* register */
|
|
cptr = get_glyph (cptr, gbuf, 0); /* get glyph */
|
|
if ((reg = get_reg (gbuf, 0)) < 0)
|
|
return SCPE_ARG;
|
|
val[0] = val[0] | reg;
|
|
break;
|
|
|
|
case I_V_3B: case I_V_6B: case I_V_8B: /* xb literal */
|
|
cptr = get_glyph (cptr, gbuf, 0); /* get literal */
|
|
d = (int32) get_uint (gbuf, 16, (1 << j) - 1, &r);
|
|
if (r != SCPE_OK)
|
|
return SCPE_ARG;
|
|
val[0] = val[0] | d; /* put in place */
|
|
break;
|
|
|
|
case I_V_BR: /* cond br */
|
|
cptr = get_glyph (cptr, gbuf, 0); /* get address */
|
|
tptr = get_addr (gbuf, &disp, &pflag); /* parse */
|
|
if ((tptr == NULL) || (*tptr != 0))
|
|
return SCPE_ARG;
|
|
if ((pflag & A_REL) == 0)
|
|
disp = (disp - ad32) & 0177777;
|
|
if ((disp & 1) || ((disp > 0400) && (disp < 0177402)))
|
|
return SCPE_ARG;
|
|
val[0] = val[0] | (((disp - 2) >> 1) & 0377);
|
|
break;
|
|
|
|
case I_V_SOB: /* sob */
|
|
cptr = get_glyph (cptr, gbuf, ','); /* get glyph */
|
|
if ((reg = get_reg (gbuf, 0)) < 0)
|
|
return SCPE_ARG;
|
|
val[0] = val[0] | (reg << 6);
|
|
cptr = get_glyph (cptr, gbuf, 0); /* get address */
|
|
tptr = get_addr (gbuf, &disp, &pflag); /* parse */
|
|
if ((tptr == NULL) || (*tptr != 0))
|
|
return SCPE_ARG;
|
|
if ((pflag & A_REL) == 0)
|
|
disp = (disp - ad32) & 0177777;
|
|
if ((disp & 1) || ((disp > 2) && (disp < 0177604)))
|
|
return SCPE_ARG;
|
|
val[0] = val[0] | (((2 - disp) >> 1) & 077);
|
|
break;
|
|
|
|
case I_V_RSOP: /* reg, sop */
|
|
cptr = get_glyph (cptr, gbuf, ','); /* get glyph */
|
|
if ((reg = get_reg (gbuf, 0)) < 0)
|
|
return SCPE_ARG;
|
|
val[0] = val[0] | (reg << 6); /* fall through */
|
|
case I_V_SOP: /* sop */
|
|
cptr = get_glyph (cptr, gbuf, 0); /* get glyph */
|
|
if ((n1 = get_spec (gbuf, ad32, 0, &spec, &val[1])) > 0)
|
|
return SCPE_ARG;
|
|
val[0] = val[0] | spec;
|
|
break;
|
|
|
|
case I_V_SOPR: /* dop, reg */
|
|
cptr = get_glyph (cptr, gbuf, ','); /* get glyph */
|
|
if ((n1 = get_spec (gbuf, ad32, 0, &spec, &val[1])) > 0)
|
|
return SCPE_ARG;
|
|
val[0] = val[0] | spec;
|
|
cptr = get_glyph (cptr, gbuf, 0); /* get glyph */
|
|
if ((reg = get_reg (gbuf, 0)) < 0)
|
|
return SCPE_ARG;
|
|
val[0] = val[0] | (reg << 6);
|
|
break;
|
|
|
|
case I_V_DOP: /* double op */
|
|
cptr = get_glyph (cptr, gbuf, ','); /* get glyph */
|
|
if ((n1 = get_spec (gbuf, ad32, 0, &spec, &val[1])) > 0)
|
|
return SCPE_ARG;
|
|
val[0] = val[0] | (spec << 6);
|
|
cptr = get_glyph (cptr, gbuf, 0); /* get glyph */
|
|
if ((n2 = get_spec (gbuf, ad32, n1, &spec, &val[1 - n1])) > 0)
|
|
return SCPE_ARG;
|
|
val[0] = val[0] | spec;
|
|
break;
|
|
|
|
case I_V_CCC: case I_V_CCS: /* cond code oper */
|
|
for (cptr = get_glyph (cptr, gbuf, 0); gbuf[0] != 0;
|
|
cptr = get_glyph (cptr, gbuf, 0)) {
|
|
for (i = 0; (opcode[i] != NULL) &&
|
|
(strcmp (opcode[i], gbuf) != 0) ; i++) ;
|
|
if ((((opc_val[i] >> I_V_CL) & I_M_CL) != j) ||
|
|
(opcode[i] == NULL))
|
|
return SCPE_ARG;
|
|
val[0] = val[0] | (opc_val[i] & 0177777);
|
|
}
|
|
break;
|
|
|
|
default:
|
|
return SCPE_ARG;
|
|
}
|
|
|
|
if (*cptr != 0) return SCPE_ARG; /* junk at end? */
|
|
for (i = j = 0; i < 3; i++, j = j + 2) {
|
|
bytes[j] = val[i] & BMASK;
|
|
bytes[j + 1] = (val[i] >> 8) & BMASK;
|
|
}
|
|
return ((2 * (n1 + n2)) - 1);
|
|
}
|