549 lines
24 KiB
C
549 lines
24 KiB
C
/* b5500_defs.h: Burroughs 5500 simulator definitions
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Copyright (c) 2016, Richard Cornwell
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Permission is hereby granted, free of charge, to any person obtaining a
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copy of this software and associated documentation files (the "Software"),
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to deal in the Software without restriction, including without limitation
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the rights to use, copy, modify, merge, publish, distribute, sublicense,
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and/or sell copies of the Software, and to permit persons to whom the
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Software is furnished to do so, subject to the following conditions:
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The above copyright notice and this permission notice shall be included in
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all copies or substantial portions of the Software.
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THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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RICHARD CORNWELL BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
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IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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*/
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#ifndef _B5500_H_
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#define _B5500_H_
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#include "sim_defs.h" /* simulator defns */
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/* Definitions for each supported CPU */
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#define NUM_DEVS_CDR 2
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#define NUM_DEVS_CDP 1
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#define NUM_DEVS_LPR 2
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#define NUM_DEVS_CON 1
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#define NUM_DEVS_DR 2
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#define NUM_DEVS_MT 16
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#define NUM_DEVS_DSK 2
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#define NUM_DEVS_DTC 1
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#define NUM_CHAN 4
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#define MAXMEMSIZE 32768
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#define CHARSPERWORD 8
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extern t_uint64 M[]; /* Main Memory */
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extern uint16 IAR; /* Interrupt pending register */
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extern uint32 iostatus; /* Active device status register */
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extern uint8 loading; /* System booting flag */
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/* Memory */
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#define MEMSIZE (cpu_unit[0].capac) /* actual memory size */
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#define MEMMASK (MEMSIZE - 1) /* Memory bits */
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/* Debuging controls */
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#define DEBUG_CHAN 0x0000001 /* Show channel fetchs */
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#define DEBUG_CMD 0x0000004 /* Show device commands */
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#define DEBUG_DATA 0x0000008 /* Show data transfers */
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#define DEBUG_DETAIL 0x0000010 /* Show details */
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#define DEBUG_EXP 0x0000020 /* Show error conditions */
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extern DEBTAB dev_debug[];
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/* Returns from device commands */
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#define SCPE_BUSY (1) /* Device is active */
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#define SCPE_NODEV (2) /* No device exists */
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/* Symbol tables */
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typedef struct _opcode
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{
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uint16 op;
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uint8 type;
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const char *name;
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}
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t_opcode;
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void print_opcode(FILE * ofile, uint16 val, int chr_mode);
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t_stat chan_reset(DEVICE *);
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t_stat chan_boot(t_uint64);
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int find_chan();
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void chan_release(int);
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void start_io();
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void chan_set_end(int) ;
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void chan_set_parity(int) ;
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void chan_set_eof(int) ;
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void chan_set_read(int) ;
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void chan_set_wcflg(int) ;
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void chan_set_gm(int) ;
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void chan_set_error(int) ;
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void chan_set_notrdy(int) ;
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void chan_set_bot(int) ;
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void chan_set_eot(int) ;
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void chan_set_wrp(int) ;
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void chan_set_blank(int) ;
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void chan_set_wc(int, uint16);
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int chan_write_char(int, uint8 *, int) ;
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int chan_read_char(int, uint8 *, int) ;
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int chan_read_disk(int, uint8 *, int) ;
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int chan_write_drum(int, uint8 *, int) ;
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int chan_read_drum(int, uint8 *, int) ;
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extern uint8 parity_table[64];
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extern uint8 mem_to_ascii[64];
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extern const char con_to_ascii[64];
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extern const char ascii_to_con[128];
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extern t_stat fprint_sym(FILE *, t_addr, t_value *, UNIT *, int32);
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extern int32 tmxr_poll;
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/* Generic devices common to all */
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extern DEVICE cpu_dev;
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extern UNIT cpu_unit[];
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extern REG cpu_reg[];
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extern DEVICE chan_dev;
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/* Global device definitions */
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#if (NUM_DEVS_CDR > 0) | (NUM_DEVS_CDP > 0)
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extern DEVICE cdr_dev;
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extern t_stat card_cmd(uint16, uint16, uint8, uint16 *);
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#endif
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#if (NUM_DEVS_CDP > 0)
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extern DEVICE cdp_dev;
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#endif
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#if (NUM_DEVS_LPR > 0)
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extern DEVICE lpr_dev;
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extern t_stat lpr_cmd(uint16, uint16, uint8, uint16 *);
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#endif
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#if (NUM_DEVS_CON > 0)
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extern DEVICE con_dev;
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extern t_stat con_cmd(uint16, uint16, uint8, uint16 *);
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#endif
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#if (NUM_DEVS_DTC > 0)
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extern DEVICE dtc_dev;
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extern t_stat dtc_cmd(uint16, uint16, uint8, uint16 *);
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#endif
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#if (NUM_DEVS_DR > 0)
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extern DEVICE drm_dev;
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extern t_stat drm_cmd(uint16, uint16, uint8, uint16 *, uint8);
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#endif
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#if (NUM_DEVS_DSK > 0)
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extern DEVICE dsk_dev;
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extern t_stat dsk_cmd(uint16, uint16, uint8, uint16 *);
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extern DEVICE esu_dev;
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#endif
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#if (NUM_DEVS_MT > 0)
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extern DEVICE mt_dev;
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extern t_stat mt_cmd(uint16, uint16, uint8, uint16 *);
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#endif /* NUM_DEVS_MT */
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/* Character codes */
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#define CHR_ABLANK 000
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#define CHR_MARK CHR_ABLANK
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#define CHR_1 001
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#define CHR_2 002
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#define CHR_3 003
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#define CHR_4 004
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#define CHR_5 005
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#define CHR_6 006
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#define CHR_7 007
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#define CHR_8 010
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#define CHR_9 011
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#define CHR_0 012
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#define CHR_EQ 013
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#define CHR_QUOT 014 /* Also @ */
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#define CHR_COL 015
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#define CHR_GT 016
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#define CHR_TRM 017
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#define CHR_BLANK 020
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#define CHR_SLSH 021
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#define CHR_S 022
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#define CHR_T 023
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#define CHR_U 024
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#define CHR_V 025
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#define CHR_W 026
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#define CHR_X 027
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#define CHR_Y 030
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#define CHR_Z 031
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#define CHR_RM 032
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#define CHR_COM 033
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#define CHR_RPARN 034 /* Also % */
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#define CHR_WM 035
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#define CHR_BSLSH 036
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#define CHR_UND 037
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#define CHR_MINUS 040
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#define CHR_J 041
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#define CHR_K 042
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#define CHR_L 043
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#define CHR_M 044
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#define CHR_N 045
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#define CHR_O 046
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#define CHR_P 047
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#define CHR_Q 050
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#define CHR_R 051
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#define CHR_EXPL 052
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#define CHR_DOL 053
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#define CHR_STAR 054
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#define CHR_LBRK 055
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#define CHR_SEMI 056
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#define CHR_CART 057
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#define CHR_PLUS 060
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#define CHR_A 061
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#define CHR_B 062
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#define CHR_C 063
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#define CHR_D 064
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#define CHR_E 065
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#define CHR_F 066
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#define CHR_G 067
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#define CHR_H 070
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#define CHR_I 071
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#define CHR_QUEST 072
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#define CHR_DOT 073
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#define CHR_LPARN 074 /* Also Square */
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#define CHR_RBRAK 075
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#define CHR_LESS 076
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#define CHR_GM 077
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/* Word mode opcodes */
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#define WMOP_LITC 00000 /* Load literal */
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#define WMOP_OPDC 00002 /* Load operand */
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#define WMOP_DESC 00003 /* Load Descriptor */
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#define WMOP_OPR 00001 /* Operator */
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#define WMOP_DEL 00065 /* Delete top of stack */
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#define WMOP_NOP 00055 /* Nop operation */
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#define WMOP_XRT 00061 /* Set Variant */
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#define WMOP_ADD 00101 /* Add */
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#define WMOP_DLA 00105 /* Double Precision Add */
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#define WMOP_PRL 00111 /* Program Release */
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#define WMOP_LNG 00115 /* Logical Negate */
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#define WMOP_CID 00121 /* Conditional Integer Store Destructive */
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#define WMOP_GEQ 00125 /* WMOP_B greater than or equal to A */
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#define WMOP_BBC 00131 /* Branch Backward Conditional */
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#define WMOP_BRT 00135 /* Branch Return */
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#define WMOP_INX 00141 /* Index */
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#define WMOP_ITI 00211 /* Interrogate interrupt */
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#define WMOP_LOR 00215 /* Logical Or */
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#define WMOP_CIN 00221 /* Conditional Integer Store non-destructive */
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#define WMOP_GTR 00225 /* B Greater than A */
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#define WMOP_BFC 00231 /* Branch Forward Conditional */
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#define WMOP_RTN 00235 /* Return normal */
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#define WMOP_COC 00241 /* Construct Operand Call */
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#define WMOP_SUB 00301 /* Subtract */
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#define WMOP_DLS 00305 /* WMOP_Double Precision Subtract */
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#define WMOP_MUL 00401 /* Multiply */
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#define WMOP_DLM 00405 /* Double Precision Multiply */
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#define WMOP_RTR 00411 /* Read Timer */
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#define WMOP_LND 00415 /* Logical And */
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#define WMOP_STD 00421 /* B Store Destructive */
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#define WMOP_NEQ 00425 /* B Not equal to A */
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#define WMOP_SSN 00431 /* Set Sign Bit */
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#define WMOP_XIT 00435 /* Exit */
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#define WMOP_MKS 00441 /* Mark Stack */
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#define WMOP_DIV 01001 /* Divide */
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#define WMOP_DLD 01005 /* Double Precision Divide */
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#define WMOP_COM 01011 /* Communication operator */
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#define WMOP_LQV 01015 /* Logical Equivalence */
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#define WMOP_SND 01021 /* B Store Non-destructive */
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#define WMOP_XCH 01025 /* Exchange */
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#define WMOP_CHS 01031 /* Change sign bit */
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#define WMOP_RTS 01235 /* Return Special */
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#define WMOP_CDC 01241 /* Construct descriptor call */
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#define WMOP_FTC 01425 /* Transfer F Field to Core Field */
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#define WMOP_MOP 02015 /* Reset Flag bit */
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#define WMOP_LOD 02021 /* Load */
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#define WMOP_DUP 02025 /* Duplicate */
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#define WMOP_TOP 02031 /* Test Flag Bit */
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#define WMOP_IOR 02111 /* I/O Release */
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#define WMOP_LBC 02131 /* Word Branch Backward Conditional */
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#define WMOP_SSF 02141 /* Set or Store S or F registers */
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#define WMOP_HP2 02211 /* Halt P2 */
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#define WMOP_LFC 02231 /* Word Branch Forward Conditional */
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#define WMOP_ZP1 02411 /* Conditional Halt */
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#define WMOP_TUS 02431 /* Interrogate Peripheral Status */
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#define WMOP_LLL 02541 /* Link List Look-up */
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#define WMOP_IDV 03001 /* Integer Divide Integer */
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#define WMOP_SFI 03011 /* Store for Interrupt */
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#define WMOP_SFT 03411 /* Store for Test */
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#define WMOP_FTF 03425 /* Transfer F Field to F Field */
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#define WMOP_MDS 04015 /* Set Flag Bit */
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#define WMOP_IP1 04111 /* Initiate P1 */
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#define WMOP_ISD 04121 /* Interger Store Destructive */
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#define WMOP_LEQ 04125 /* B Less Than or Equal to A */
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#define WMOP_BBW 04131 /* Banch Backward Conditional */
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#define WMOP_IP2 04211 /* Initiate P2 */
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#define WMOP_ISN 04221 /* Integer Store Non-Destructive */
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#define WMOP_LSS 04225 /* B Less Than A */
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#define WMOP_BFW 04231 /* Branch Forward Unconditional */
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#define WMOP_IIO 04411 /* Initiate I/O */
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#define WMOP_EQL 04425 /* B Equal A */
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#define WMOP_SSP 04431 /* Reset Sign Bit */
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#define WMOP_CMN 04441 /* Enter Character Mode In Line */
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#define WMOP_IFT 05111 /* Test Initiate */
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#define WMOP_CTC 05425 /* Transfer Core Field to Core Field */
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#define WMOP_LBU 06131 /* Word Branch Backward Unconditional */
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#define WMOP_LFU 06231 /* Word Branch Forward Unconditional */
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#define WMOP_TIO 06431 /* Interrogate I/O Channels */
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#define WMOP_RDV 07001 /* Remainder Divide */
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#define WMOP_FBS 07031 /* Flag Bit Search */
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#define WMOP_CTF 07425 /* Transfer Core Field to F Field */
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#define WMOP_ISO 00045 /* Variable Field Isolate XX */
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#define WMOP_CBD 00351 /* Non-Zero Field Branch Backward Destructive Xy */
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#define WMOP_CBN 00151 /* Non-Zero Field Branch Backward Non-Destructive Xy */
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#define WMOP_CFD 00251 /* Non-Zero Field Branch Forward Destructive Xy */
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#define WMOP_CFN 00051 /* Non-Zero Field Branch Forward Non-Destructive Xy */
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#define WMOP_DIA 00055 /* Dial A XX */
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#define WMOP_DIB 00061 /* Dial B XX Upper 6 not Zero */
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#define WMOP_TRB 00065 /* Transfer Bits XX */
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#define WMOP_FCL 00071 /* Compare Field Low XX */
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#define WMOP_FCE 00075 /* Compare Field Equal XX */
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/* Character Mode */
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#define CMOP_EXC 00000 /* CMOP_Exit Character Mode */
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#define CMOP_CMX 00100 /* Exit Character Mode In Line */
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#define CMOP_BSD 00002 /* Skip Bit Destiniation */
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#define CMOP_BSS 00003 /* SKip Bit Source */
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#define CMOP_RDA 00004 /* Recall Destination Address */
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#define CMOP_TRW 00005 /* Transfer Words */
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#define CMOP_SED 00006 /* Set Destination Address */
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#define CMOP_TDA 00007 /* Transfer Destination Address */
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#define CMOP_TBN 00012 /* Transfer Blanks for Non-Numerics */
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#define CMOP_SDA 00014 /* Store Destination Address */
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#define CMOP_SSA 00015 /* Store Source Address */
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#define CMOP_SFD 00016 /* Skip Forward Destination */
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#define CMOP_SRD 00017 /* Skip Reverse Destination */
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#define CMOP_SES 00022 /* Set Source Address */
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#define CMOP_TEQ 00024 /* Test for Equal */
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#define CMOP_TNE 00025 /* Test for Not-Equal */
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#define CMOP_TEG 00026 /* Test for Greater Or Equal */
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#define CMOP_TGR 00027 /* Test For Greater */
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#define CMOP_SRS 00030 /* Skip Reverse Source */
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#define CMOP_SFS 00031 /* Skip Forward Source */
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#define CMOP_TEL 00034 /* Test For Equal or Less */
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#define CMOP_TLS 00035 /* Test For Less */
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#define CMOP_TAN 00036 /* Test for Alphanumeric */
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#define CMOP_BIT 00037 /* Test Bit */
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#define CMOP_INC 00040 /* Increase Tally */
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#define CMOP_STC 00041 /* Store Tally */
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#define CMOP_SEC 00042 /* Set Tally */
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#define CMOP_CRF 00043 /* Call repeat Field */
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#define CMOP_JNC 00044 /* Jump Out Of Loop Conditional */
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#define CMOP_JFC 00045 /* Jump Forward Conditional */
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#define CMOP_JNS 00046 /* Jump out of loop unconditional */
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#define CMOP_JFW 00047 /* Jump Forward Unconditional */
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#define CMOP_RCA 00050 /* Recall Control Address */
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#define CMOP_ENS 00051 /* End Loop */
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#define CMOP_BNS 00052 /* Begin Loop */
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#define CMOP_RSA 00053 /* Recall Source Address */
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#define CMOP_SCA 00054 /* Store Control Address */
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#define CMOP_JRC 00055 /* Jump Reverse Conditional */
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#define CMOP_TSA 00056 /* Transfer Source Address */
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#define CMOP_JRV 00057 /* Jump Reverse Unconditional */
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#define CMOP_CEQ 00060 /* Compare Equal */
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#define CMOP_CNE 00061 /* COmpare for Not Equal */
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#define CMOP_CEG 00062 /* Compare For Greater Or Equal */
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#define CMOP_CGR 00063 /* Compare For Greater */
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#define CMOP_BIS 00064 /* Set Bit */
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#define CMOP_BIR 00065 /* Reet Bit */
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#define CMOP_OCV 00066 /* Output Convert */
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#define CMOP_ICV 00067 /* Input Convert */
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#define CMOP_CEL 00070 /* Compare For Equal or Less */
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#define CMOP_CLS 00071 /* Compare for Less */
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#define CMOP_FSU 00072 /* Field Subtract */
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#define CMOP_FAD 00073 /* Field Add */
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#define CMOP_TRP 00074 /* Transfer Program Characters */
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#define CMOP_TRN 00075 /* Transfer Numeric */
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#define CMOP_TRZ 00076 /* Transfer Zones */
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#define CMOP_TRS 00077 /* Transfer Source Characters */
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/* Error codes for Q */ /* P1 P2 */
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#define MEM_PARITY 00001 /* 060 040 */
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#define INVALID_ADDR 00002 /* 061 041 */
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#define STK_OVERFL 00004 /* 062 042 */
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#define COM_OPR 00040 /* 064 +00 044 */
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#define PROG_REL 00050 /* 065 +01 045 */
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#define CONT_BIT 00060 /* 066 +02 046 */
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#define PRES_BIT 00070 /* 067 +03 047 */
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#define FLAG_BIT 00100 /* 070 +04 050 */
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#define INDEX_ERROR 00110 /* 071 +05 051 */
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#define EXPO_UNDER 00120 /* 072 +06 052 */
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#define EXPO_OVER 00130 /* 073 +07 053 */
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#define INT_OVER 00140 /* 074 +10 054 */
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#define DIV_ZERO 00150 /* 075 +11 055 */
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/* Addresses for Interrupts */
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#define INTER_TIME 022
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#define IO_BUSY 023
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#define KEY_REQ 024
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#define PRT1_FINISH 025
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#define PRT2_FINISH 026
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#define IO1_FINISH 027
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#define IO2_FINISH 030
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#define IO3_FINISH 031
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#define IO4_FINISH 032
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#define INQ_REQ 033
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#define SPEC_IRQ1 035
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#define DSK1_RDCHK 036
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#define DSK2_RDCHK 037
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#define PARITY_ERR 060
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#define INVADR_ERR 061
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#define STK_OVR_LOC 062
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#define COM_OPR_LOC 064
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#define PROG_REL_LOC 065
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#define CONT_BIT_LOC 066
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#define PRES_BIT_LOC 067
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#define FLAG_BIT_LOC 070
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#define INDEX_BIT_LOC 071
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#define EXP_UND_LOC 072
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#define EXP_OVR_LOC 073
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#define INT_OVR_LOC 074
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#define DIV_ZER_LOC 075
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#define PARITY_ERR2 040
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#define INVADR_ERR2 041
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#define STK_OVR_LOC2 042
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#define COM_OPR_LOC2 044
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#define PROG_REL_LOC2 045
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#define CONT_BIT_LOC2 046
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#define PRES_BIT_LOC2 047
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#define FLAG_BIT_LOC2 050
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#define INDEX_BIT_LOC2 051
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#define EXP_UND_LOC2 052
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#define EXP_OVR_LOC2 053
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#define INT_OVR_LOC2 054
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#define DIV_ZER_LOC2 055
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/* IAR BITS */
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#define IAR6 040 /* Set if IRQ from Q */
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#define IAR5 020 /* Set if IRQ from P1 */
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#define IAR4 010 /* Q bit 3 */
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#define IAR3 004 /* Q bit 4 */
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#define IAR2 002 /* Q bit 5 */
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#define IAR1 001 /* Q bit 6 or Q bit 2 */
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#define IAR0 000 /* Q bit 7 or Q bit 1 */
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#define IRQ_0 000001 /* Interval Timer */
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#define IRQ_1 000002 /* I/O Busy */
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#define IRQ_2 000004 /* Keyboard Request */
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#define IRQ_3 000010 /* Printer 1 Finished */
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#define IRQ_4 000020 /* Printer 2 Finished */
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#define IRQ_5 000040 /* I/O Finish 1 */
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#define IRQ_6 000100 /* I/O Finish 2 */
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#define IRQ_7 000200 /* I/O Finish 3 */
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#define IRQ_10 000400 /* I/O Finish 4 */
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#define IRQ_11 001000 /* P2 Busy */
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#define IRQ_12 002000 /* Inquiry Request */
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#define IRQ_13 004000 /* Special IRQ 1 */
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#define IRQ_14 010000 /* Disk Read Check 1 */
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#define IRQ_15 020000 /* Disk Read Check 2 */
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/* Masks */
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#define FLAG 04000000000000000LL /* Operand Flag */
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#define FWORD 03777777777777777LL /* Full word mask */
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#define MSIGN 02000000000000000LL /* Operator Word */
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#define ESIGN 01000000000000000LL
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#define EXPO 00770000000000000LL
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#define EXPO_V 39
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#define MANT 00007777777777777LL
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#define NORM 00007000000000000LL
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#define ROUND 00004000000000000LL
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#define PRESENT 01000000000000000LL /* Oprand Type */
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#define DFLAG 02000000000000000LL /* Descriptor */
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#define WCOUNT 00017770000000000LL
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#define WCOUNT_V 30
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#define INTEGR 00000002000000000LL
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#define CONTIN 00000001000000000LL
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#define CORE 00000000000077777LL
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#define RFIELD 00077700000000000LL /* Mark Stack Control Word */
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#define RFIELD_V 27 /* Shift off by 6 bits */
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#define SMSFF 00000020000000000LL
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#define SSALF 00000010000000000LL
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#define SVARF 00000000100000000LL
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#define SCWMF 00000000000100000LL
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#define FFIELD 00000007777700000LL
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#define FFIELD_V 15
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#define REPFLD 00000770000000000LL
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#define REPFLD_V 30
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#define MODEF 00200000000000000LL /* Program Descriptor +FFIELD and CORE */
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#define ARGF 00100000000000000LL
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#define PROGF 00400000000000000LL
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#define RGH 00340700000000000LL /* Return Control Word +FFIELD and CORE */
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#define RGH_V 33
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#define RKV 00034070000000000LL
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#define RKV_V 30
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#define RL 00003000000000000LL /* Save L register */
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#define RL_V 36
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#define LMASK 00000000007777777LL
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#define HMASK 00007777770000000LL
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#define DEV_DRUM_RD 01000000000000000LL
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#define DEVMASK 00760000000000000LL
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#define D_MASK 00777777777777777LL
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#define DEV_V 40
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#define DEV_WC 00017770000000000LL
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#define DEV_WC_V 30
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#define DEV_CMD 00000007777700000LL
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#define DEV_CMD_V 15
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#define DEV_INHTRF 00000004000000000LL
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#define DEV_XXX 00000002000000000LL
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#define DEV_XXY 00000001000000000LL
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#define DEV_BIN 00000000400000000LL
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#define DEV_BACK 00000000200000000LL
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#define DEV_WCFLG 00000000100000000LL
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#define DEV_IORD 00000000040000000LL
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#define DEV_OPT 00000000007700000LL /* Print Space, Disk Segments */
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#define CORE 00000000000077777LL
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|
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#define DEV_BUSY 00000000000100000LL /* D16 */
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#define DEV_MEMPAR 00000000000200000LL /* D17 */
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#define DEV_NOTRDY 00000000000400000LL /* D18 */
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#define DEV_PARITY 00000000001000000LL /* D19 */
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#define DEV_ERROR 00000000002000000LL /* D20 */
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#define DEV_EOF 00000000004000000LL /* D21 */
|
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#define DEV_MEMERR 00000000010000000LL /* D22 */
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|
#define DEV_RESULT 00000000037700000LL
|
|
#define DEV_EOT 01000100001000000LL
|
|
#define DEV_BOT 01000200001000000LL
|
|
#define DEV_BLANK 01000400001000000LL
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|
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#define DRUM1_DEV 004 /* 00100 (4) */
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#define DSK1_DEV 006 /* 00110 (6) */
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#define DRUM2_DEV 010 /* 01000 (8) */
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#define CARD1_DEV 012 /* 01010 (10) */
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#define DSK2_DEV 014 /* 01100 (12) */
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#define CARD2_DEV 016 /* 01110 (14) */
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#define DTC_DEV 020 /* 10000 (16) */
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#define PT1_DEV 022 /* 10010 (20) */
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#define PT2_DEV 024 /* 10100 (22) */
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#define PRT1_DEV 026 /* 10110 (24) */
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#define PRT2_DEV 032 /* 11010 (26) */
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#define SPO_DEV 036 /* 11110 (30) */
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|
#define DRUM1_FLAG 00000000000200000LL
|
|
#define DRUM2_FLAG 00000000000400000LL
|
|
#define DSK1_FLAG 00000000001000000LL
|
|
#define DSK2_FLAG 00000000002000000LL
|
|
#define PRT1_FLAG 00000000004000000LL
|
|
#define PRT2_FLAG 00000000010000000LL
|
|
#define PUNCH_FLAG 00000000020000000LL
|
|
#define CARD1_FLAG 00000000040000000LL
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|
#define CARD2_FLAG 00000000100000000LL
|
|
#define SPO_FLAG 00000000200000000LL
|
|
#define PTP1_FLAG 00000000400000000LL
|
|
#define PTR1_FLAG 00000001000000000LL
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|
#define PTR2_FLAG 00000002000000000LL
|
|
#define PTP2_FLAG 00000004000000000LL
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#define DTC_FLAG 00000010000000000LL
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#endif /* _B5500_H_ */
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