254 lines
9.9 KiB
C
254 lines
9.9 KiB
C
/* port.c: Intel Port Mapper
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Copyright (c) 2010, William A. Beech
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Permission is hereby granted, free of charge, to any person obtaining a
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copy of this software and associated documentation files (the "Software"),
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to deal in the Software without restriction, including without limitation
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the rights to use, copy, modify, merge, publish, distribute, sublicense,
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and/or sell copies of the Software, and to permit persons to whom the
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Software is furnished to do so, subject to the following conditions:
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The above copyright notice and this permission notice shall be included in
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all copies or substantial portions of the Software.
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THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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WILLIAM A. BEECH BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
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IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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Except as contained in this notice, the name of William A. Beech shall not be
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used in advertising or otherwise to promote the sale, use or other dealings
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in this Software without prior written authorization from William A. Beech.
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MODIFICATIONS:
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20 Sep 20 - Original file.
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NOTES:
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*/
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#include "system_defs.h"
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#define port_NAME "Intel Port Map Simulator"
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/* function prototypes */
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t_stat port_svc(UNIT *uptr);
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t_stat port_reset(DEVICE *dptr);
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uint8 nulldev(t_bool io, uint8 port, uint8 devnum);
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extern uint8 reg_dev(uint8 (*routine)(t_bool, uint8, uint8), uint16, uint16, uint8);
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void clr_dev();
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uint8 unreg_dev(uint16 port);
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/* external function prototypes */
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//extern t_stat SBC_reset(DEVICE *dptr);
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/* local globals */
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static const char* port_desc(DEVICE *dptr) {
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return port_NAME;
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}
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/* external globals */
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extern uint8 xack; /* XACK signal */
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extern uint16 PCX;
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/* multibus Standard SIMH Device Data Structures */
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UNIT port_unit = {
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UDATA (&port_svc, 0, 0), 1
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};
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REG port_reg[] = {
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{ NULL }
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};
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DEBTAB port_debug[] = {
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{ "ALL", DEBUG_all },
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{ "FLOW", DEBUG_flow },
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{ "READ", DEBUG_read },
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{ "WRITE", DEBUG_write },
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{ "LEV1", DEBUG_level1 },
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{ "LEV2", DEBUG_level2 },
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{ NULL }
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};
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DEVICE port_dev = {
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"PORT", //name
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&port_unit, //units
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port_reg, //registers
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NULL, //modifiers
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1, //numunits
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16, //aradix
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16, //awidth
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1, //aincr
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16, //dradix
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8, //dwidth
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NULL, //examine
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NULL, //deposit
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&port_reset, //reset
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NULL, //boot
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NULL, //attach
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NULL, //detach
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NULL, //ctxt
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DEV_DEBUG, //flags
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0, //dctrl
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port_debug, //debflags
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NULL, //msize
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NULL, //lname
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NULL, //help routine
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NULL, //attach help routine
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NULL, //help context
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&port_desc //device description
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};
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/* Service routines to handle simulator functions */
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/* Reset routine */
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t_stat port_reset(DEVICE *dptr)
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{
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// if (SBC_reset(NULL) == 0) {
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sim_printf(" Port: Reset\n");
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sim_activate (&port_unit, port_unit.wait); /* activate unit */
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return SCPE_OK;
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// } else {
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// sim_printf(" Port: SBC not selected\n");
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// return SCPE_OK;
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// }
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}
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/* service routine - actually does the simulated interrupts */
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t_stat port_svc(UNIT *uptr)
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{
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sim_activate (&port_unit, port_unit.wait); /* continue poll */
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return SCPE_OK;
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}
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/* This is the I/O configuration table. There are 256 possible
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device addresses, if a device is plugged to a port it's routine
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address is here, 'nulldev' means no device has been registered.
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*/
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struct idev {
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uint8 (*routine)(t_bool io, uint8 data, uint8 devnum);
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uint16 port;
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uint16 devnum;
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uint8 dummy;
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};
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struct idev dev_table[256] = {
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 000H */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 004H */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 008H */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 00CH */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 010H */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 014H */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 018H */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 01CH */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 020H */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 024H */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 028H */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 02CH */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 030H */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 034H */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 038H */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 03CH */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 040H */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 044H */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 048H */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 04CH */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 050H */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 054H */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 058H */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 05CH */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 060H */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 064H */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 068H */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 06CH */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 070H */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 074H */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 078H */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 07CH */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 080H */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 084H */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 088H */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 08CH */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 090H */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 094H */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 098H */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 09CH */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 0A0H */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 0A4H */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 0A8H */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 0A0H */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 0B0H */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 0B4H */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 0B8H */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 0B0H */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 0C0H */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 0C4H */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 0C8H */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 0CCH */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 0D0H */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 0D4H */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 0D8H */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 0DCH */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 0E0H */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 0E4H */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 0E8H */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 0ECH */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 0F0H */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 0F4H */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 0F8H */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev} /* 0FCH */
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};
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uint8 nulldev(t_bool io, uint8 data, uint8 devnum)
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{
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SET_XACK(0); //clear xack
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// return 0xff; /* multibus has active high pullups and inversion */
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return 0; //corrects "illegal disk at port X8H" error in ISIS
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}
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uint8 reg_dev(uint8 (*routine)(t_bool io, uint8 data, uint8 devnum),
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uint16 port, uint16 devnum, uint8 dummy)
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{
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if (dev_table[port].routine != &nulldev) { /* port already assigned */
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if (dev_table[port].routine != routine)
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sim_printf(" I/O Port %02X is already assigned\n", port);
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} else {
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dev_table[port].routine = routine;
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dev_table[port].devnum = devnum;
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sim_printf(" I/O Port %02X has been assigned\n", port);
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}
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return 0;
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}
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void clr_dev()
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{
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int i;
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for (i=0; i<256; i++)
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unreg_dev(i);
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}
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uint8 unreg_dev(uint16 port)
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{
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if (dev_table[port].routine == &nulldev) { /* port already free */
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;//sim_printf(" I/O Port %02X is already free\n", port);
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} else {
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dev_table[port].routine = &nulldev;
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dev_table[port].devnum = 0;
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sim_printf(" I/O Port %02X is free\n", port);
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}
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return 0;
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}
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/* end of port.c */
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