b5ea9ec38e
These include simulators for the IBM 701, IBM 702, IBM 704, IBM 705, IBM 705/3, IBM 709, IBM 1410/IBM 7010, IBM 7070, IBM 7080, IBM 7090 and IBM7094. These basically were a collection of machines that shared a common set it peripherals, Each group had its own instruction set, hence different simulators. IBM 701 -> i701 IBM 702/705/705/3/7080 -> i7080 IBM 7070/7074 -> i7070 IBM 1410/7010 -> i7010 IBM 704 -> i704 IBM 704/709/7090/7094 -> i7090 The i7090 can be set to simulate a IBM 704 however you end up disabling almost everything, since the 704 did not have any channels. A build option exists that allows this one to be built without all the extra features. The i7090 simulator’s implementation of the IBM 7094 is a more complete implementation of the IBM 7094 which can run CTSS while the existing simh I7094 can’t.
279 lines
8.8 KiB
C
279 lines
8.8 KiB
C
/* i7000_con.c: IBM 7000 Inquiry Console.
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Copyright (c) 2005-2016, Richard Cornwell
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Permission is hereby granted, free of charge, to any person obtaining a
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copy of this software and associated documentation files (the "Software"),
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to deal in the Software without restriction, including without limitation
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the rights to use, copy, modify, merge, publish, distribute, sublicense,
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and/or sell copies of the Software, and to permit persons to whom the
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Software is furnished to do so, subject to the following conditions:
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The above copyright notice and this permission notice shall be included in
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all copies or substantial portions of the Software.
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THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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RICHARD CORNWELL BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
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IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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This is the standard inquiry or console interface.
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These units each buffer one record in local memory and signal
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ready when the buffer is full or empty. The channel must be
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ready to recieve/transmit data when they are activated since
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they will transfer their block during chan_cmd. All data is
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transmitted as BCD characters.
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*/
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#include "i7000_defs.h"
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#include "sim_card.h"
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#include "sim_defs.h"
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#ifdef NUM_DEVS_CON
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/* std devices. data structures
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cdr_dev Card Reader device descriptor
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cdr_unit Card Reader unit descriptor
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cdr_reg Card Reader register list
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cdr_mod Card Reader modifiers list
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*/
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/* Device status information stored in u5 */
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struct _con_data
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{
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uint8 ibuff[145]; /* Input line buffer */
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uint8 inptr;
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}
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con_data[NUM_DEVS_CON];
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uint32 con_cmd(UNIT *, uint16, uint16);
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void con_ini(UNIT *, t_bool);
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t_stat con_srv(UNIT *);
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t_stat con_help(FILE *, DEVICE *, UNIT *, int32, const char *);
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const char *con_description(DEVICE *dptr);
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extern char ascii_to_six[128];
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UNIT con_unit[] = {
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{UDATA(con_srv, UNIT_S_CHAN(CHAN_CHUREC), 0), 0}, /* A */
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};
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DEVICE con_dev = {
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"INQ", con_unit, NULL, NULL,
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NUM_DEVS_CON, 8, 15, 1, 8, 8,
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NULL, NULL, NULL, NULL, NULL, NULL,
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&con_dib, DEV_DISABLE | DEV_DEBUG, 0, dev_debug,
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NULL, NULL, &con_help, NULL, NULL, &con_description
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};
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/*
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*Console printer routines.
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*/
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void
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con_ini(UNIT *uptr, t_bool f) {
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int u = (uptr - con_unit);
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con_data[u].inptr = 0;
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uptr->u5 = 0;
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sim_activate(uptr, 1000);
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}
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uint32
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con_cmd(UNIT * uptr, uint16 cmd, uint16 dev)
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{
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int chan = UNIT_G_CHAN(uptr->flags);
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int u = (uptr - con_unit);
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/* Are we currently tranfering? */
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if (uptr->u5 & (URCSTA_READ|URCSTA_WRITE|URCSTA_BUSY))
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return SCPE_BUSY;
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switch (cmd) {
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/* Test ready */
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case IO_TRS:
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sim_debug(DEBUG_CMD, &con_dev, "%d: Cmd TRS\n", u);
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return SCPE_OK;
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/* Get record from CPU */
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case IO_WRS:
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sim_putchar('R');
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sim_putchar(' ');
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sim_debug(DEBUG_CMD, &con_dev, "%d: Cmd WRS\n", u);
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chan_set_sel(chan, 1);
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uptr->u5 |= URCSTA_WRITE;
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uptr->u3 = 0;
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return SCPE_OK;
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/* Send record to CPU */
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case IO_RDS:
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if (uptr->u5 & URCSTA_INPUT)
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return SCPE_BUSY;
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if (con_data[u].inptr == 0) {
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/* Activate input so we can get response */
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uptr->u5 |= URCSTA_INPUT;
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sim_putchar('I');
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sim_putchar(' ');
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}
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sim_debug(DEBUG_CMD, &con_dev, "%d: Cmd RDS\n", u);
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chan_set_sel(chan, 0);
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uptr->u5 |= URCSTA_READ;
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uptr->u3 = 0;
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return SCPE_OK;
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}
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chan_set_attn(chan);
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return SCPE_IOERR;
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}
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/* Handle transfer of data for printer */
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t_stat
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con_srv(UNIT *uptr) {
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int chan = UNIT_G_CHAN(uptr->flags);
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uint8 ch;
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int u = (uptr - con_unit);
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t_stat r;
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/* Waiting for disconnect */
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if (uptr->u5 & URCSTA_WDISCO) {
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if (chan_stat(chan, DEV_DISCO)) {
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sim_debug(DEBUG_DETAIL, &con_dev, " Disco\n");
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chan_clear(chan, DEV_SEL|DEV_WEOR);
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uptr->u5 &= ~ URCSTA_WDISCO;
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sim_activate(uptr, 25);
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return SCPE_OK;
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} else {
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/* No disco yet, try again in a bit */
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sim_activate(uptr, 50);
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return SCPE_OK;
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}
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}
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uptr->u5 &= ~URCSTA_BUSY; /* Clear busy */
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/* Copy next column over */
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if (uptr->u5 & URCSTA_WRITE) {
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switch(chan_read_char(chan, &ch, 0)) {
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case TIME_ERROR:
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case END_RECORD:
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sim_putchar('\r');
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sim_putchar('\n');
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sim_debug(DEBUG_EXP, &con_dev, "\n\r");
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uptr->u5 |= URCSTA_WDISCO|URCSTA_BUSY;
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uptr->u5 &= ~URCSTA_WRITE;
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break;
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case DATA_OK:
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ch &= 077;
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sim_debug(DEBUG_EXP, &con_dev, "%c", sim_six_to_ascii[ch]);
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sim_putchar(sim_six_to_ascii[ch]);
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break;
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}
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sim_activate(uptr, 100);
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return SCPE_OK;
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}
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/* Copy next column over */
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if ((uptr->u5 & URCSTA_INPUT) == 0 && uptr->u5 & URCSTA_READ) {
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sim_debug(DEBUG_DATA, &con_dev, "%d: Char > %02o %x\n", u,
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con_data[u].ibuff[uptr->u3], chan_flags[chan]);
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switch(chan_write_char(chan, &con_data[u].ibuff[uptr->u3],
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((uptr->u3+1) == con_data[u].inptr)? DEV_REOR: 0)) {
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case TIME_ERROR:
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case END_RECORD:
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uptr->u5 |= URCSTA_WDISCO|URCSTA_BUSY;
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uptr->u5 &= ~URCSTA_READ;
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sim_debug(DEBUG_EXP, &con_dev, "EOR");
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chan_clear_attn_inq(chan);
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con_data[u].inptr = 0;
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break;
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case DATA_OK:
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uptr->u3++;
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break;
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}
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sim_activate(uptr, 10);
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return SCPE_OK;
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}
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r = sim_poll_kbd();
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if (r & SCPE_KFLAG) {
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ch = r & 0377;
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if (uptr->u5 & URCSTA_INPUT) {
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/* Handle end of buffer */
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switch (ch) {
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case '\r':
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case '\n':
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uptr->u5 &= ~URCSTA_INPUT;
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sim_putchar('\r');
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sim_putchar('\n');
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chan_set_attn_inq(chan);
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break;
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case 033:
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uptr->u5 &= ~URCSTA_INPUT;
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con_data[u].inptr = 0;
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break;
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case '\b':
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if (con_data[u].inptr != 0) {
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con_data[u].inptr--;
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sim_putchar(ch);
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}
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break;
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default:
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if (con_data[u].inptr < sizeof(con_data[u].ibuff)) {
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ch = sim_ascii_to_six[0177&ch];
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if (ch == 0xff) {
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sim_putchar('\007');
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break;
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}
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sim_putchar(sim_six_to_ascii[ch]);
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con_data[u].ibuff[con_data[u].inptr++] = ch;
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}
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break;
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}
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} else {
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if (ch == 033) {
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if (con_data[u].inptr != 0) {
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chan_clear_attn_inq(chan);
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} else {
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#ifdef I7070
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chan_set_attn_inq(chan);
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#endif
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sim_putchar('I');
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sim_putchar(' ');
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uptr->u5 |= URCSTA_INPUT;
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}
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con_data[u].inptr = 0;
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}
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}
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}
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sim_activate(uptr, 500);
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return SCPE_OK;
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}
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t_stat
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con_help(FILE *st, DEVICE *dptr, UNIT *uptr, int32 flag, const char *cptr)
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{
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fprintf (st, "Supervisory Printer\n\n");
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fprintf (st, "This is the interface from the operator to the system. The printer\n");
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fprintf (st, "operated in a half duplex mode. To request the system to accept input\n");
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fprintf (st, "press the <esc> key and wait until the system responds with a line with\n");
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fprintf (st, "I as the first character. When you have finished typing your line, press\n");
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fprintf (st, "return or enter key. Backspace will delete the last character.\n");
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fprintf (st, "All responses from the system are prefixed with a R and blank as the\n");
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fprintf (st, "first character\n");
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return SCPE_OK;
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}
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const char *
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con_description(DEVICE *dptr)
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{
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return "Supervisory Printer";
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}
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#endif
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