423 lines
13 KiB
C
423 lines
13 KiB
C
/* pdp8_ttx.c: PDP-8 additional terminals simulator
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Copyright (c) 1993-2001, Robert M Supnik
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Permission is hereby granted, free of charge, to any person obtaining a
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copy of this software and associated documentation files (the "Software"),
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to deal in the Software without restriction, including without limitation
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the rights to use, copy, modify, merge, publish, distribute, sublicense,
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and/or sell copies of the Software, and to permit persons to whom the
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Software is furnished to do so, subject to the following conditions:
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The above copyright notice and this permission notice shall be included in
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all copies or substantial portions of the Software.
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THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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ROBERT M SUPNIK BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
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IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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Except as contained in this notice, the name of Robert M Supnik shall not
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be used in advertising or otherwise to promote the sale, use or other dealings
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in this Software without prior written authorization from Robert M Supnik.
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ttix,ttox PT08/KL8JA terminal input/output
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This module implements four individual serial interfaces similar in function
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to the console. These interfaces are mapped to Telnet based connections as
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though they were the four lines of a terminal multiplexor. The connection
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polling mechanism is superimposed onto the keyboard of the first interface.
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*/
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#include "pdp8_defs.h"
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#include "sim_sock.h"
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#include "sim_tmxr.h"
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#include <ctype.h>
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#define TTX_LINES 4
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#define TTX_MASK (TTX_LINES - 1)
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#define UNIT_V_UC (UNIT_V_UF + 0) /* UC only */
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#define UNIT_UC (1 << UNIT_V_UC)
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#define TTX_GETLN(x) (((x) >> 4) & TTX_MASK)
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extern int32 int_req, int_enable, dev_done, stop_inst;
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extern int32 tmxr_poll; /* calibrated poll */
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TMLN tt1_ldsc = { 0 }; /* line descriptors */
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TMLN tt2_ldsc = { 0 }; /* line descriptors */
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TMLN tt3_ldsc = { 0 }; /* line descriptors */
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TMLN tt4_ldsc = { 0 }; /* line descriptors */
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TMXR ttx_desc = { /* mux descriptor */
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TTX_LINES, 0, &tt1_ldsc, &tt2_ldsc, &tt3_ldsc, &tt4_ldsc };
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t_stat ttix_svc (UNIT *uptr);
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t_stat ttix_reset (DEVICE *dptr);
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t_stat ttox_svc (UNIT *uptr);
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t_stat ttox_reset (DEVICE *dptr);
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t_stat ttx_attach (UNIT *uptr, char *cptr);
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t_stat ttx_detach (UNIT *uptr);
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t_stat ttx_status (UNIT *uptr, FILE *st);
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/* TTIx data structures
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ttix_dev TTIx device descriptor
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ttix_unit TTIx unit descriptor
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ttix_reg TTIx register list
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ttix_mod TTIx modifiers list
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*/
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MTAB ttix_mod[] = {
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{ UNIT_UC, 0, "lower case", "LC", NULL },
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{ UNIT_UC, UNIT_UC, "upper case", "UC", NULL },
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{ UNIT_ATT, UNIT_ATT, "line status:", NULL, &ttx_status },
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{ 0 } };
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UNIT ttix_unit[] = {
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{ UDATA (&ttix_svc, UNIT_ATTABLE+UNIT_UC, 0), KBD_POLL_WAIT },
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{ UDATA (&ttix_svc, UNIT_UC, 0), KBD_POLL_WAIT },
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{ UDATA (&ttix_svc, UNIT_UC, 0), KBD_POLL_WAIT },
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{ UDATA (&ttix_svc, UNIT_UC, 0), KBD_POLL_WAIT } };
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#define tti1_unit ttix_unit[0]
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#define tti2_unit ttix_unit[1]
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#define tti3_unit ttix_unit[2]
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#define tti4_unit ttix_unit[3]
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REG tti1_reg[] = {
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{ ORDATA (BUF, tti1_unit.buf, 8) },
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{ FLDATA (DONE, dev_done, INT_V_TTI1) },
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{ FLDATA (ENABLE, int_enable, INT_V_TTI1) },
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{ FLDATA (INT, int_req, INT_V_TTI1) },
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{ DRDATA (POS, tt1_ldsc.rxcnt, 32), PV_LEFT },
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{ DRDATA (TIME, tti1_unit.wait, 24), REG_NZ + PV_LEFT },
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{ FLDATA (UC, tti1_unit.flags, UNIT_V_UC), REG_HRO },
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{ NULL } };
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DEVICE tti1_dev = {
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"TTI1", &tti1_unit, tti1_reg, ttix_mod,
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1, 10, 31, 1, 8, 8,
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&tmxr_ex, &tmxr_dep, &ttix_reset,
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NULL, &ttx_attach, &ttx_detach };
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REG tti2_reg[] = {
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{ ORDATA (BUF, tti2_unit.buf, 8) },
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{ FLDATA (DONE, dev_done, INT_V_TTI2) },
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{ FLDATA (ENABLE, int_enable, INT_V_TTI2) },
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{ FLDATA (INT, int_req, INT_V_TTI2) },
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{ DRDATA (POS, tt2_ldsc.rxcnt, 32), PV_LEFT },
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{ DRDATA (TIME, tti2_unit.wait, 24), REG_NZ + PV_LEFT },
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{ FLDATA (UC, tti2_unit.flags, UNIT_V_UC), REG_HRO },
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{ NULL } };
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DEVICE tti2_dev = {
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"TTI2", &tti2_unit, tti2_reg, ttix_mod,
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1, 10, 31, 1, 8, 8,
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NULL, NULL, &ttix_reset,
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NULL, NULL, NULL };
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REG tti3_reg[] = {
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{ ORDATA (BUF, tti3_unit.buf, 8) },
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{ FLDATA (DONE, dev_done, INT_V_TTI3) },
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{ FLDATA (ENABLE, int_enable, INT_V_TTI3) },
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{ FLDATA (INT, int_req, INT_V_TTI3) },
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{ DRDATA (POS, tt3_ldsc.rxcnt, 32), PV_LEFT },
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{ DRDATA (TIME, tti3_unit.wait, 24), REG_NZ + PV_LEFT },
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{ FLDATA (UC, tti3_unit.flags, UNIT_V_UC), REG_HRO },
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{ NULL } };
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DEVICE tti3_dev = {
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"TTI3", &tti3_unit, tti3_reg, ttix_mod,
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1, 10, 31, 1, 8, 8,
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NULL, NULL, &ttix_reset,
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NULL, NULL, NULL };
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REG tti4_reg[] = {
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{ ORDATA (BUF, tti4_unit.buf, 8) },
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{ FLDATA (DONE, dev_done, INT_V_TTI4) },
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{ FLDATA (ENABLE, int_enable, INT_V_TTI4) },
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{ FLDATA (INT, int_req, INT_V_TTI4) },
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{ DRDATA (POS, tt4_ldsc.rxcnt, 32), PV_LEFT },
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{ DRDATA (TIME, tti4_unit.wait, 24), REG_NZ + PV_LEFT },
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{ FLDATA (UC, tti4_unit.flags, UNIT_V_UC), REG_HRO },
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{ NULL } };
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DEVICE tti4_dev = {
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"TTI4", &tti4_unit, tti4_reg, ttix_mod,
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1, 10, 31, 1, 8, 8,
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NULL, NULL, &ttix_reset,
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NULL, NULL, NULL };
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/* TTOx data structures
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ttox_dev TTOx device descriptor
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ttox_unit TTOx unit descriptor
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ttox_reg TTOx register list
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*/
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UNIT ttox_unit[] = {
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{ UDATA (&ttox_svc, 0, 0), SERIAL_OUT_WAIT },
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{ UDATA (&ttox_svc, 0, 0), SERIAL_OUT_WAIT },
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{ UDATA (&ttox_svc, 0, 0), SERIAL_OUT_WAIT },
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{ UDATA (&ttox_svc, 0, 0), SERIAL_OUT_WAIT } };
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#define tto1_unit ttox_unit[0]
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#define tto2_unit ttox_unit[0]
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#define tto3_unit ttox_unit[0]
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#define tto4_unit ttox_unit[0]
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REG tto1_reg[] = {
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{ ORDATA (BUF, tto1_unit.buf, 8) },
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{ FLDATA (DONE, dev_done, INT_V_TTO1) },
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{ FLDATA (ENABLE, int_enable, INT_V_TTO1) },
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{ FLDATA (INT, int_req, INT_V_TTO1) },
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{ DRDATA (POS, tt1_ldsc.txcnt, 32), PV_LEFT },
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{ DRDATA (TIME, tto1_unit.wait, 24), PV_LEFT },
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{ NULL } };
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DEVICE tto1_dev = {
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"TTO1", &tto1_unit, tto1_reg, NULL,
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1, 10, 31, 1, 8, 8,
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NULL, NULL, &ttox_reset,
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NULL, NULL, NULL };
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REG tto2_reg[] = {
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{ ORDATA (BUF, tto2_unit.buf, 8) },
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{ FLDATA (DONE, dev_done, INT_V_TTO2) },
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{ FLDATA (ENABLE, int_enable, INT_V_TTO2) },
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{ FLDATA (INT, int_req, INT_V_TTO2) },
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{ DRDATA (POS, tt2_ldsc.txcnt, 32), PV_LEFT },
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{ DRDATA (TIME, tto2_unit.wait, 24), PV_LEFT },
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{ NULL } };
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DEVICE tto2_dev = {
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"TTO2", &tto2_unit, tto2_reg, NULL,
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1, 10, 31, 1, 8, 8,
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NULL, NULL, &ttox_reset,
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NULL, NULL, NULL };
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REG tto3_reg[] = {
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{ ORDATA (BUF, tto3_unit.buf, 8) },
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{ FLDATA (DONE, dev_done, INT_V_TTO3) },
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{ FLDATA (ENABLE, int_enable, INT_V_TTO3) },
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{ FLDATA (INT, int_req, INT_V_TTO3) },
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{ DRDATA (POS, tt3_ldsc.txcnt, 32), PV_LEFT },
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{ DRDATA (TIME, tto3_unit.wait, 24), PV_LEFT },
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{ NULL } };
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DEVICE tto3_dev = {
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"TTO3", &tto3_unit, tto3_reg, NULL,
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1, 10, 31, 1, 8, 8,
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NULL, NULL, &ttox_reset,
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NULL, NULL, NULL };
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REG tto4_reg[] = {
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{ ORDATA (BUF, tto4_unit.buf, 8) },
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{ FLDATA (DONE, dev_done, INT_V_TTO4) },
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{ FLDATA (ENABLE, int_enable, INT_V_TTO4) },
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{ FLDATA (INT, int_req, INT_V_TTO4) },
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{ DRDATA (POS, tt4_ldsc.txcnt, 32), PV_LEFT },
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{ DRDATA (TIME, tto4_unit.wait, 24), PV_LEFT },
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{ NULL } };
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DEVICE tto4_dev = {
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"TTO4", &tto4_unit, tto4_reg, NULL,
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1, 10, 31, 1, 8, 8,
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NULL, NULL, &ttox_reset,
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NULL, NULL, NULL };
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/* Terminal input: IOT routine */
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int32 ttix (int32 inst, int32 AC)
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{
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int32 pulse = inst & 07; /* IOT pulse */
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int32 ln = TTX_GETLN (inst); /* line # */
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int32 itti = (INT_TTI1 << ln); /* rx intr */
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int32 itto = (INT_TTO1 << ln); /* tx intr */
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switch (pulse) { /* case IR<9:11> */
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case 0: /* KCF */
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dev_done = dev_done & ~itti; /* clear flag */
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int_req = int_req & ~itti;
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break;
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case 1: /* KSF */
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return (dev_done & itti)? IOT_SKP + AC: AC;
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case 2: /* KCC */
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dev_done = dev_done & ~itti; /* clear flag */
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int_req = int_req & ~itti;
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return 0; /* clear AC */
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case 4: /* KRS */
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return (AC | ttix_unit[ln].buf); /* return buf */
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case 5: /* KIE */
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if (AC & 1) int_enable = int_enable | (itti + itto);
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else int_enable = int_enable & ~(itti + itto);
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int_req = INT_UPDATE; /* update intr */
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break;
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case 6: /* KRB */
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dev_done = dev_done & ~itti; /* clear flag */
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int_req = int_req & ~itti;
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return ttix_unit[ln].buf; /* return buf */
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default:
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return (stop_inst << IOT_V_REASON) + AC; } /* end switch */
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return AC;
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}
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/* Unit service */
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t_stat ttix_svc (UNIT *uptr)
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{
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int32 temp, newln;
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int32 ln = uptr - ttix_unit; /* line # */
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int32 itti = (INT_TTI1 << ln); /* rx intr */
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if (ttx_desc.ldsc[ln] -> conn) { /* connected? */
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tmxr_poll_rx (&ttx_desc); /* poll for input */
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if (temp = tmxr_getc_ln (ttx_desc.ldsc[ln])) { /* get char */
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temp = temp & 0177; /* mask to 7b */
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if ((uptr -> flags & UNIT_UC) && islower (temp))
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temp = toupper (temp);
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uptr -> buf = temp | 0200; /* Teletype code */
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dev_done = dev_done | itti; /* set done */
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int_req = INT_UPDATE; } /* update intr */
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sim_activate (uptr, uptr -> wait); } /* continue poll */
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if (uptr -> flags & UNIT_ATT) { /* attached? */
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newln = tmxr_poll_conn (&ttx_desc, uptr); /* poll connect */
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if (newln >= 0) { /* got one? */
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sim_activate (&ttix_unit[newln], ttix_unit[newln].wait);
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ttx_desc.ldsc[newln] -> rcve = 1; } /* rcv enabled */
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sim_activate (uptr, tmxr_poll); } /* sched poll */
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return SCPE_OK;
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}
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/* Reset routine */
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t_stat ttix_reset (DEVICE *dptr)
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{
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UNIT *uptr = dptr -> units; /* unit */
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int32 ln = uptr - ttix_unit; /* line # */
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int32 itti = (INT_TTI1 << ln); /* rx intr */
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uptr -> buf = 0; /* clr buf */
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dev_done = dev_done & ~itti; /* clr done, int */
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int_req = int_req & ~itti;
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int_enable = int_enable | itti; /* set enable */
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if (ttx_desc.ldsc[ln] -> conn) { /* if conn, */
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sim_activate (uptr, uptr -> wait); /* activate, */
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ttx_desc.ldsc[ln] -> rcve = 1; } /* enable */
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else if (uptr -> flags & UNIT_ATT) /* if attached, */
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sim_activate (uptr, tmxr_poll); /* activate */
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else sim_cancel (uptr); /* else stop */
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return SCPE_OK;
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}
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/* Terminal output: IOT routine */
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int32 ttox (int32 inst, int32 AC)
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{
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int32 pulse = inst & 07; /* pulse */
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int32 ln = TTX_GETLN (inst); /* line # */
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int32 itti = (INT_TTI1 << ln); /* rx intr */
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int32 itto = (INT_TTO1 << ln); /* tx intr */
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switch (pulse) { /* case IR<9:11> */
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case 0: /* TLF */
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dev_done = dev_done | itto; /* set flag */
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int_req = INT_UPDATE; /* update intr */
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break;
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case 1: /* TSF */
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return (dev_done & itto)? IOT_SKP + AC: AC;
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case 2: /* TCF */
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dev_done = dev_done & ~itto; /* clear flag */
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int_req = int_req & ~itto; /* clear intr */
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break;
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case 5: /* SPI */
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return (int_req & (itti | itto))? IOT_SKP + AC: AC;
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case 6: /* TLS */
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dev_done = dev_done & ~itto; /* clear flag */
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int_req = int_req & ~itto; /* clear int req */
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case 4: /* TPC */
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sim_activate (&ttox_unit[ln], ttox_unit[ln].wait); /* activate */
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ttox_unit[ln].buf = AC & 0377; /* load buffer */
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break;
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default:
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return (stop_inst << IOT_V_REASON) + AC; } /* end switch */
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return AC;
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}
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/* Unit service */
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t_stat ttox_svc (UNIT *uptr)
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{
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int32 ln = uptr - ttox_unit; /* line # */
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int32 itto = (INT_TTO1 << ln); /* tx intr */
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if (ttx_desc.ldsc[ln] -> conn) { /* connected? */
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if (ttx_desc.ldsc[ln] -> xmte) { /* tx enabled? */
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TMLN *lp = ttx_desc.ldsc[ln]; /* get line */
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tmxr_putc_ln (lp, uptr -> buf & 0177); /* output char */
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tmxr_poll_tx (&ttx_desc); } /* poll xmt */
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else { tmxr_poll_tx (&ttx_desc); /* poll xmt */
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sim_activate (uptr, tmxr_poll); /* wait */
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return SCPE_OK; } }
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dev_done = dev_done | itto; /* set done */
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int_req = INT_UPDATE; /* update intr */
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return SCPE_OK;
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}
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/* Reset routine */
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t_stat ttox_reset (DEVICE *dptr)
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{
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UNIT *uptr = dptr -> units; /* unit */
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int32 ln = uptr - ttox_unit; /* line # */
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int32 itto = (INT_TTO1 << ln); /* tx intr */
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uptr -> buf = 0; /* clr buf */
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dev_done = dev_done & ~itto; /* clr done, int */
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int_req = int_req & ~itto;
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int_enable = int_enable | itto; /* set enable */
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sim_cancel (uptr); /* deactivate */
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return SCPE_OK;
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}
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/* Attach master unit */
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t_stat ttx_attach (UNIT *uptr, char *cptr)
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{
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t_stat r;
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r = tmxr_attach (&ttx_desc, uptr, cptr); /* attach */
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if (r != SCPE_OK) return r; /* error */
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sim_activate (uptr, tmxr_poll); /* start poll */
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return SCPE_OK;
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}
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/* Detach master unit */
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t_stat ttx_detach (UNIT *uptr)
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{
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int32 i;
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t_stat r;
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r = tmxr_detach (&ttx_desc, uptr); /* detach */
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for (i = 0; i < TTX_LINES; i++) { /* all lines, */
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ttx_desc.ldsc[i] -> rcve = 0; /* disable rcv */
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sim_cancel (&ttix_unit[i]); } /* stop poll */
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return SCPE_OK;
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}
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/* Status */
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t_stat ttx_status (UNIT *uptr, FILE *st)
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{
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int32 i;
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for (i = 0; (i < TTX_LINES) && (ttx_desc.ldsc[i] -> conn == 0); i++) ;
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if (i < TTX_LINES) {
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for (i = 0; i < TTX_LINES; i++) {
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if (ttx_desc.ldsc[i] -> conn)
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tmxr_fstatus (st, ttx_desc.ldsc[i], i); } }
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else fprintf (st, " all disconnected");
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return SCPE_OK;
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}
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