5531ccb175
These changes facilitate more robust parameter type checking and helps to identify unexpected coding errors. Most simulators can now also be compiled with a C++ compiler without warnings. Additionally, these changes have also been configured to facilitate easier backporting of simulator and device simulation modules to run under the simh v3.9+ SCP framework.
342 lines
13 KiB
C
342 lines
13 KiB
C
/* sds_rad.c: SDS 940 fixed head disk simulator
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Copyright (c) 2001-2008, Robert M. Supnik
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Permission is hereby granted, free of charge, to any person obtaining a
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copy of this software and associated documentation files (the "Software"),
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to deal in the Software without restriction, including without limitation
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the rights to use, copy, modify, merge, publish, distribute, sublicense,
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and/or sell copies of the Software, and to permit persons to whom the
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Software is furnished to do so, subject to the following conditions:
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The above copyright notice and this permission notice shall be included in
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all copies or substantial portions of the Software.
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THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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ROBERT M SUPNIK BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
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IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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Except as contained in this notice, the name of Robert M Supnik shall not be
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used in advertising or otherwise to promote the sale, use or other dealings
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in this Software without prior written authorization from Robert M Supnik.
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rad fixed head disk
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The fixed head disk is a head-per-track disk, with up to four disks. Each
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disk is divided into two logical units. Reads and writes cannot cross logical
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unit boundaries. The fixed head disk transfers 12b characters, rather than 6b
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characters. To minimize overhead, the disk is buffered in memory.
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*/
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#include "sds_defs.h"
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#include <math.h>
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/* Constants */
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#define RAD_CHAN CHAN_E /* Connected I/O controller */
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#define RAD_NUMWD 64 /* words/sector */
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#define RAD_NUMSC 64 /* sectors/track */
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#define RAD_NUMTR 64 /* tracks/log unit */
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#define RAD_NUMLU 8 /* log units/ctrl */
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#define RAD_SCSIZE (RAD_NUMLU*RAD_NUMTR*RAD_NUMSC) /* sectors/disk */
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#define RAD_AMASK (RAD_SCSIZE - 1) /* sec addr mask */
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#define RAD_SIZE (RAD_SCSIZE * RAD_NUMWD) /* words/disk */
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#define RAD_GETLUN(x) ((x) / (RAD_NUMTR * RAD_NUMSC))
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#define RAD_SCMASK (RAD_NUMSC - 1) /* sector mask */
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#define RAD_TRSCMASK ((RAD_NUMSC * RAD_NUMTR) - 1) /* track/sec mask */
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#define GET_SECTOR(x) ((int) fmod (sim_gtime() / ((double) (x)), \
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((double) RAD_NUMSC)))
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extern uint32 xfr_req;
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extern uint32 alert;
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extern int32 stop_invins, stop_invdev, stop_inviop;
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int32 rad_err = 0; /* error */
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int32 rad_nobi = 0; /* !incr x track */
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int32 rad_da = 0; /* disk address */
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int32 rad_sba = 0; /* sec byte addr */
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int32 rad_wrp = 0; /* write prot */
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int32 rad_time = 2; /* time per 12b */
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int32 rad_stopioe = 1; /* stop on error */
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DSPT rad_tplt[] = { /* template */
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{ 1, 0 },
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{ 1, DEV_OUT },
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{ 0, 0 }
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};
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t_stat rad_svc (UNIT *uptr);
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t_stat rad_reset (DEVICE *dptr);
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t_stat rad_boot (int32 unitno, DEVICE *dptr);
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t_stat rad_fill (int32 sba);
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void rad_end_op (int32 fl);
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int32 rad_adjda (int32 sba, int32 inc);
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t_stat rad (uint32 fnc, uint32 inst, uint32 *dat);
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/* RAD data structures
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rad_dib device information block
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rad_dev device descriptor
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rad_unit unit descriptor
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rad_reg register list
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*/
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DIB rad_dib = { RAD_CHAN, DEV_RAD, XFR_RAD, rad_tplt, &rad };
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UNIT rad_unit = {
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UDATA (&rad_svc, UNIT_FIX+UNIT_ATTABLE+UNIT_BUFABLE+UNIT_MUSTBUF,
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RAD_SIZE)
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};
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REG rad_reg[] = {
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{ ORDATA (DA, rad_da, 15) },
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{ GRDATA (SA, rad_sba, 8, 6, 1) },
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{ FLDATA (BP, rad_sba, 0) },
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{ FLDATA (XFR, xfr_req, XFR_V_RAD) },
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{ FLDATA (NOBD, rad_nobi, 0) },
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{ FLDATA (ERR, rad_err, 0) },
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{ ORDATA (PROT, rad_wrp, 8) },
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{ DRDATA (TIME, rad_time, 24), REG_NZ + PV_LEFT },
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{ FLDATA (STOP_IOE, rad_stopioe, 0) },
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{ NULL }
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};
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MTAB rad_mod[] = {
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{ MTAB_XTD|MTAB_VDV, 0, "CHANNEL", "CHANNEL",
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&set_chan, &show_chan, NULL },
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{ 0 }
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};
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DEVICE rad_dev = {
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"RAD", &rad_unit, rad_reg, rad_mod,
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1, 8, 21, 1, 8, 24,
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NULL, NULL, &rad_reset,
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&rad_boot, NULL, NULL,
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&rad_dib, DEV_DISABLE
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};
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/* Fixed head disk routine
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conn - inst = EOM0, dat = NULL
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eom1 - inst = EOM1, dat = NULL
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sks - inst = SKS, dat = ptr to result
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disc - inst = device number, dat = NULL
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wreor - inst = device number, dat = NULL
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read - inst = device number, dat = ptr to data
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write - inst = device number, dat = ptr to result
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*/
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t_stat rad (uint32 fnc, uint32 inst, uint32 *dat)
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{
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int32 t, lun, new_ch;
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uint32 p;
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uint32 *fbuf = (uint32 *)rad_unit.filebuf;
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switch (fnc) { /* case function */
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case IO_CONN: /* connect */
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new_ch = I_GETEOCH (inst); /* get new chan */
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if (new_ch != rad_dib.chan) /* wrong chan? */
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return SCPE_IERR;
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if (CHC_GETCPW (inst) > 1) /* 1-2 char/word? */
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return STOP_INVIOP;
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if (sim_is_active (&rad_unit) || (alert == POT_RADA)) /* protocol viol? */
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return STOP_INVIOP;
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rad_err = 0; /* clr error */
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rad_sba = 0; /* clr sec bptr */
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chan_set_flag (rad_dib.chan, CHF_12B); /* 12B mode */
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t = (rad_da & RAD_SCMASK) - GET_SECTOR (rad_time * RAD_NUMWD);
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if (t <= 0) /* seek */
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t = t + RAD_NUMSC;
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sim_activate (&rad_unit, t * rad_time * (RAD_NUMWD / 2));
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xfr_req = xfr_req & ~XFR_RAD; /* clr xfr flg */
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break;
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case IO_EOM1: /* EOM mode 1 */
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new_ch = I_GETEOCH (inst); /* get new chan */
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if (new_ch != rad_dib.chan) /* wrong chan? */
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return SCPE_IERR;
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if ((inst & 00600) == 00200) /* alert for sec */
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alert = POT_RADS;
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else if ((inst & 06600) == 0) { /* alert for addr */
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if (sim_is_active (&rad_unit)) /* busy? */
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rad_err = 1;
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else {
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rad_nobi = (inst & 01000)? 1: 0; /* save inc type */
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alert = POT_RADA; /* set alert */
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}
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}
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break;
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case IO_DISC: /* disconnect */
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rad_end_op (0); /* normal term */
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if (inst & DEV_OUT) /* fill write */
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return rad_fill (rad_sba);
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break;
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case IO_WREOR: /* write eor */
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rad_end_op (CHF_EOR); /* eor term */
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return rad_fill (rad_sba); /* fill write */
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case IO_SKS: /* SKS */
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new_ch = I_GETSKCH (inst); /* sks chan */
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if (new_ch != rad_dib.chan) /* wrong chan? */
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return SCPE_IERR;
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t = I_GETSKCND (inst); /* sks cond */
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lun = RAD_GETLUN (rad_da);
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if (((t == 000) && !sim_is_active (&rad_unit)) || /* 10026: ready */
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((t == 004) && !rad_err) || /* 11026: !err */
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((t == 014) && !(rad_wrp & (1 << lun)))) /* 13026: !wrprot */
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*dat = 1;
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break;
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case IO_READ: /* read */
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p = (rad_da * RAD_NUMWD) + (rad_sba >> 1); /* buf wd addr */
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xfr_req = xfr_req & ~XFR_RAD; /* clr xfr req */
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if ((rad_unit.flags & UNIT_BUF) == 0) { /* not buffered? */
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rad_end_op (CHF_ERR | CHF_EOR); /* set rad err */
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CRETIOE (rad_stopioe, SCPE_UNATT);
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}
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if (p >= rad_unit.capac) { /* end of disk? */
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rad_end_op (CHF_ERR | CHF_EOR); /* set rad err */
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return SCPE_OK;
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}
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if (rad_sba & 1) /* odd byte? */
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*dat = fbuf[p] & 07777;
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else *dat = (fbuf[p] >> 12) & 07777; /* even */
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rad_sba = rad_adjda (rad_sba, 1); /* next byte */
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break;
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case IO_WRITE:
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p = (rad_da * RAD_NUMWD) + (rad_sba >> 1);
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xfr_req = xfr_req & ~XFR_RAD; /* clr xfr req */
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if ((rad_unit.flags & UNIT_BUF) == 0) { /* not buffered? */
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rad_end_op (CHF_ERR | CHF_EOR); /* set rad err */
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CRETIOE (rad_stopioe, SCPE_UNATT);
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}
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if ((p >= rad_unit.capac) || /* end of disk? */
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(rad_wrp & (1 << RAD_GETLUN (rad_da)))) { /* write prot? */
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rad_end_op (CHF_ERR | CHF_EOR); /* set rad err */
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return SCPE_OK;
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}
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if (rad_sba & 1) /* odd byte? */
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fbuf[p] = fbuf[p] | (*dat & 07777);
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else fbuf[p] = (*dat & 07777) << 12; /* even */
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if (p >= rad_unit.hwmark) /* mark hiwater */
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rad_unit.hwmark = p + 1;
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rad_sba = rad_adjda (rad_sba, 1); /* next byte */
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break;
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default:
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CRETINS;
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}
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return SCPE_OK;
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}
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/* PIN routine */
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t_stat pin_rads (uint32 num, uint32 *dat)
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{
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*dat = GET_SECTOR (rad_time * RAD_NUMWD); /* ret curr sec */
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return SCPE_OK;
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}
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/* POT routine */
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t_stat pot_rada (uint32 num, uint32 *dat)
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{
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rad_da = (*dat) & RAD_AMASK; /* save dsk addr */
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return SCPE_OK;
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}
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/* Unit service and read/write */
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t_stat rad_svc (UNIT *uptr)
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{
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xfr_req = xfr_req | XFR_RAD; /* set xfr req */
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sim_activate (&rad_unit, rad_time); /* activate */
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return SCPE_OK;
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}
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/* Fill incomplete sector */
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t_stat rad_fill (int32 sba)
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{
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uint32 p = rad_da * RAD_NUMWD;
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uint32 *fbuf = (uint32 *)rad_unit.filebuf;
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int32 wa = (sba + 1) >> 1; /* whole words */
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if (sba && (p < rad_unit.capac)) { /* fill needed? */
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for ( ; wa < RAD_NUMWD; wa++)
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fbuf[p + wa] = 0;
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if ((p + wa) >= rad_unit.hwmark)
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rad_unit.hwmark = p + wa + 1;
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rad_adjda (sba, RAD_NUMWD - 1); /* inc da */
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}
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return SCPE_OK;
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}
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/* Adjust disk address */
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int32 rad_adjda (int32 sba, int32 inc)
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{
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sba = sba + inc;
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if (rad_sba >= (RAD_NUMWD * 2)) { /* next sector? */
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if (rad_nobi) rad_da = (rad_da & ~RAD_SCMASK) + /* within band? */
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((rad_da + 1) & RAD_SCMASK);
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else rad_da = (rad_da & ~RAD_TRSCMASK) + /* cross band */
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((rad_da + 1) & RAD_TRSCMASK);
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sba = 1; /* start new sec */
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}
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return sba;
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}
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/* Terminate disk operation */
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void rad_end_op (int32 fl)
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{
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if (fl) /* set flags */
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chan_set_flag (rad_dib.chan, fl);
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xfr_req = xfr_req & ~XFR_RAD; /* clear xfr */
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sim_cancel (&rad_unit); /* stop */
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if (fl & CHF_ERR) { /* error? */
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chan_disc (rad_dib.chan); /* disconnect */
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rad_err = 1; /* set rad err */
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}
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return;
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}
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/* Reset routine */
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t_stat rad_reset (DEVICE *dptr)
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{
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chan_disc (rad_dib.chan); /* disconnect */
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rad_nobi = 0; /* clear state */
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rad_da = 0;
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rad_sba = 0;
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xfr_req = xfr_req & ~XFR_RAD; /* clr xfr req */
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sim_cancel (&rad_unit); /* deactivate */
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return SCPE_OK;
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}
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/* Boot routine - simulate FILL console command */
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t_stat rad_boot (int32 unitno, DEVICE *dptr)
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{
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extern uint32 P, M[];
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if (unitno) /* only unit 0 */
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return SCPE_ARG;
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if (rad_dib.chan != CHAN_W) /* only on W channel */
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return SCPE_IOERR;
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M[0] = 077777771; /* -7B */
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M[1] = 007100000; /* LDX 0 */
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M[2] = 000203226; /* EOM 3226B */
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M[3] = 003200002; /* WIM 2 */
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M[4] = 000100002; /* BRU 2 */
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P = 1; /* start at 1 */
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return SCPE_OK;
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}
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