701f0fe028
1. New Features
1.1 Directory and documentation
- Only common files (SCP and libraries) are in the top level
directory. Individual simulator files are in their individual
directories.
- simh_doc.txt has been split up. simh_doc.txt now documents
only SCP. The individual simulators are documented in separate
text files in their own directories.
- mingw_build.bat is a batch file for the MINGW/gcc environment
that will build all the simulators, assuming the root directory
structure is at c:\sim.
- Makefile is a UNIX make file for the gcc environment that will
build all the simulators, assuming the root directory is at
c:\sim.
1.2 SCP
- DO <file name> executes the SCP commands in the specified file.
- Replicated registers in unit structures can now be declared as
arrays for examine, modify, save, and restore. Most replicated
unit registers (for example, mag tape position registers) have
been changed to arrays.
- The ADD/REMOVE commands have been replaced by SET unit ONLINE
and SET unit OFFLINE, respectively.
- Register names that are unique within an entire simulator do
not have to be prefaced with the device name.
- The ATTACH command can attach files read only, either under
user option (-r), or because the attached file is ready only.
- The SET/SHOW capabilities have been extended. New forms include:
SET <dev> param{=value}{ param ...}
SET <unit> param{=value}{ param ...}
SHOW <dev> {param param ...}
SHOW <unit> {param param ...}
- Multiple breakpoints have been implemented. Breakpoints are
set/cleared/displayed by:
BREAK addr_list{[count]}
NOBREAK addr_list
SHOW BREAK addr_list
1.3 PDP-11 simulator
- Unibus map implemented, with 22b RP controller (URH70) or 18b
RP controller (URH11) (in debug).
- All DMA peripherals rewritten to use map.
- Many peripherals modified for source sharing with VAX.
- RQDX3 implemented.
- Bugs fixed in RK11 and RL11 write check.
1.4 PDP-10 simulator
- ITS 1-proceed implemented.
- Bugs fixed in ITS PC sampling and LPMR
1.5 18b PDP simulator
- Interrupts split out to multiple levels to allow easier
expansion.
1.5 IBM System 3 Simulator
- Written by Charles (Dutch) Owen.
1.6 VAX Simulator (in debug)
- Simulates MicroVAX 3800 (KA655) with 16MB-64MB memory, RQDX3,
RLV12, TSV11, DZV11, LPV11, PCV11.
- CDROM capability has been added to the RQDX3, to allow testing
with VMS hobbyist images.
1.7 SDS 940 Simulator (not tested)
- Simulates SDS 940, 16K-64K memory, fixed and moving head
disk, magtape, line printer, console.
1.8 Altair Z80
- Revised from Charles (Dutch) Owen's original by Peter Schorn.
- MITS 8080 with full Z80 simulation.
- 4K and 8K BASIC packages, Prolog package.
1.9 Interdata
The I4 simulator has been withdrawn for major rework. Look for
a complete 16b/32b Interdata simulator sometime next year.
2. Release Notes
2.1 SCP
SCP now allows replicated registers in unit structures to be
modelled as arrays. All replicated register declarations have
been replaced by register array declarations. As a result,
save files from prior revisions will generate errors after
restoring main memory.
2.2 PDP-11
The Unibus map code is in debug. The map was implemented primarily
to allow source sharing with the VAX, which requires a DMA map.
DMA devices work correctly with the Unibus map disabled.
The RQDX3 simulator has run a complete RSTS/E SYSGEN, with multiple
drives, and booted the completed system from scratch.
2.3 VAX
The VAX simulator will run the boot code up to the >>> prompt. It
can successfully process a SHOW DEVICE command. It runs the HCORE
instruction diagnostic. It can boot the hobbyist CD through SYSBOOT
and through the date/time dialog and restore the hobbyist CD, using
standalone backup. On the boot of the restored disk, it gets to the
date/time dialog, and then crashes.
2.4 SDS 940
The SDS 940 is untested, awaiting real code.
2.5 GCC Optimization
At -O2 and above, GCC does not correctly compile the simulators which
use setjmp-longjmp (PDP-11, PDP-10, VAX). A working hypothesis is
that optimized state maintained in registers is being used in the
setjmp processing routine. On the PDP-11 and PDP-10, all of this
state has been either made global, or volatile, to encourage GCC to
keep the state up to date in memory. The VAX is still vulnerable.
3. Work list
3.1 SCP
- Better ENABLE/DISABLE.
3.2 PDP-11 RQDX3
Software mapped mode, RCT read simulation, VMS debug.
428 lines
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428 lines
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Text
To: Users
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From: Bob Supnik
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Subj: IBM 1401 Simulator Usage
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Date: 1-Dec-01
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COPYRIGHT NOTICE
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The following copyright notice applies to both the SIMH source and binary:
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Original code published in 1993-2001, written by Robert M Supnik
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Copyright (c) 1993-2001, Robert M Supnik
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Permission is hereby granted, free of charge, to any person obtaining a
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copy of this software and associated documentation files (the "Software"),
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to deal in the Software without restriction, including without limitation
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the rights to use, copy, modify, merge, publish, distribute, sublicense,
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and/or sell copies of the Software, and to permit persons to whom the
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Software is furnished to do so, subject to the following conditions:
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The above copyright notice and this permission notice shall be included in
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all copies or substantial portions of the Software.
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THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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ROBERT M SUPNIK BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
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IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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Except as contained in this notice, the name of Robert M Supnik shall not
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be used in advertising or otherwise to promote the sale, use or other dealings
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in this Software without prior written authorization from Robert M Supnik.
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This memorandum documents the IBM 1401 simulator.
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1. Simulator Files
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sim/ sim_defs.h
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scp.c
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scp_tty.c
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sim_rev.c
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sim/i1401/ i1401_defs.h
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i1401_cpu.c
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i1401_iq.c
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i1401_lp.c
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i1401_mt.c
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i1401_sys.c
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2. IBM 1401 Features
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The IBM 1401 simulator is configured as follows:
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device simulates
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name(s)
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CPU IBM 1401 CPU with 16K of memory
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CDR,CDP IBM 1402 card reader/punch
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LPT IBM 1403 line printer
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INQ IBM 1407 inquiry terminal
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MT IBM 729 7-track magnetic tape controller with six drives
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The IBM 1401 simulator implements many unique stop conditions. On almost
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any kind of error the simulator stops:
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unimplemented opcode
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reference to non-existent memory
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reference to non-existent device
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no word mark under opcode
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invalid A address
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invalid B address
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invalid instruction length
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invalid modifier character
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invalid branch address
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invalid magtape unit number
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invalid magtape record length
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write to locked magtape drive
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skip to unpunched carriage control tape channel
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card reader hopper empty
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address register wrap-around
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single character A field in MCE
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single character B field in MCE
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hanging $ in MCE with EPE enabled
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I/O check with I/O stop switch set
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The LOAD and DUMP commands are not implemented.
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2.1 CPU
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The CPU options include a number of special features and the size of main
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memory. Note that the Modify Address special feature is always included
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when memory size is greater than 4K.
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SET CPU XSA enable advanced programming special feature
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SET CPU NOXSA disable advanced programming
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SET CPU HLE enable high/low/equal special feature
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SET CPU NOHLE disable high/low/equal
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SET CPU BBE enable branch on bit equal special feature
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SET CPU NOBBE disable branch on bit equal
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SET CPU MR enable move record special feature
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SET CPU NOMR disable move record
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SET CPU EPE enable extended print edit special feature
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SET CPU NOEPE disable extended print edit
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SET CPU 4K set memory size = 4K
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SET CPU 8K set memory size = 8K
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SET CPU 12K set memory size = 12K
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SET CPU 16K set memory size = 16K
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If memory size is being reduced, and the memory being truncated contains
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non-zero data, the simulator asks for confirmation. Data in the truncated
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portion of memory is lost. Initially, memory size is 16K, and all special
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features are enabled.
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Memory is implemented as 7 bit BCD characters, as follows:
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6 5 4 3 2 1 0
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word B bit A bit 8 4 2 1
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mark <-- zone --> <-------- digit -------->
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In BCD, the decimal digits 0-9 are (octal) values 012, 001, 002, 003, 004,
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005, 006, 007, 010, 011, respectively. Signs are encoded in the zone bits,
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with 00, 01, and 11 being positive, and 10 being negative.
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CPU registers include the visible state of the processor. The 1401 has no
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interrupt system.
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name size comments
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IS 14 instruction storage address register (PC)
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AS 14 A storage address register
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BS 14 B storage address register
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ASERR 1 AS invalid flag
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BSERR 1 BS invalid flag
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SSA 1 sense switch A
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SSB 1 sense switch B
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SSC 1 sense switch C
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SSD 1 sense switch D
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SSE 1 sense switch E
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SSF 1 sense switch F
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SSG 1 sense switch G
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EQU 1 equal compare indicator
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UNEQ 1 unequal compare indicator
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HIGH 1 high compare indicator
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LOW 1 low compare indicator
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OVF 1 overflow indicator
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IOCHK 1 I/O check switch
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PRCHK 1 process check switch
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OLDIS 1 IS prior to last branch
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WRU 8 interrupt character
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2.2 1402 Card Reader/Punch (CDR, CDP, STKR)
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The IBM 1402 card/reader punch is simulated as three independent devices:
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the card reader (CDR), the card punch (CDP), and the reader and punch
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stackers (STKR). STRK units 0, 1, 2, and 4 correspond to the reader
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normal stacker, reader stacker 1, shared stacker 2/8, and punch stacker
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4, respectively.
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The card reader supports the BOOT command. BOOT CDR reads a card image
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into locations 1-80, sets a word mark under location 1, clears storage,
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and then transfers control to location 1.
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The card reader reads data from disk files, while the punch and stackers
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write data to disk files. Cards are simulated as ASCII text lines with
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terminating newlines; column binary is not supported. For each unit,
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the POS register specifies the number of the next data item to be read or
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written. Thus, by changing POS, the user can backspace or advance these
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devices.
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The reader/punch registers are:
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device name size comments
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CDR LAST 1 last card indicator
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ERR 1 error indicator
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S1 1 stacker 1 select flag
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S2 1 stacker 2 select flag
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POS 31 position
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TIME 24 delay window for stacker select
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BUF[0:79] 8 reader buffer
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CDP ERR 1 error indicator
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S4 1 stacker 4 select flag
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S8 1 stacker 8 select flag
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STKR POS0 31 position, normal reader stack
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POS1 31 position, reader stacker 1
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POS2 31 position, shared stacker 2/8
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POS4 31 position, punch stacker 4
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Error handling is as follows:
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device error processed as
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reader end of file if SSA set, set LAST indicator
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on next Read, report error and stop
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reader,punch not attached report error and stop
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OS I/O error print error message
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if IOCHK set, report error and stop
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otherwise, set ERR indicator
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stacker not attached ignored
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OS I/O error print error message
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if IOCHK set, report error and stop
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2.3 1403 Line Printer (LPT)
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The IBM 1403 line printer (LPT) writes its data, converted to ASCII, to
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a disk file. The line printer supports three different print character
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sets or "chains":
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SET LPT PCF full 64 character chain
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SET LPT PCA 48 character business chain
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SET LPT PCH 48 character FORTRAN chain
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In addition, the line printer can be programmed with a carriage control
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tape. The LOAD command loads a new carriage control tape:
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LOAD <file> load carriage control tape file
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The format of a carriage control tape consists of multiple lines. Each
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line contains an optional repeat count, enclosed in parentheses, optionally
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followed by a series of column numbers separated by commas. Column numbers
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must be between 1 and 12; a column number of zero denotes top of form. The
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following are all legal carriage control specifications:
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<blank line> no punch
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(5) 5 lines with no punches
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1,5,7,8 columns 1, 5, 7, 8 punched
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(10)2 10 lines with column 2 punched
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1,0 column 1 punched; top of form
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The default form is 66 lines long, with column 1 and the top of form mark
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on line 1, and the rest blank.
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The line printer registers are:
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name size comments
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LINES 8 number of newlines after next print
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LFLAG 1 carriage control flag (1 = skip, 0 = space)
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CCTP 8 carriage control tape pointer
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CCTL 8 carriage control tape length (read only)
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ERR 1 error indicator
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POS 31 position
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CCT[0:131] 32 carriage control tape array
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Error handling is as follows:
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error processed as
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not attached report error and stop
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OS I/O error print error message
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if IOCHK set, report error and stop
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otherwise, set ERR indicator
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2.4 1407 Inquiry Terminal (INQ)
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The IBM 1407 inquiry terminal (INQ) is a half-duplex console. It polls
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the console keyboard periodically for inquiry requests. The inquiry
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terminal registers are:
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name size comments
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INQC 7 inquiry request character (initially ESC)
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INR 1 inquiry request indicator
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INC 1 inquiry cleared indicator
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TIME 24 polling interval
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When the 1401 CPU requests input from the keyboard, the message [Enter]
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is printed out, followed by a new line. The CPU hangs waiting for input
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until either the return/enter key is pressed, or the inquiry request
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character is typed in. The latter cancels the type-in and sets INC.
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The inquiry terminal has no errors.
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2.5 729 Magnetic Tape (MT)
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The magnetic tape controller supports six drives, numbered 1 through 6.
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Magnetic tape options include the ability to make units write enabled or
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or write locked.
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SET MTn LOCKED set unit n write locked
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SET MTn ENABLED set unit n write enabled
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Units can also be REMOVEd or ADDed to the configuration. The magnetic
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tape simulator supports the BOOT command. BOOT MT reads the first
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record off tape, starting at location 1, and then branches to it.
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The magnetic tape controller implements these registers:
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name size comments
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END 1 end of file indicator
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ERR 1 error indicator
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PAR 1 parity error indicator
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POS1..6 31 position, drives 1..6
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Error handling is as follows:
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error processed as
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not attached report error and stop
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end of file (read or space) end of physical tape
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(write) ignored
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OS I/O error print error message
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if IOCHK set, report error and stop
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otherwise, set ERR indicator
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2.6 Symbolic Display and Input
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The IBM 1401 simulator implements symbolic display and input. Display is
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controlled by command line switches:
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-c display as single character
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(BCD for CPU and MT, ASCII for others)
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-s display as wordmark terminated BCD string
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(CPU only)
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-m display instruction mnemonics
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(CPU only)
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In a CPU character display, word marks are denoted by ~.
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Input parsing is controlled by the first character typed in or by command
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line switches:
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' or " or -c or -s characters (BCD for CPU and MT, ASCII
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for others)
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alphabetic instruction mnemonic
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numeric octal number
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Instruction input is free format, with spaces separating fields. There
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are six instruction formats: 1, 2, 4, 5, 7, and 8 characters:
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1 character opcode
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2 character opcode 'modifier
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4 character opcode address
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5 character opcode address 'modifier
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7 character opcode address address
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8 character opcode address address 'modifier
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Addresses are always decimal, except for special I/O addresses in the A
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field, which may be specified as %xy, where x denotes the device and y
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the unit number.
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For the CPU, string input may encompass multiple characters. A word mark
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is denoted by ~ and must precede the character to be marked. All other
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devices can only accept single character input, without word marks.
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2.7 Character Sets
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The IBM 1401 used a 6b character code called BCD (binary coded decimal).
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Some of the characters have no equivalent in ASCII and require different
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representations:
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BCD ASCII IBM 1401 print
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code representation character chains
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00 space
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01 1
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02 2
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03 3
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04 4
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05 5
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06 6
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07 7
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10 8
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11 9
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12 0
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13 # = in H chain
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14 @ ' in H chain
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15 : blank in A, H chains
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16 > blank in A, H chains
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17 ( tape mark blank in A, H chains
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20 ^ alternate blank blank in A, H chains
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21 /
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22 S
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23 T
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24 U
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25 V
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26 W
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27 X
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30 Y
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31 Z
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32 ' record mark
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33 ,
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34 % ( in H chain
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35 = word mark blank in A, H chains
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36 \ blank in A, H chains
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37 + blank in A, H chains
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40 -
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41 J
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42 K
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43 L
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44 M
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45 N
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46 O
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47 P
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50 Q
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51 R
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52 !
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53 $
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54 *
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55 ] blank in A, H chains
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56 ; blank in A, H chains
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57 _ delta blank in A, H chains
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60 &
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61 A
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62 B
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63 C
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64 D
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65 E
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66 F
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67 G
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70 H
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71 I
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72 ?
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73 .
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74 ) lozenge
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75 [ blank in A, H chains
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76 < blank in A, H chains
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77 " group mark blank in A, H chains
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