1. New Features 1.1 Directory and documentation - Only common files (SCP and libraries) are in the top level directory. Individual simulator files are in their individual directories. - simh_doc.txt has been split up. simh_doc.txt now documents only SCP. The individual simulators are documented in separate text files in their own directories. - mingw_build.bat is a batch file for the MINGW/gcc environment that will build all the simulators, assuming the root directory structure is at c:\sim. - Makefile is a UNIX make file for the gcc environment that will build all the simulators, assuming the root directory is at c:\sim. 1.2 SCP - DO <file name> executes the SCP commands in the specified file. - Replicated registers in unit structures can now be declared as arrays for examine, modify, save, and restore. Most replicated unit registers (for example, mag tape position registers) have been changed to arrays. - The ADD/REMOVE commands have been replaced by SET unit ONLINE and SET unit OFFLINE, respectively. - Register names that are unique within an entire simulator do not have to be prefaced with the device name. - The ATTACH command can attach files read only, either under user option (-r), or because the attached file is ready only. - The SET/SHOW capabilities have been extended. New forms include: SET <dev> param{=value}{ param ...} SET <unit> param{=value}{ param ...} SHOW <dev> {param param ...} SHOW <unit> {param param ...} - Multiple breakpoints have been implemented. Breakpoints are set/cleared/displayed by: BREAK addr_list{[count]} NOBREAK addr_list SHOW BREAK addr_list 1.3 PDP-11 simulator - Unibus map implemented, with 22b RP controller (URH70) or 18b RP controller (URH11) (in debug). - All DMA peripherals rewritten to use map. - Many peripherals modified for source sharing with VAX. - RQDX3 implemented. - Bugs fixed in RK11 and RL11 write check. 1.4 PDP-10 simulator - ITS 1-proceed implemented. - Bugs fixed in ITS PC sampling and LPMR 1.5 18b PDP simulator - Interrupts split out to multiple levels to allow easier expansion. 1.5 IBM System 3 Simulator - Written by Charles (Dutch) Owen. 1.6 VAX Simulator (in debug) - Simulates MicroVAX 3800 (KA655) with 16MB-64MB memory, RQDX3, RLV12, TSV11, DZV11, LPV11, PCV11. - CDROM capability has been added to the RQDX3, to allow testing with VMS hobbyist images. 1.7 SDS 940 Simulator (not tested) - Simulates SDS 940, 16K-64K memory, fixed and moving head disk, magtape, line printer, console. 1.8 Altair Z80 - Revised from Charles (Dutch) Owen's original by Peter Schorn. - MITS 8080 with full Z80 simulation. - 4K and 8K BASIC packages, Prolog package. 1.9 Interdata The I4 simulator has been withdrawn for major rework. Look for a complete 16b/32b Interdata simulator sometime next year. 2. Release Notes 2.1 SCP SCP now allows replicated registers in unit structures to be modelled as arrays. All replicated register declarations have been replaced by register array declarations. As a result, save files from prior revisions will generate errors after restoring main memory. 2.2 PDP-11 The Unibus map code is in debug. The map was implemented primarily to allow source sharing with the VAX, which requires a DMA map. DMA devices work correctly with the Unibus map disabled. The RQDX3 simulator has run a complete RSTS/E SYSGEN, with multiple drives, and booted the completed system from scratch. 2.3 VAX The VAX simulator will run the boot code up to the >>> prompt. It can successfully process a SHOW DEVICE command. It runs the HCORE instruction diagnostic. It can boot the hobbyist CD through SYSBOOT and through the date/time dialog and restore the hobbyist CD, using standalone backup. On the boot of the restored disk, it gets to the date/time dialog, and then crashes. 2.4 SDS 940 The SDS 940 is untested, awaiting real code. 2.5 GCC Optimization At -O2 and above, GCC does not correctly compile the simulators which use setjmp-longjmp (PDP-11, PDP-10, VAX). A working hypothesis is that optimized state maintained in registers is being used in the setjmp processing routine. On the PDP-11 and PDP-10, all of this state has been either made global, or volatile, to encourage GCC to keep the state up to date in memory. The VAX is still vulnerable. 3. Work list 3.1 SCP - Better ENABLE/DISABLE. 3.2 PDP-11 RQDX3 Software mapped mode, RCT read simulation, VMS debug.
526 lines
16 KiB
Text
526 lines
16 KiB
Text
To: Users
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From: Bob Supnik
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Subj: PDP-10 Simulator Usage
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Date: 1-Dec-01
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COPYRIGHT NOTICE
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The following copyright notice applies to both the SIMH source and binary:
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Original code published in 1993-2001, written by Robert M Supnik
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Copyright (c) 1993-2001, Robert M Supnik
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Permission is hereby granted, free of charge, to any person obtaining a
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copy of this software and associated documentation files (the "Software"),
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to deal in the Software without restriction, including without limitation
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the rights to use, copy, modify, merge, publish, distribute, sublicense,
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and/or sell copies of the Software, and to permit persons to whom the
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Software is furnished to do so, subject to the following conditions:
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The above copyright notice and this permission notice shall be included in
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all copies or substantial portions of the Software.
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THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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ROBERT M SUPNIK BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
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IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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Except as contained in this notice, the name of Robert M Supnik shall not
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be used in advertising or otherwise to promote the sale, use or other dealings
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in this Software without prior written authorization from Robert M Supnik.
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This memorandum documents the PDP-10 simulator.
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1. Simulator Files
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To compile the PDP-10, you must define USE_INT64 as part of the compilation
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command line.
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sim/ sim_defs.h
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sim_sock.h
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sim_tmxr.h
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dec_dz.h
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scp.c
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scp_tty.c
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sim_rev.c
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sim_sock.c
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sim_tmxr.c
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sim/pdp10/ pdp10_defs.h
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pdp10_cpu.c
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pdp10_dz.c
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pdp10_fe.c
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pdp10_ksio.c
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pdp10_lp20.c
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pdp10_mdfp.c
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pdp10_pag.c
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pdp10_pt.c
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pdp10_rp.c
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pdp10_sys.c
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pdp10_tu.c
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pdp10_xtnd.c
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2. PDP-10 Features
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The PDP-10 simulator is configured as follows:
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device simulates
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name(s)
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CPU KS10 CPU with 1MW of memory
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PAG paging unit (translation maps)
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UBA Unibus adapters (translation maps)
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FE console
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TIM timer
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PTR,PTP PC11 paper tape reader/punch
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DZ DZ11 8-line terminal multiplexor
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LP20 LP20 line printer
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RP RH11/RP04/RP05/RP06/RP07/RM03/RM05/RM80 controller with
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eight drives
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TU RH11/TM02/TU45 controller with eight drives
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The PTR/PTP are initially DISABLEd. The DZ11 can also be DISABLEd.
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The PDP-10 simulator implements several unique stop condition:
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- illegal instruction (000) in kernel mode
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- indirect addressing nesting exceeds limit
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- execute chaining exceeds limit
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- page fail or other error in interrupt sequence
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- illegal instruction in interrupt sequence
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- invalid vector pointer in interrupt sequence
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- invalid Unibus adapter number
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- non-existent exec or user page table address
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The PDP-10 loader supports RIM10B format paper tapes, SAV binary files, and
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EXE binary files. LOAD switches -r, -s, -e specify RIM10, SAV, EXE format,
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respectively. If no switch is specified, the LOAD command checks the file
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extension; .RIM, .SAV, .EXE specify RIM10, SAV, EXE format, respectively.
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If no switch specified, and no extension matches, the LOAD command checks
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the file format to try to determine the file type.
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2.1 CPU
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The CPU options allow the user to specify standard microcode, standard
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microcode with a bug fix for a boostrap problem in TOPS-20 V4.1, or ITS
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microcode
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SET CPU STANDARD Standard microcode
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SET CPU TOPS20V41 Standard microcode with TOPS-20 V4.1 bug fix
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SET CPU ITS ITS compatible microcode
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CPU registers include the visible state of the processor as well as the
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control registers for the interrupt system.
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name size comments
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PC 18 program counter
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FLAGS 18 processor flags (<13:17> unused)
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AC0..AC17 36 accumulators
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IR 36 instruction register
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EBR 18 executive base register
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PGON 1 paging enabled flag
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T20P 1 TOPS-20 paging
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UBR 18 user base register
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CURAC 3 current AC block
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PRVAC 3 previous AC block
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SPT 36 shared pointer table
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CST 36 core status table
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PUR 36 process update register
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CSTM 36 CST mask
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HSB 18 halt status block address
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DBR1 18 descriptor base register 1 (ITS)
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DBR2 18 descriptor base register 2 (ITS)
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DBR3 18 descriptor base register 3 (ITS)
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DBR4 18 descriptor base register 4 (ITS)
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PIENB 7 PI levels enabled
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PIACT 7 PI levels active
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PIPRQ 7 PI levels with program requests
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PIIOQ 7 PI levels with IO requests
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PIAPR 7 PI levels with APR requests
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APRENB 8 APR flags enabled
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APRFLG 8 APR flags active
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APRLVL 3 PI level for APR interrupt
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IND_MAX 8 indirect address nesting limit
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XCT_MAX 8 execute chaining limit
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OLDPC 18 PC prior to last transfer instruction
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WRU 8 interrupt character
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REG[0:127] 36 fast memory blocks
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2.2 Pager
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The pager contains the page maps for executive and user mode. The
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executive page map is the memory space for unit 0, the user page map the
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memory space for unit 1. A page map entry is 32 bits wide and has the
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following format:
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bit content
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--- -------
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31 page is writeable
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30 entry is valid
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29:19 mbz
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18:9 physical page base address
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8:0 mbz
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The pager has no registers.
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2.3 Unibus Adapters
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The Unibus adapters link the system I/O devices to the CPU. Unibus
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adapter 1 (UBA1) is unit 0, and Unibus adapter 3 is unit 1. The
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adapter's Unibus map is the memory space of the corresponding unit.
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The Unibus Adapter has the following registers:
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name size comments
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INTREQ 32 interrupt requests
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UB1CS 16 Unibus adapter 1 control/status
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UB3CS 16 Unibus adapter 3 control/status
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2.4 Front End (FE)
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The front end is the system console. The keyboard input is unit 0,
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the console output is unit 1. It supports two options:
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SET FE STOP halts the PDP-10 operating system
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SET FE CTLC simulates typing ^C (for Windoze)
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The front end has the following registers:
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name size comments
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IBUF 8 input buffer
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ICOUNT 31 count of input characters
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ITIME 24 keyboard polling interval
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OBUF 8 output buffer
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OCOUNT 31 count of output characters
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OTIME 24 console output response time
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2.5 Timer (TIM)
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The timer (TIM) implements the system timer, the interval timer, and
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the time of day clock used to get the date and time at system startup.
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Because most PDP-10 software is not Y2K compliant, the timer implements
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one option
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SET TIM NOY2K software not Y2K compliant, limit time
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of day clock to 1999 (default)
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SET TIM Y2K software is Y2K compliant
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The timer has the following registers:
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name size comments
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TIMBASE 59 time base (double precision)
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TTG 36 time to go (remaining time) for interval
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PERIOD 36 reset value for interval
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QUANT 36 quantum timer (ITS only)
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TIME 24 tick delay
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DIAG 1 use fixed tick delay instead of autocalibration
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Unless the DIAG flag is set, the timer autocalibrates; the tick delay
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is adjusted up or down so that the time base tracks actual elapsed time.
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This may cause time-dependent diagnostics to report errors.
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2.6 PC11 Paper Tape Reader (PTR)
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The paper tape reader (PTR) reads data from a disk file. The POS
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register specifies the number of the next data item to be read. Thus,
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by changing POS, the user can backspace or advance the reader.
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The paper tape reader implements these registers:
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name size comments
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BUF 8 last data item processed
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CSR 16 control/status register
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INT 1 interrupt pending flag
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ERR 1 error flag (CSR<15>)
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BUSY 1 busy flag (CSR<11>)
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DONE 1 device done flag (CSR<7>)
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IE 1 interrupt enable flag (CSR<6>)
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POS 31 position in the input file
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TIME 24 time from I/O initiation to interrupt
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STOP_IOE 1 stop on I/O error
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Error handling is as follows:
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error STOP_IOE processed as
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not attached 1 report error and stop
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0 out of tape
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end of file 1 report error and stop
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0 out of tape
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OS I/O error x report error and stop
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2.7 PC11 Paper Tape Punch (PTP)
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The paper tape punch (PTP) writes data to a disk file. The POS
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register specifies the number of the next data item to be written.
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Thus, by by changing POS, the user can backspace or advance the punch.
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The paper tape punch implements these registers:
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name size comments
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BUF 8 last data item processed
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CSR 16 control/status register
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INT 1 interrupt pending flag
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ERR 1 error flag (CSR<15>)
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DONE 1 device done flag (CSR<7>)
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IE 1 interrupt enable flag (CSR<6>)
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POS 31 position in the input or output file
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TIME 24 time from I/O initiation to interrupt
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STOP_IOE 1 stop on I/O error
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Error handling is as follows:
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error STOP_IOE processed as
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not attached 1 report error and stop
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0 out of tape
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OS I/O error x report error and stop
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2.8 DZ11 Terminal Multiplexor (DZ)
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The DZ11 is an 8-line terminal multiplexor. The terminal lines perform
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input and output through Telnet sessions connected to a user-specified
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port. The ATTACH command specifies the port to be used:
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ATTACH {-am} DZ <port>(cr) -- set up listening port
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where port is a decimal number between 1 and 65535 that is not being used
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for other TCP/IP activities. The optional switch -m turns on the DZ11's
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modem controls; the optional switch -a turns on active disconnects
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(disconnect session if computer clears Data Terminal Ready).
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Once the DZ is attached and the simulator is running, the DZ will listen
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for connections on the specified port. It assumes that the incoming
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connections are Telnet connections. The connection remains open until
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disconnected either by the simulated program or by the Telnet client.
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The SHOW DZ LINESTATUS command displays the current connections to the DZ.
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The DZ11 implements these registers:
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name size comments
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CSR 16 control/status register
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RBUF 16 receive buffer
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LPR 16 line parameter register
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TCR 16 transmission control register
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MSR 16 modem status register
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TDR 16 transmit data register
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SAENB 1 silo alarm enabled
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MDMTCL 1 modem control enabled
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AUTODS 1 autodisconnect enabled
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RPOS0..7 32 count of characters received
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TPOS0..7 32 count of characters transmitted
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The DZ11 does not support save and restore. All open connections are
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lost when the simulator shuts down or the DZ is detached.
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2.9 RH11 Adapter, RM02/03/05/80, RP04/05/06/07 drives (RP)
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The RP controller implements the Massbus 18b (RH11) direct interface for
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large disk drives. It is more abstract than other device simulators, with
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just enough detail to run operating system drivers. In addition, the RP
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controller conflates the details of the RM series controllers with the RP
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series controllers, although there were detailed differences.
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RP options include the ability to set units write enabled or write locked,
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to set the drive type to one of six disk types, or autosize:
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SET RPn LOCKED set unit n write locked
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SET RPn ENABLED set unit n write enabled
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SET RPn RM03 set type to RM03
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SET RPn RM05 set type to RM05
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SET RPn RM80 set type to RM80
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SET RPn RP04 set type to RP04
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SET RPn RP06 set type to RP06
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SET RPn RP07 set type to RP07
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SET RPn AUTOSIZE set type based on file size at attach
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The type options can be used only when a unit is not attached to a file.
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Note that TOPS-10 V7.03 only supported the RP06 and RM03; V7.04 added
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support for the RP07. Units can be REMOVEd or ADDed to the configuration.
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The RP controller implements these registers:
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name size comments
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RPCS1 16 control/status 1
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RPWC 16 word count
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RPBA 16 bus address
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RPDA 16 desired surface, sector
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RPCS2 16 control/status 2
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RPDS[0:7] 16 drive status, drives 0-7
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RPER1[0:7] 16 drive errors, drives 0-7
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RPOF 16 offset
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RPDC 8 desired cylinder
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RPER2 16 error status 2
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RPER3 16 error status 3
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RPEC1 16 ECC syndrome 1
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RPEC2 16 ECC syndrome 2
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RPMR 16 maintenance register
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RPDB 16 data buffer
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IFF 1 transfer complete interrupt request flop
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INT 1 interrupt pending flag
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SC 1 special condition (CSR1<15>)
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DONE 1 device done flag (CSR1<7>)
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IE 1 interrupt enable flag (CSR1<6>)
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STIME 24 seek time, per cylinder
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RTIME 24 rotational delay
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STOP_IOE 1 stop on I/O error
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Error handling is as follows:
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error STOP_IOE processed as
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not attached 1 report error and stop
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0 disk not ready
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end of file x assume rest of disk is zero
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OS I/O error x report error and stop
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2.10 RH11 Adapter, TM02 Formatter, TU45 Magnetic Tape (TU)
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The magnetic tape simulator simulates an RH11 Massbus adapter with one
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TM02 formatter and up to eight TU45 drives. Magnetic tape options include
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the ability to make units write enabled or locked.
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SET TUn LOCKED set unit n write locked
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SET TUn ENABLED set unit n write enabled
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Units can also be REMOVEd or ADDed to the configuration.
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The magnetic tape controller implements these registers:
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name size comments
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MTCS1 16 control/status 1
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MTBA 16 memory address
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MTWC 16 word count
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MTFC 16 frame count
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MTCS2 16 control/status 2
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MTFS 16 formatter status
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MTER 16 error status
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MTCC 16 check character
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MTDB 16 data buffer
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MTMR 16 maintenance register
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MTTC 16 tape control register
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INT 1 interrupt pending flag
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DONE 1 device done flag
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IE 1 interrupt enable flag
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STOP_IOE 1 stop on I/O error
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TIME 24 delay
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UST[0:7] 16 unit status, units 0-7
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POS[0:7] 31 position, units 0-7
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Error handling is as follows:
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error processed as
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not attached tape not ready
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end of file (read or space) end of physical tape
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(write) ignored
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OS I/O error report error and stop
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2.11 LP20 DMA Line Printer (LP20)
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The LP20 is a DMA-based line printer controller. There is one
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line printer option to clear the vertical forms unit (VFU).
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SET LP20 VFUCLEAR clear the vertical forms unit
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The LP20 implements these registers:
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name size comments
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LPCSA 16 control/status register A
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LPCSB 16 control/status register B
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LPBA 16 bus address register
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LPBC 12 byte count register
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LPPAGC 12 page count register
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LPRDAT 12 RAM data register
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LPCBUF 8 character buffer register
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LPCOLC 8 column counter register
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LPPDAT 8 printer data register
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LPCSUM 8 checksum register
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DVPTR 7 vertical forms unit pointer
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DVLNT 7 vertical forms unit length
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INT 1 interrupt request
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ERR 1 error flag
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DONE 1 done flag
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IE 1 interrupt enable flag
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POS 31 position in output file
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TIME 24 response time
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STOP_IOE 1 stop on I/O error
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TXRAM[0:255] 12 translation RAM
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DAVFU[0:142] 12 vertical forms unit array
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Error handling is as follows:
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error STOP_IOE processed as
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not attached 1 report error and stop
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0 out of paper
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OS I/O error x report error and stop
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2.12 Symbolic Display and Input
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The PDP-10 simulator implements symbolic display and input. Display is
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controlled by command line switches:
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-a display as ASCII character
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-c display as (sixbit) character string
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-p display as packed (seven bit) string
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-m display instruction mnemonics
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-v interpret address as virtual
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-e force executive mode
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-u force user mode
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Input parsing is controlled by the first character typed in or by command
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line switches:
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' or -a ASCII character
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" or -c sixbit string
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# or -p packed seven bit string
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alphabetic instruction mnemonic
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numeric octal number
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Instruction input uses standard PDP-10 assembler syntax. There are three
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instruction classes: memory reference, memory reference with AC, and I/O.
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Memory reference instructions have the format
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memref {@}address{(index)}
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memory reference with AC instructions have the format
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memac ac,{@}address{(index)}
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and I/O instructions have the format
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io device,{@}address{(index)}
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where @ signifies indirect. The address is a signed octal number in the
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range 0 - 0777777. The ac and index are unsigned octal numbers in the
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range 0-17. The device is either a recognized device mnemonic (APR, PI,
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TIM) or an octal number in the range 0 - 0177.
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The simulator recognizes the standard MACRO alternate mnemonics (CLEAR
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for SETZ, OR for IORI), the individual definitions for JRST and JFCL
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variants, and the extended instruction mnemonics.
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