701f0fe028
1. New Features
1.1 Directory and documentation
- Only common files (SCP and libraries) are in the top level
directory. Individual simulator files are in their individual
directories.
- simh_doc.txt has been split up. simh_doc.txt now documents
only SCP. The individual simulators are documented in separate
text files in their own directories.
- mingw_build.bat is a batch file for the MINGW/gcc environment
that will build all the simulators, assuming the root directory
structure is at c:\sim.
- Makefile is a UNIX make file for the gcc environment that will
build all the simulators, assuming the root directory is at
c:\sim.
1.2 SCP
- DO <file name> executes the SCP commands in the specified file.
- Replicated registers in unit structures can now be declared as
arrays for examine, modify, save, and restore. Most replicated
unit registers (for example, mag tape position registers) have
been changed to arrays.
- The ADD/REMOVE commands have been replaced by SET unit ONLINE
and SET unit OFFLINE, respectively.
- Register names that are unique within an entire simulator do
not have to be prefaced with the device name.
- The ATTACH command can attach files read only, either under
user option (-r), or because the attached file is ready only.
- The SET/SHOW capabilities have been extended. New forms include:
SET <dev> param{=value}{ param ...}
SET <unit> param{=value}{ param ...}
SHOW <dev> {param param ...}
SHOW <unit> {param param ...}
- Multiple breakpoints have been implemented. Breakpoints are
set/cleared/displayed by:
BREAK addr_list{[count]}
NOBREAK addr_list
SHOW BREAK addr_list
1.3 PDP-11 simulator
- Unibus map implemented, with 22b RP controller (URH70) or 18b
RP controller (URH11) (in debug).
- All DMA peripherals rewritten to use map.
- Many peripherals modified for source sharing with VAX.
- RQDX3 implemented.
- Bugs fixed in RK11 and RL11 write check.
1.4 PDP-10 simulator
- ITS 1-proceed implemented.
- Bugs fixed in ITS PC sampling and LPMR
1.5 18b PDP simulator
- Interrupts split out to multiple levels to allow easier
expansion.
1.5 IBM System 3 Simulator
- Written by Charles (Dutch) Owen.
1.6 VAX Simulator (in debug)
- Simulates MicroVAX 3800 (KA655) with 16MB-64MB memory, RQDX3,
RLV12, TSV11, DZV11, LPV11, PCV11.
- CDROM capability has been added to the RQDX3, to allow testing
with VMS hobbyist images.
1.7 SDS 940 Simulator (not tested)
- Simulates SDS 940, 16K-64K memory, fixed and moving head
disk, magtape, line printer, console.
1.8 Altair Z80
- Revised from Charles (Dutch) Owen's original by Peter Schorn.
- MITS 8080 with full Z80 simulation.
- 4K and 8K BASIC packages, Prolog package.
1.9 Interdata
The I4 simulator has been withdrawn for major rework. Look for
a complete 16b/32b Interdata simulator sometime next year.
2. Release Notes
2.1 SCP
SCP now allows replicated registers in unit structures to be
modelled as arrays. All replicated register declarations have
been replaced by register array declarations. As a result,
save files from prior revisions will generate errors after
restoring main memory.
2.2 PDP-11
The Unibus map code is in debug. The map was implemented primarily
to allow source sharing with the VAX, which requires a DMA map.
DMA devices work correctly with the Unibus map disabled.
The RQDX3 simulator has run a complete RSTS/E SYSGEN, with multiple
drives, and booted the completed system from scratch.
2.3 VAX
The VAX simulator will run the boot code up to the >>> prompt. It
can successfully process a SHOW DEVICE command. It runs the HCORE
instruction diagnostic. It can boot the hobbyist CD through SYSBOOT
and through the date/time dialog and restore the hobbyist CD, using
standalone backup. On the boot of the restored disk, it gets to the
date/time dialog, and then crashes.
2.4 SDS 940
The SDS 940 is untested, awaiting real code.
2.5 GCC Optimization
At -O2 and above, GCC does not correctly compile the simulators which
use setjmp-longjmp (PDP-11, PDP-10, VAX). A working hypothesis is
that optimized state maintained in registers is being used in the
setjmp processing routine. On the PDP-11 and PDP-10, all of this
state has been either made global, or volatile, to encourage GCC to
keep the state up to date in memory. The VAX is still vulnerable.
3. Work list
3.1 SCP
- Better ENABLE/DISABLE.
3.2 PDP-11 RQDX3
Software mapped mode, RCT read simulation, VMS debug.
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Text
To: Users
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From: Bob Supnik
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Subj: PDP-11 Simulator Usage
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Date: 1-Dec-01
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COPYRIGHT NOTICE
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The following copyright notice applies to both the SIMH source and binary:
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Original code published in 1993-2001, written by Robert M Supnik
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Copyright (c) 1993-2001, Robert M Supnik
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Permission is hereby granted, free of charge, to any person obtaining a
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copy of this software and associated documentation files (the "Software"),
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to deal in the Software without restriction, including without limitation
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the rights to use, copy, modify, merge, publish, distribute, sublicense,
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and/or sell copies of the Software, and to permit persons to whom the
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Software is furnished to do so, subject to the following conditions:
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The above copyright notice and this permission notice shall be included in
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all copies or substantial portions of the Software.
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THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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ROBERT M SUPNIK BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
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IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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Except as contained in this notice, the name of Robert M Supnik shall not
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be used in advertising or otherwise to promote the sale, use or other dealings
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in this Software without prior written authorization from Robert M Supnik.
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This memorandum documents the PDP-11 simulator.
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1. Simulator Files
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sim/ sim_defs.h
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sim_sock.h
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sim_tmxr.h
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dec_dz.h
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dec_mscp.h
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dec_uqssp.h
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scp.c
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scp_tty.c
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sim_rev.c
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sim_sock.c
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sim_tmxr.c
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sim/pdp11/ pdp11_defs.h
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pdp11_cpu.c
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pdp11_dz.c
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pdp11_fp.c
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pdp11_io.c
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pdp11_lp.c
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pdp11_rk.c
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pdp11_rl.c
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pdp11_rp.c
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pdp11_rq.c
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pdp11_rx.c
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pdp11_stddev.c
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pdp11_sys.c
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pdp11_tc.c
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pdp11_tm.c
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pdp11_ts.c
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2. PDP-11 Features
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The PDP-11 simulator is configured as follows:
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device simulates
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name(s)
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CPU J-11 CPU with 256KB of memory
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- FP11 floating point unit (FPA)
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- CIS11 commercial instruction set (CIS, off by default)
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PTR,PTP PC11 paper tape reader/punch
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TTI,TTO DL11 console terminal
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LPT LP11 line printer
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CLK line frequency clock
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DZ DZ11 8-line terminal multiplexor
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RK RK11/RK05 cartridge disk controller with eight drives
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RL RLV12/RL01(2) cartridge disk controller with four drives
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RP RM02/03/05/80, RP04/05/06/07 Massbus style controller
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with eight drives
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RQ RQDX3 MSCP controller with four drives
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RX RX11/RX01 floppy disk controller with two drives
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TC TC11/TU56 DECtape controller with eight drives
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TM TM11/TU10 magnetic tape controller with eight drives
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TS TS11/TSV05 magnetic tape controller with one drive
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The DZ, RK, RL, RP, RQ, RX, TC, TM, and TS devices can be DISABLEd. The
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PDP-11 can support either a TM11 or a TS11, but not both, since they use
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the same I/O addresses. The simulator defaults to the TM11. To change
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the magtape,
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ENABLE TM11 enable TM11 and disable TS11
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ENABLE TS11 enable TS11 and disable TM11
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The PDP-11 simulator implements several unique stop conditions:
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- abort during exception vector fetch, and register STOP_VEC is set
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- abort during exception stack push, and register STOP_SPA is set
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- trap condition 'n' occurs, and register STOP_TRAP<n> is set
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- wait state entered, and no I/O operations outstanding
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(ie, no interrupt can ever occur)
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The PDP-11 loader supports standard binary format tapes. The DUMP command
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is not implemented.
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2.1 CPU
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The CPU options include CPU mapping configuration (18b Unibus, 22b Unibus
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with RH70-style controllers, 22b Unibus with RH11 style controllers, and
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22b Qbus), the CIS instruction set, and the size of main memory.
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SET CPU 18B 18b addressing, no I/O map
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SET CPU URH11 22b addresssing, Unibus I/O map,
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18b mapped RH11 controller
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SET CPU URH70 22b addressing, Unibus I/O map,
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22b unmapped RH70 controller
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SET CPU 22B 22b addressing, no I/O map (Qbus)
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SET CPU NOCIS disable CIS instructions (default)
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SET CPU CIS enable CIS instructions
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SET CPU 16K set memory size = 16KB
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SET CPU 32K set memory size = 32KB
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SET CPU 48K set memory size = 48KB
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SET CPU 64K set memory size = 64KB
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SET CPU 96K set memory size = 96KB
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SET CPU 128K set memory size = 128KB
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SET CPU 192K set memory size = 192KB
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SET CPU 256K set memory size = 256KB
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SET CPU 384K set memory size = 384KB
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SET CPU 512K set memory size = 512KB
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SET CPU 768K set memory size = 768KB
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SET CPU 1024K (or 1M) set memory size = 1024KB
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SET CPU 2048K (or 2M) set memory size = 2048KB
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SET CPU 3072K (or 3M) set memory size = 3072KB
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SET CPU 4096K (or 4M) set memory size = 4096KB
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If memory size is being reduced, and the memory being truncated contains
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non-zero data, the simulator asks for confirmation. Data in the truncated
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portion of memory is lost. Initial memory size is 256KB.
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These switches are recognized when examining or depositing in CPU memory:
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-v interpret address as virtual
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-d if mem mgt enabled, force data space
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-k if mem mgt enabled, force kernel mode
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-s if mem mgt enabled, force supervisor mode
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-u if mem mgt enabled, force user mode
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-p if mem mgt enabled, force previous mode
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CPU registers include the visible state of the processor as well as the
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control registers for the interrupt system.
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name size comments
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PC 16 program counter
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R0..R5 16 R0..R5, first register set
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R10..R15 16 R0..R5, second register set
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KSP 16 kernel stack pointer
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SSP 16 supervisor stack pointer
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USP 16 user stack pointer
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PSW 16 processor status word
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CM 2 current mode, PSW<15:14>
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PM 2 previous mode, PSW<13:12>
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RS 2 register set, PSW<11>
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IPL 3 interrupt priority level, PSW<7:5>
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T 1 trace bit, PSW<4>
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N 1 negative flag, PSW<3>
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Z 1 zero flag, PSW<2>
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V 1 overflow flag, PSW<1>
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C 1 carry flag, PSW<0>
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SR 16 front panel switches
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DR 16 front panel display
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MEMERR 16 memory error register
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CCR 16 cache control register
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MAINT 16 maintenance register
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HITMISS 16 hit/miss register
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CPUERR 16 CPU error register
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PIRQ 16 programmed interrupt requests
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FAC0H..FAC5H 32 FAC0..FAC5, high 32 bits
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FAC0L..FAC5L 32 FAC0..FAC5, low 32 bits
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FPS 16 floating point status
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FEA 16 floating exception address
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FEC 4 floating exception code
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MMR0..3 16 memory management registers 0..3
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{K/S/U}{I/D}{PAR/PDR}{0..7}
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16 memory management registers
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UBMAP[0:63] 16 Unibus map registers
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INT 32 interrupt pending flags
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TRAP 18 trap pending flags
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WAIT 0 wait state flag
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WAIT_ENABLE 0 wait state enable flag
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STOP_TRAPS 18 stop on trap flags
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STOP_VECA 1 stop on read abort in trap or interrupt
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STOP_SPA 1 stop on stack push abort in trap or interrupt
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OLDPC 16 PC prior to last JMP, JMS, or interrupt
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WRU 8 interrupt character
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2.2 Programmed I/O Devices
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2.2.1 PC11 Paper Tape Reader (PTR)
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The paper tape reader (PTR) reads data from a disk file. The POS
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register specifies the number of the next data item to be read. Thus,
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by changing POS, the user can backspace or advance the reader.
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The paper tape reader implements these registers:
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name size comments
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BUF 8 last data item processed
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CSR 16 control/status register
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INT 1 interrupt pending flag
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ERR 1 error flag (CSR<15>)
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BUSY 1 busy flag (CSR<11>)
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DONE 1 device done flag (CSR<7>)
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IE 1 interrupt enable flag (CSR<6>)
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POS 31 position in the input file
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TIME 24 time from I/O initiation to interrupt
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STOP_IOE 1 stop on I/O error
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Error handling is as follows:
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error STOP_IOE processed as
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not attached 1 report error and stop
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0 out of tape
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end of file 1 report error and stop
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0 out of tape
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OS I/O error x report error and stop
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2.2.2 PC11 Paper Tape Punch (PTP)
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The paper tape punch (PTP) writes data to a disk file. The POS
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register specifies the number of the next data item to be written.
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Thus, by by changing POS, the user can backspace or advance the punch.
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The paper tape punch implements these registers:
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name size comments
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BUF 8 last data item processed
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CSR 16 control/status register
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INT 1 interrupt pending flag
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ERR 1 error flag (CSR<15>)
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DONE 1 device done flag (CSR<7>)
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IE 1 interrupt enable flag (CSR<6>)
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POS 31 position in the output file
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TIME 24 time from I/O initiation to interrupt
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STOP_IOE 1 stop on I/O error
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Error handling is as follows:
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error STOP_IOE processed as
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not attached 1 report error and stop
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0 out of tape
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OS I/O error x report error and stop
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2.2.3 DL11 Terminal Input (TTI)
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The terminal input (TTI) polls the console keyboard for input. It
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implements these registers:
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name size comments
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BUF 8 last data item processed
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CSR 16 control/status register
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INT 1 interrupt pending flag
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ERR 1 error flag (CSR<15>)
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DONE 1 device done flag (CSR<7>)
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IE 1 interrupt enable flag (CSR<6>)
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POS 31 number of characters input
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TIME 24 keyboard polling interval
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2.2.4 DL11 Terminal Output (TTO)
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The terminal output (TTO) writes to the simulator console window. It
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implements these registers:
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name size comments
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BUF 8 last data item processed
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CSR 16 control/status register
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INT 1 interrupt pending flag
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ERR 1 error flag (CSR<15>)
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DONE 1 device done flag (CSR<7>)
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IE 1 interrupt enable flag (CSR<6>)
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POS 31 number of characters input
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TIME 24 time from I/O initiation to interrupt
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2.2.5 LP11 Line Printer (LPT)
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The line printer (LPT) writes data to a disk file. The POS register
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specifies the number of the next data item to be written. Thus,
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by changing POS, the user can backspace or advance the printer.
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The line printer implements these registers:
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name size comments
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BUF 8 last data item processed
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CSR 16 control/status register
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INT 1 interrupt pending flag
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ERR 1 error flag (CSR<15>)
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DONE 1 device done flag (CSR<7>)
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IE 1 interrupt enable flag (CSR<6>)
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POS 31 position in the output file
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TIME 24 time from I/O initiation to interrupt
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STOP_IOE 1 stop on I/O error
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Error handling is as follows:
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error STOP_IOE processed as
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not attached 1 report error and stop
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0 out of paper
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OS I/O error x report error and stop
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2.2.6 Line-Time Clock (CLK)
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The clock (CLK) implements these registers:
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name size comments
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CSR 16 control/status register
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INT 1 interrupt pending flag
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DONE 1 device done flag (CSR<7>)
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IE 1 interrupt enable flag (CSR<6>)
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TIME 24 clock frequency
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TPS 8 ticks per second (60 or 50)
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The real-time clock autocalibrates; the clock interval is adjusted up or
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down so that the clock tracks actual elapsed time.
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2.2.7 DZ11 Terminal Multiplexor (DZ)
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The DZ11 is an 8-line terminal multiplexor. The terminal lines perform
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input and output through Telnet sessions connected to a user-specified
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port. The ATTACH command specifies the port to be used:
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ATTACH {-am} DZ <port>(cr) -- set up listening port
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where port is a decimal number between 1 and 65535 that is not being used
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for other TCP/IP activities. The optional switch -m turns on the DZ11's
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modem controls; the optional switch -a turns on active disconnects
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(disconnect session if computer clears Data Terminal Ready).
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Once the DZ is attached and the simulator is running, the DZ will listen
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for connections on the specified port. It assumes that the incoming
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connections are Telnet connections. The connection remains open until
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disconnected either by the simulated program or by the Telnet client.
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The SHOW DZ LINESTATUS command displays the current connections to the DZ.
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The DZ11 implements these registers:
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name size comments
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CSR 16 control/status register
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RBUF 16 receive buffer
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LPR 16 line parameter register
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TCR 16 transmission control register
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MSR 16 modem status register
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TDR 16 transmit data register
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SAENB 1 silo alarm enabled
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MDMTCL 1 modem control enabled
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AUTODS 1 autodisconnect enabled
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RPOS0..7 32 count of characters received
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TPOS0..7 32 count of characters transmitted
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The DZ11 does not support save and restore. All open connections are
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lost when the simulator shuts down or the DZ is detached.
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2.3 RK11/RK05 Cartridge Disk (RK)
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RK11 options include the ability to make units write enabled or write locked:
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SET RKn LOCKED set unit n write locked
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SET RKn ENABLED set unit n write enabled
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Units can also be REMOVEd or ADDed to the configuration. The RK11 supports
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the BOOT command.
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The RK11 implements these registers:
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name size comments
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RKCS 16 control/status
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RKDA 16 disk address
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RKBA 16 memory address
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RKWC 16 word count
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RKDS 16 drive status
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RKER 16 error status
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INTQ 9 interrupt queue
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DRVN 3 number of last selected drive
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INT 1 interrupt pending flag
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ERR 1 error flag (CSR<15>)
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DONE 1 device done flag (CSR<7>)
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IE 1 interrupt enable flag (CSR<6>)
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INT 1 interrupt pending flag
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STIME 24 seek time, per cylinder
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RTIME 24 rotational delay
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STOP_IOE 1 stop on I/O error
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Error handling is as follows:
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error STOP_IOE processed as
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not attached 1 report error and stop
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0 disk not ready
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end of file x assume rest of disk is zero
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OS I/O error x report error and stop
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2.4 RX11/RX01 Floppy Disk (RX)
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RX11 options include the ability to make units write enabled or write locked:
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SET RXn LOCKED set unit n write locked
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SET RXn ENABLED set unit n write enabled
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The RX11 supports the BOOT command.
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The RX11 implements these registers:
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name size comments
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RXCS 12 status
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RXDB 8 data buffer
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RXES 8 error status
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RXERR 8 error code
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RXTA 8 current track
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RXSA 8 current sector
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STAPTR 3 controller state
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BUFPTR 3 buffer pointer
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INT 1 interrupt pending flag
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ERR 1 error flag (CSR<15>)
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TR 1 transfer ready flag (CSR<7>)
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IE 1 interrupt enable flag (CSR<6>)
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DONE 1 device done flag (CSR<5>)
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CTIME 24 command completion time
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STIME 24 seek time, per track
|
|
XTIME 24 transfer ready delay
|
|
STOP_IOE 1 stop on I/O error
|
|
SBUF[0:127] 8 sector buffer array
|
|
|
|
Error handling is as follows:
|
|
|
|
error STOP_IOE processed as
|
|
|
|
not attached 1 report error and stop
|
|
0 disk not ready
|
|
|
|
RX01 data files are buffered in memory; therefore, end of file and OS
|
|
I/O errors cannot occur.
|
|
|
|
2.5 RL11(V12)/RL01,RL02 Cartridge Disk (RL)
|
|
|
|
RL11 options include the ability to set units write enabled or write locked,
|
|
to set the drive size to RL01, RL02, or autosize, and to write a DEC standard
|
|
044 compliant bad block table on the last track:
|
|
|
|
SET RLn LOCKED set unit n write locked
|
|
SET RLn ENABLED set unit n write enabled
|
|
SET RLn RL01 set size to RL01
|
|
SET RLn RL02 set size to RL02
|
|
SET RLn AUTOSIZE set size based on file size at attach
|
|
SET RLn BADBLOCK write bad block table on last track
|
|
|
|
The size options can be used only when a unit is not attached to a file. The
|
|
bad block option can be used only when a unit is attached to a file. Units
|
|
can also be REMOVEd or ADDed to the configuration. The RL11 supports the
|
|
BOOT command.
|
|
|
|
The RL11 implements these registers:
|
|
|
|
name size comments
|
|
|
|
RLCS 16 control/status
|
|
RLDA 16 disk address
|
|
RLBA 16 memory address
|
|
RLBAE 6 memory address extension (RLV12)
|
|
RLMP..RLMP2 16 multipurpose register queue
|
|
INT 1 interrupt pending flag
|
|
ERR 1 error flag (CSR<15>)
|
|
DONE 1 device done flag (CSR<7>)
|
|
IE 1 interrupt enable flag (CSR<6>)
|
|
STIME 24 seek time, per cylinder
|
|
RTIME 24 rotational delay
|
|
STOP_IOE 1 stop on I/O error
|
|
|
|
Error handling is as follows:
|
|
|
|
error STOP_IOE processed as
|
|
|
|
not attached 1 report error and stop
|
|
0 disk not ready
|
|
|
|
end of file x assume rest of disk is zero
|
|
|
|
OS I/O error x report error and stop
|
|
|
|
2.6 RM02/03/05/80, RP04/05/06/07 Disk Pack Drives (RP)
|
|
|
|
The RP controller implements a "Massbus style" 22b direct interface for
|
|
large disk drives. It is more abstract than other device simulators, with
|
|
just enough detail to run operating system drivers. In addition, the RP
|
|
controller conflates the details of the RM series controllers with the RP
|
|
series controllers, although there were detailed differences.
|
|
|
|
RP options include the ability to set units write enabled or write locked,
|
|
to set the drive type to one of six disk types, or autosize, and to write
|
|
a DEC standard 044 compliant bad block table on the last track:
|
|
|
|
SET RPn LOCKED set unit n write locked
|
|
SET RPn ENABLED set unit n write enabled
|
|
SET RPn RM03 set type to RM03
|
|
SET RPn RM05 set type to RM05
|
|
SET RPn RM80 set type to RM80
|
|
SET RPn RP04 set type to RP04
|
|
SET RPn RP06 set type to RP06
|
|
SET RPn RP07 set type to RP07
|
|
SET RPn AUTOSIZE set type based on file size at attach
|
|
SET RPn BADBLOCK write bad block table on last track
|
|
|
|
The type options can be used only when a unit is not attached to a file. The
|
|
bad block option can be used only when a unit is attached to a file. Units
|
|
can also be REMOVEd or ADDed to the configuration. The RP controller supports
|
|
the BOOT command.
|
|
|
|
The RP controller implements these registers:
|
|
|
|
name size comments
|
|
|
|
RPCS1 16 control/status 1
|
|
RPWC 16 word count
|
|
RPBA 16 bus address
|
|
RPDA 16 desired surface, sector
|
|
RPCS2 16 control/status 2
|
|
RPDS[0:7] 16 drive status, drives 0-7
|
|
RPER1[0:7] 16 drive errors, drives 0-7
|
|
RPOF 16 offset
|
|
RPDC 8 desired cylinder
|
|
RPER2 16 error status 2
|
|
RPER3 16 error status 3
|
|
RPEC1 16 ECC syndrome 1
|
|
RPEC2 16 ECC syndrome 2
|
|
RPMR 16 maintenance register
|
|
RPDB 16 data buffer
|
|
RPBAE 6 bus address extension
|
|
RPCS3 16 control/status 3
|
|
IFF 1 transfer complete interrupt request flop
|
|
INT 1 interrupt pending flag
|
|
SC 1 special condition (CSR1<15>)
|
|
DONE 1 device done flag (CSR1<7>)
|
|
IE 1 interrupt enable flag (CSR1<6>)
|
|
STIME 24 seek time, per cylinder
|
|
RTIME 24 rotational delay
|
|
STOP_IOE 1 stop on I/O error
|
|
|
|
Error handling is as follows:
|
|
|
|
error STOP_IOE processed as
|
|
|
|
not attached 1 report error and stop
|
|
0 disk not ready
|
|
|
|
end of file x assume rest of disk is zero
|
|
|
|
OS I/O error x report error and stop
|
|
|
|
2.7 RQDX3 MSCP Disk Controller (RQ)
|
|
|
|
The RQ controller simulates the RQDX3 MSCP disk controller. RQ options
|
|
include the ability to set units write enabled or write locked, and to
|
|
set the drive type to one of eleven disk types:
|
|
|
|
SET RQn LOCKED set unit n write locked
|
|
SET RQn ENABLED set unit n write enabled
|
|
SET RQn RX50 set type to RX50
|
|
SET RQn RX33 set type to RX33
|
|
SET RQn RD51 set type to RD51
|
|
SET RQn RD52 set type to RD52
|
|
SET RQn RD53 set type to RD53
|
|
SET RQn RD54 set type to RD54
|
|
SET RQn RD31 set type to RD31
|
|
SET RQn RA82 set type to RA82
|
|
SET RQn RA72 set type to RA72
|
|
SET RQn RA90 set type to RA90
|
|
SET RQn RA92 set type to RA92
|
|
|
|
The type options can be used only when a unit is not attached to a file.
|
|
Units can also be REMOVEd or ADDed to the configuration. The RQ controller
|
|
supports the BOOT command.
|
|
|
|
The RQ controller implements the following special SHOW commands:
|
|
|
|
SHOW RQ RINGS show command and response rings
|
|
SHOW RQ FREEQ show packet free queue
|
|
SHOW RQ RESPQ show packet response queue
|
|
SHOW RQ UNITQ show unit queues
|
|
SHOW RQ ALL show all ring and queue state
|
|
SHOW RQn UNITQ show unit queues for unit n
|
|
|
|
The RQ controller implements these registers:
|
|
|
|
name size comments
|
|
|
|
SA 16 status/address register
|
|
S1DAT 16 step 1 init host data
|
|
CQBA 22 command queue base address
|
|
CQLNT 8 command queue length
|
|
CQIDX 8 command queue index
|
|
RQBA 22 request queue base address
|
|
RQLNT 8 request queue length
|
|
RQIDX 8 request queue index
|
|
FREE 5 head of free packet list
|
|
RESP 5 head of response packet list
|
|
PBSY 5 number of busy packets
|
|
CFLGS 16 controller flags
|
|
CSTA 4 controller state
|
|
PERR 9 port error number
|
|
CRED 5 host credits
|
|
HAT 16 host available timer
|
|
HTMO 17 host timeout value
|
|
CPKT[0:3] 5 current packet, units 0-3
|
|
PKTQ[0:3] 5 packet queue, units 0-3
|
|
UFLG[0:3] 16 unit flags, units 0-3
|
|
INT 1 interrupt request
|
|
QTIME 24 response time for 'immediate' packets
|
|
XTIME 24 response time for data transfers
|
|
PKTS[33*32] 16 packet buffers, 33W each,
|
|
32 entries
|
|
|
|
Error handling is as follows:
|
|
|
|
error processed as
|
|
|
|
not attached disk not ready
|
|
|
|
end of file assume rest of disk is zero
|
|
|
|
OS I/O error report error and stop
|
|
|
|
2.8 TC11/TU56 DECtape (DT)
|
|
|
|
DECtapes drives are numbered 1-8; in the simulator, drive 8 is unit 0.
|
|
DECtape options include the ability to make units write enabled or write
|
|
locked.
|
|
|
|
SET DTn LOCKED set unit n write locked
|
|
SET DTn ENABLED set unit n write enabled
|
|
|
|
Units can also be REMOVEd or ADDed to the configuration. The TC11 supports
|
|
the BOOT command.
|
|
|
|
The TC11 supports both PDP-8 format and PDP-9/11/15 format DECtape images.
|
|
ATTACH tries to determine the tape format from the DECtape image; the user
|
|
can force a particular format with switches:
|
|
|
|
-f foreign (PDP-8) format
|
|
-n native (PDP-9/11/15) format
|
|
|
|
The DECtape controller is a data-only simulator; the timing and mark
|
|
track, and block header and trailer, are not stored. Thus, the WRITE
|
|
TIMING AND MARK TRACK function is not supported; the READ ALL function
|
|
always returns the hardware standard block header and trailer; and the
|
|
WRITE ALL function dumps non-data words into the bit bucket.
|
|
|
|
The DECtape controller implements these registers:
|
|
|
|
name size comments
|
|
|
|
TCST 16 status register
|
|
TCCM 16 command register
|
|
TCWC 16 word count register
|
|
TCBA 16 bus address register
|
|
TCDT 16 data register
|
|
INT 1 interrupt pending flag
|
|
ERR 1 error flag
|
|
DONE 1 done flag
|
|
IE 1 interrupt enable flag
|
|
CTIME 31 time to complete transport stop
|
|
LTIME 31 time between lines
|
|
ACTIME 31 time to accelerate to full speed
|
|
DCTIME 31 time to decelerate to a full stop
|
|
SUBSTATE 2 read/write command substate
|
|
POS[0:7] 31 position, in lines, units 0-7
|
|
STATT[0-7] 31 unit state, units 0-7
|
|
|
|
It is critically important to maintain certain timing relationships
|
|
among the DECtape parameters, or the DECtape simulator will fail to
|
|
operate correctly.
|
|
|
|
- LTIME must be at least 6
|
|
- ACTIME must be less than DCTIME, and both need to be at
|
|
least 100 times LTIME
|
|
|
|
2.9 TM11 Magnetic Tape (TM)
|
|
|
|
TM options include the ability to make units write enabled or write locked.
|
|
|
|
SET TMn LOCKED set unit n write locked
|
|
SET TMn ENABLED set unit n write enabled
|
|
|
|
Units can also be REMOVEd or ADDed to the configuration.
|
|
|
|
The TM11 supports the BOOT command. The bootstrap supports both original
|
|
and DEC standard boot formats. Originally, a tape bootstrap read and
|
|
executed the first record on tape. To allow for ANSI labels, the DEC
|
|
standard bootstrap skipped the first record and read and executed the second.
|
|
The DEC standard is the default; to bootstrap an original format tape, use
|
|
the -o switch.
|
|
|
|
The magnetic tape controller implements these registers:
|
|
|
|
name size comments
|
|
|
|
MTS 16 status
|
|
MTC 16 command
|
|
MTCMA 16 memory address
|
|
MTBRC 16 byte/record count
|
|
INT 1 interrupt pending flag
|
|
ERR 1 error flag
|
|
DONE 1 device done flag
|
|
IE 1 interrupt enable flag
|
|
STOP_IOE 1 stop on I/O error
|
|
TIME 24 delay
|
|
UST[0:7] 16 unit status, units 0-7
|
|
POS[0:7] 31 position, units 0-7
|
|
|
|
Error handling is as follows:
|
|
|
|
error processed as
|
|
|
|
not attached tape not ready
|
|
|
|
end of file (read or space) end of physical tape
|
|
(write) ignored
|
|
|
|
OS I/O error report error and stop
|
|
|
|
2.10 TS11/TSV05 Magnetic Tape (TS)
|
|
|
|
The TS actually implements the TSV05, with 22-bit addressing, but will
|
|
work with TS11 drivers. TS options include the ability to make the unit
|
|
write enabled or write locked.
|
|
|
|
SET TS LOCKED set unit write locked
|
|
SET TS ENABLED set unit write enabled
|
|
|
|
The TS11 supports the BOOT command. The bootstrap supports only DEC
|
|
standard boot formats. To allow for ANSI labels, the DEC standard bootstrap
|
|
skipped the first record and read and executed the second.
|
|
|
|
The magnetic tape controller implements these registers:
|
|
|
|
name size comments
|
|
|
|
TSSR 16 status register
|
|
TSBA 16 bus address register
|
|
TSDBX 16 data buffer extension register
|
|
CHDR 16 command packet header
|
|
CADL 16 command packet low address or count
|
|
CADH 16 command packet high address
|
|
CLNT 16 command packet length
|
|
MHDR 16 message packet header
|
|
MRFC 16 message packet residual frame count
|
|
MXS0 16 message packet extended status 0
|
|
MXS1 16 message packet extended status 1
|
|
MXS2 16 message packet extended status 2
|
|
MXS3 16 message packet extended status 3
|
|
MXS4 16 message packet extended status 4
|
|
WADL 16 write char packet low address
|
|
WADH 16 write char packet high address
|
|
WLNT 16 write char packet length
|
|
WOPT 16 write char packet options
|
|
WXOPT 16 write char packet extended options
|
|
ATTN 1 attention message pending
|
|
BOOT 1 boot request pending
|
|
OWNC 1 if set, tape owns command buffer
|
|
OWNM 1 if set, tape owns message buffer
|
|
TIME 24 delay
|
|
POS 31 position
|
|
|
|
Error handling is as follows:
|
|
|
|
error processed as
|
|
|
|
not attached tape not ready
|
|
|
|
end of file (read or space) end of physical tape
|
|
(write) ignored
|
|
|
|
OS I/O error fatal tape error
|
|
|
|
2.11 Symbolic Display and Input
|
|
|
|
The PDP-11 simulator implements symbolic display and input. Display is
|
|
controlled by command line switches:
|
|
|
|
-a display as ASCII character
|
|
-c display as two character ASCII string
|
|
-m display instruction mnemonics
|
|
|
|
Input parsing is controlled by the first character typed in or by command
|
|
line switches:
|
|
|
|
' or -a ASCII character
|
|
" or -c two character ASCII string
|
|
alphabetic instruction mnemonic
|
|
numeric octal number
|
|
|
|
Instruction input uses standard PDP-11 assembler syntax. There are sixteen
|
|
instruction classes:
|
|
|
|
class operands examples comments
|
|
|
|
no operands none HALT, RESET
|
|
3b literal literal, 0 - 7 SPL
|
|
6b literal literal, 0 - 077 MARK
|
|
8b literal literal, 0 - 0377 EMT, TRAP
|
|
register register RTS
|
|
sop specifier SWAB, CLR, ASL
|
|
reg-sop register, specifier JSR, XOR, MUL
|
|
fop flt specifier ABSf, NEGf
|
|
ac-fop flt reg, flt specifier LDf, MULf
|
|
ac-sop flt reg, specifier LDEXP, STEXP
|
|
ac-moded sop flt reg, specifier LDCif, STCfi
|
|
dop specifier, specifier MOV, ADD, BIC
|
|
cond branch address BR, BCC, BNE
|
|
sob register, address SOB
|
|
cc clear cc clear instructions CLC, CLV, CLZ, CLN combinable
|
|
cc set cc set instructions SEC, SEV, SEZ, SEN combinable
|
|
|
|
For floating point opcodes, F and D variants, and I and L variants, may be
|
|
specified regardless of the state of FPS.
|
|
|
|
The syntax for specifiers is as follows:
|
|
|
|
syntax specifier displacement comments
|
|
|
|
Rn 0n -
|
|
Fn 0n - only in flt reg classes
|
|
(Rn) 1n -
|
|
@(Rn) 7n 0 equivalent to @0(Rn)
|
|
(Rn)+ 2n -
|
|
@(Rn)+ 3n -
|
|
-(Rn) 4n -
|
|
@-(Rn) 5n -
|
|
{+/-}d(Rn) 6n {+/-}d
|
|
@{+/-}d(Rn) 7n {+/-}d
|
|
#n 27 n
|
|
@#n 37 n
|
|
.+/-n 67 +/-n - 4
|
|
@.+/-n 77 +/-n - 4
|
|
{+/-}n 67 {+/-}n - PC - 4 if on disk, 37 and n
|
|
@{+/-}n 77 {+/-}n - PC - 4 if on disk, invalid
|