1. New Features 1.1 Directory and documentation - Only common files (SCP and libraries) are in the top level directory. Individual simulator files are in their individual directories. - simh_doc.txt has been split up. simh_doc.txt now documents only SCP. The individual simulators are documented in separate text files in their own directories. - mingw_build.bat is a batch file for the MINGW/gcc environment that will build all the simulators, assuming the root directory structure is at c:\sim. - Makefile is a UNIX make file for the gcc environment that will build all the simulators, assuming the root directory is at c:\sim. 1.2 SCP - DO <file name> executes the SCP commands in the specified file. - Replicated registers in unit structures can now be declared as arrays for examine, modify, save, and restore. Most replicated unit registers (for example, mag tape position registers) have been changed to arrays. - The ADD/REMOVE commands have been replaced by SET unit ONLINE and SET unit OFFLINE, respectively. - Register names that are unique within an entire simulator do not have to be prefaced with the device name. - The ATTACH command can attach files read only, either under user option (-r), or because the attached file is ready only. - The SET/SHOW capabilities have been extended. New forms include: SET <dev> param{=value}{ param ...} SET <unit> param{=value}{ param ...} SHOW <dev> {param param ...} SHOW <unit> {param param ...} - Multiple breakpoints have been implemented. Breakpoints are set/cleared/displayed by: BREAK addr_list{[count]} NOBREAK addr_list SHOW BREAK addr_list 1.3 PDP-11 simulator - Unibus map implemented, with 22b RP controller (URH70) or 18b RP controller (URH11) (in debug). - All DMA peripherals rewritten to use map. - Many peripherals modified for source sharing with VAX. - RQDX3 implemented. - Bugs fixed in RK11 and RL11 write check. 1.4 PDP-10 simulator - ITS 1-proceed implemented. - Bugs fixed in ITS PC sampling and LPMR 1.5 18b PDP simulator - Interrupts split out to multiple levels to allow easier expansion. 1.5 IBM System 3 Simulator - Written by Charles (Dutch) Owen. 1.6 VAX Simulator (in debug) - Simulates MicroVAX 3800 (KA655) with 16MB-64MB memory, RQDX3, RLV12, TSV11, DZV11, LPV11, PCV11. - CDROM capability has been added to the RQDX3, to allow testing with VMS hobbyist images. 1.7 SDS 940 Simulator (not tested) - Simulates SDS 940, 16K-64K memory, fixed and moving head disk, magtape, line printer, console. 1.8 Altair Z80 - Revised from Charles (Dutch) Owen's original by Peter Schorn. - MITS 8080 with full Z80 simulation. - 4K and 8K BASIC packages, Prolog package. 1.9 Interdata The I4 simulator has been withdrawn for major rework. Look for a complete 16b/32b Interdata simulator sometime next year. 2. Release Notes 2.1 SCP SCP now allows replicated registers in unit structures to be modelled as arrays. All replicated register declarations have been replaced by register array declarations. As a result, save files from prior revisions will generate errors after restoring main memory. 2.2 PDP-11 The Unibus map code is in debug. The map was implemented primarily to allow source sharing with the VAX, which requires a DMA map. DMA devices work correctly with the Unibus map disabled. The RQDX3 simulator has run a complete RSTS/E SYSGEN, with multiple drives, and booted the completed system from scratch. 2.3 VAX The VAX simulator will run the boot code up to the >>> prompt. It can successfully process a SHOW DEVICE command. It runs the HCORE instruction diagnostic. It can boot the hobbyist CD through SYSBOOT and through the date/time dialog and restore the hobbyist CD, using standalone backup. On the boot of the restored disk, it gets to the date/time dialog, and then crashes. 2.4 SDS 940 The SDS 940 is untested, awaiting real code. 2.5 GCC Optimization At -O2 and above, GCC does not correctly compile the simulators which use setjmp-longjmp (PDP-11, PDP-10, VAX). A working hypothesis is that optimized state maintained in registers is being used in the setjmp processing routine. On the PDP-11 and PDP-10, all of this state has been either made global, or volatile, to encourage GCC to keep the state up to date in memory. The VAX is still vulnerable. 3. Work list 3.1 SCP - Better ENABLE/DISABLE. 3.2 PDP-11 RQDX3 Software mapped mode, RCT read simulation, VMS debug.
775 lines
22 KiB
C
775 lines
22 KiB
C
/* pdp18b_stddev.c: 18b PDP's standard devices
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Copyright (c) 1993-2001, Robert M Supnik
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Permission is hereby granted, free of charge, to any person obtaining a
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copy of this software and associated documentation files (the "Software"),
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to deal in the Software without restriction, including without limitation
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the rights to use, copy, modify, merge, publish, distribute, sublicense,
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and/or sell copies of the Software, and to permit persons to whom the
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Software is furnished to do so, subject to the following conditions:
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The above copyright notice and this permission notice shall be included in
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all copies or substantial portions of the Software.
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THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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ROBERT M SUPNIK BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
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IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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Except as contained in this notice, the name of Robert M Supnik shall not
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be used in advertising or otherwise to promote the sale, use or other dealings
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in this Software without prior written authorization from Robert M Supnik.
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ptr paper tape reader
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ptp paper tape punch
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tti keyboard
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tto teleprinter
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clk clock
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29-Nov-01 RMS Added read only unit support
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25-Nov-01 RMS Revised interrupt structure
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17-Sep-01 RMS Removed multiconsole support
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07-Sep-01 RMS Added terminal multiplexor support
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17-Jul-01 RMS Moved function prototype
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10-Jun-01 RMS Cleaned up IOT decoding to reflect hardware
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27-May-01 RMS Added multiconsole support
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10-Mar-01 RMS Added funny format loader support
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05-Mar-01 RMS Added clock calibration support
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22-Dec-00 RMS Added PDP-9/15 half duplex support
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30-Nov-00 RMS Fixed PDP-4/7 bootstrap loader for 4K systems
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30-Oct-00 RMS Standardized register naming
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06-Jan-97 RMS Fixed PDP-4 console input
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16-Dec-96 RMS Fixed bug in binary ptr service
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*/
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#include "pdp18b_defs.h"
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#include <ctype.h>
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extern int32 M[];
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extern int32 int_hwre[API_HLVL+1], saved_PC;
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extern UNIT cpu_unit;
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int32 clk_state = 0;
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int32 ptr_err = 0, ptr_stopioe = 0, ptr_state = 0;
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int32 ptp_err = 0, ptp_stopioe = 0;
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int32 tti_state = 0;
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int32 tto_state = 0;
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int32 clk_tps = 60; /* ticks/second */
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int32 tmxr_poll = 16000; /* term mux poll */
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t_stat clk_svc (UNIT *uptr);
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t_stat ptr_svc (UNIT *uptr);
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t_stat ptp_svc (UNIT *uptr);
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t_stat tti_svc (UNIT *uptr);
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t_stat tto_svc (UNIT *uptr);
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t_stat clk_reset (DEVICE *dptr);
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t_stat ptr_reset (DEVICE *dptr);
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t_stat ptp_reset (DEVICE *dptr);
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t_stat tti_reset (DEVICE *dptr);
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t_stat tto_reset (DEVICE *dptr);
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t_stat ptr_attach (UNIT *uptr, char *cptr);
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t_stat ptp_attach (UNIT *uptr, char *cptr);
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t_stat ptr_detach (UNIT *uptr);
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t_stat ptp_detach (UNIT *uptr);
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t_stat ptr_boot (int32 unitno);
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/* CLK data structures
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clk_dev CLK device descriptor
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clk_unit CLK unit
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clk_reg CLK register list
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*/
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UNIT clk_unit = { UDATA (&clk_svc, 0, 0), 16000 };
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REG clk_reg[] = {
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{ FLDATA (INT, int_hwre[API_CLK], INT_V_CLK) },
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{ FLDATA (DONE, int_hwre[API_CLK], INT_V_CLK) },
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{ FLDATA (ENABLE, clk_state, 0) },
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{ DRDATA (TIME, clk_unit.wait, 24), REG_NZ + PV_LEFT },
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{ DRDATA (TPS, clk_tps, 8), REG_NZ + PV_LEFT },
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{ NULL } };
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DEVICE clk_dev = {
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"CLK", &clk_unit, clk_reg, NULL,
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1, 0, 0, 0, 0, 0,
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NULL, NULL, &clk_reset,
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NULL, NULL, NULL };
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/* PTR data structures
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ptr_dev PTR device descriptor
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ptr_unit PTR unit
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ptr_reg PTR register list
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*/
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UNIT ptr_unit = {
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UDATA (&ptr_svc, UNIT_SEQ+UNIT_ATTABLE+UNIT_ROABLE, 0),
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SERIAL_IN_WAIT };
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REG ptr_reg[] = {
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{ ORDATA (BUF, ptr_unit.buf, 18) },
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{ FLDATA (INT, int_hwre[API_PTR], INT_V_PTR) },
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{ FLDATA (DONE, int_hwre[API_PTR], INT_V_PTR) },
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#if defined (IOS_PTRERR)
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{ FLDATA (ERR, ptr_err, 0) },
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#endif
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{ ORDATA (STATE, ptr_state, 5), REG_HRO },
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{ DRDATA (POS, ptr_unit.pos, 31), PV_LEFT },
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{ DRDATA (TIME, ptr_unit.wait, 24), PV_LEFT },
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{ FLDATA (STOP_IOE, ptr_stopioe, 0) },
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{ NULL } };
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DEVICE ptr_dev = {
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"PTR", &ptr_unit, ptr_reg, NULL,
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1, 10, 31, 1, 8, 8,
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NULL, NULL, &ptr_reset,
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&ptr_boot, &ptr_attach, &ptr_detach };
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/* PTP data structures
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ptp_dev PTP device descriptor
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ptp_unit PTP unit
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ptp_reg PTP register list
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*/
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UNIT ptp_unit = {
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UDATA (&ptp_svc, UNIT_SEQ+UNIT_ATTABLE, 0), SERIAL_OUT_WAIT };
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REG ptp_reg[] = {
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{ ORDATA (BUF, ptp_unit.buf, 8) },
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{ FLDATA (INT, int_hwre[API_PTP], INT_V_PTP) },
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{ FLDATA (DONE, int_hwre[API_PTP], INT_V_PTP) },
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#if defined (IOS_PTPERR)
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{ FLDATA (ERR, ptp_err, 0) },
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#endif
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{ DRDATA (POS, ptp_unit.pos, 31), PV_LEFT },
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{ DRDATA (TIME, ptp_unit.wait, 24), PV_LEFT },
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{ FLDATA (STOP_IOE, ptp_stopioe, 0) },
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{ NULL } };
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DEVICE ptp_dev = {
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"PTP", &ptp_unit, ptp_reg, NULL,
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1, 10, 31, 1, 8, 8,
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NULL, NULL, &ptp_reset,
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NULL, &ptp_attach, &ptp_detach };
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/* TTI data structures
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tti_dev TTI device descriptor
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tti_unit TTI unit
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tti_reg TTI register list
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tti_trans ASCII to Baudot table
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*/
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#if defined (KSR28)
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#define TTI_WIDTH 5
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#define TTI_FIGURES (1 << TTI_WIDTH)
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#define TTI_2ND (1 << (TTI_WIDTH + 1))
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#define TTI_BOTH (1 << (TTI_WIDTH + 2))
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#define BAUDOT_LETTERS 033
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#define BAUDOT_FIGURES 037
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static const int32 tti_trans[128] = {
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000,000,000,000,000,000,000,064, /* bell */
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000,000,0210,000,000,0202,000,000, /* lf, cr */
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000,000,000,000,000,000,000,000,
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000,000,000,000,000,000,000,000,
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0204,066,061,045,062,000,053,072, /* space - ' */
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076,051,000,000,046,070,047,067, /* ( - / */
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055,075,071,060,052,041,065,074, /* 0 - 7 */
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054,043,056,057,000,000,000,063, /* 8 - ? */
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000,030,023,016,022,020,026,013, /* @ - G */
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005,014,032,036,011,007,006,003, /* H - O */
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015,035,012,024,001,034,017,031, /* P - W */
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027,025,021,000,000,000,000,000, /* X - _ */
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000,030,023,016,022,020,026,013, /* ` - g */
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005,014,032,036,011,007,006,003, /* h - o */
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015,035,012,024,001,034,017,031, /* p - w */
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027,025,021,000,000,000,000,000 }; /* x - DEL */
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#else
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#define TTI_WIDTH 8
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#endif
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#define TTI_MASK ((1 << TTI_WIDTH) - 1)
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#define UNIT_V_UC (UNIT_V_UF + 0) /* UC only */
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#define UNIT_UC (1 << UNIT_V_UC)
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#define UNIT_V_HDX (UNIT_V_UF + 1) /* half duplex */
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#define UNIT_HDX (1 << UNIT_V_HDX)
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#if defined (PDP4) || defined (PDP7)
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UNIT tti_unit = { UDATA (&tti_svc, UNIT_UC, 0), KBD_POLL_WAIT };
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#else
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UNIT tti_unit = { UDATA (&tti_svc, UNIT_UC+UNIT_HDX, 0), KBD_POLL_WAIT };
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#endif
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REG tti_reg[] = {
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{ ORDATA (BUF, tti_unit.buf, TTI_WIDTH) },
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{ FLDATA (INT, int_hwre[API_TTI], INT_V_TTI) },
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{ FLDATA (DONE, int_hwre[API_TTI], INT_V_TTI) },
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#if defined (KSR28)
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{ ORDATA (TTI_STATE, tti_state, (TTI_WIDTH + 3)), REG_HRO },
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#else
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{ FLDATA (UC, tti_unit.flags, UNIT_V_UC), REG_HRO },
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{ FLDATA (HDX, tti_unit.flags, UNIT_V_HDX), REG_HRO },
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#endif
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{ DRDATA (POS, tti_unit.pos, 31), PV_LEFT },
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{ DRDATA (TIME, tti_unit.wait, 24), REG_NZ + PV_LEFT },
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{ NULL } };
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MTAB tti_mod[] = {
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#if !defined (KSR28)
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{ UNIT_UC, 0, "lower case", "LC", NULL },
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{ UNIT_UC, UNIT_UC, "upper case", "UC", NULL },
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{ UNIT_HDX, 0, "full duplex", "FDX", NULL },
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{ UNIT_HDX, UNIT_HDX, "half duplex", "HDX", NULL },
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#endif
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{ 0 } };
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DEVICE tti_dev = {
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"TTI", &tti_unit, tti_reg, tti_mod,
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1, 10, 31, 1, 8, 8,
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NULL, NULL, &tti_reset,
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NULL, NULL, NULL };
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/* TTO data structures
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tto_dev TTO device descriptor
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tto_unit TTO unit
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tto_reg TTO register list
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tto_trans Baudot to ASCII table
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*/
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#if defined (KSR28)
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#define TTO_WIDTH 5
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#define TTO_FIGURES (1 << TTO_WIDTH)
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static const char tto_trans[64] = {
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0 ,'T',015,'O',' ','H','N','M',
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012,'L','R','G','I','P','C','V',
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'E','Z','D','B','S','Y','F','X',
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'A','W','J', 0 ,'U','Q','K', 0,
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0 ,'5','\r','9',' ','#',',','.',
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012,')','4','&','8','0',':',';',
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'3','"','$','?','\a','6','!','/',
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'-','2','\'',0 ,'7','1','(', 0 };
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#else
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#define TTO_WIDTH 8
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#endif
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#define TTO_MASK ((1 << TTO_WIDTH) - 1)
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UNIT tto_unit = { UDATA (&tto_svc, UNIT_UC, 0), SERIAL_OUT_WAIT };
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REG tto_reg[] = {
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{ ORDATA (BUF, tto_unit.buf, TTO_WIDTH) },
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{ FLDATA (INT, int_hwre[API_TTO], INT_V_TTO) },
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{ FLDATA (DONE, int_hwre[API_TTO], INT_V_TTO) },
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#if defined (KSR28)
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{ FLDATA (TTO_STATE, tto_state, 0), REG_HRO },
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#endif
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{ DRDATA (POS, tto_unit.pos, 31), PV_LEFT },
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{ DRDATA (TIME, tto_unit.wait, 24), PV_LEFT },
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{ NULL } };
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MTAB tto_mod[] = {
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#if !defined (KSR28)
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{ UNIT_UC, 0, "lower case", "LC", NULL },
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{ UNIT_UC, UNIT_UC, "upper case", "UC", NULL },
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#endif
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{ 0 } };
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DEVICE tto_dev = {
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"TTO", &tto_unit, tto_reg, tto_mod,
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1, 10, 31, 1, 8, 8,
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NULL, NULL, &tto_reset,
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NULL, NULL, NULL };
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/* Clock: IOT routine */
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int32 clk (int32 pulse, int32 AC)
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{
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if (pulse & 001) { /* CLSF */
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if (TST_INT (CLK)) AC = AC | IOT_SKP; }
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if (pulse & 004) { /* CLON/CLOF */
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if (pulse & 040) { /* CLON */
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CLR_INT (CLK); /* clear flag */
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clk_state = 1; /* clock on */
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if (!sim_is_active (&clk_unit)) /* already on? */
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sim_activate (&clk_unit, /* start, calibr */
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sim_rtc_init (clk_unit.wait)); }
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else clk_reset (&clk_dev); } /* CLOF */
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return AC;
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}
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/* Unit service */
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t_stat clk_svc (UNIT *uptr)
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{
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int32 t;
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if (clk_state) { /* clock on? */
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M[7] = (M[7] + 1) & 0777777; /* incr counter */
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if (M[7] == 0) SET_INT (CLK); /* ovrflo? set flag */
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t = sim_rtc_calb (clk_tps); /* calibrate clock */
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sim_activate (&clk_unit, t); /* reactivate unit */
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tmxr_poll = t; } /* set mux poll */
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return SCPE_OK;
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}
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/* Reset routine */
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t_stat clk_reset (DEVICE *dptr)
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{
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CLR_INT (CLK); /* clear flag */
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clk_state = 0; /* clock off */
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sim_cancel (&clk_unit); /* stop clock */
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tmxr_poll = clk_unit.wait; /* set mux poll */
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return SCPE_OK;
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}
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/* IORS service for all standard devices */
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int32 std_iors (void)
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{
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return ((TST_INT (CLK)? IOS_CLK: 0) |
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(TST_INT (PTR)? IOS_PTR: 0) |
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(TST_INT (PTP)? IOS_PTP: 0) |
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(TST_INT (TTI)? IOS_TTI: 0) |
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(TST_INT (TTO)? IOS_TTO: 0) |
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#if defined (IOS_PTRERR)
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(ptr_err? IOS_PTRERR: 0) |
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#endif
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#if defined (IOS_PTPERR)
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(ptp_err? IOS_PTPERR: 0) |
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#endif
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(clk_state? IOS_CLKON: 0));
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}
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/* Paper tape reader: IOT routine */
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int32 ptr (int32 pulse, int32 AC)
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{
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if (pulse & 001) { /* RSF */
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if (TST_INT (PTR)) AC = AC | IOT_SKP; }
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if (pulse & 002) { /* RRB, RCF */
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CLR_INT (PTR); /* clear done */
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AC = AC | ptr_unit.buf; } /* return buffer */
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if (pulse & 004) { /* RSA, RSB */
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ptr_state = (pulse & 040)? 18: 0; /* set mode */
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CLR_INT (PTR); /* clear done */
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ptr_unit.buf = 0; /* clear buffer */
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sim_activate (&ptr_unit, ptr_unit.wait); }
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return AC;
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}
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/* Unit service */
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t_stat ptr_svc (UNIT *uptr)
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{
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int32 temp;
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if ((ptr_unit.flags & UNIT_ATT) == 0) { /* attached? */
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#if defined (IOS_PTRERR)
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SET_INT (PTR); /* if err, set int */
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ptr_err = 1;
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#endif
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return IORETURN (ptr_stopioe, SCPE_UNATT); }
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if ((temp = getc (ptr_unit.fileref)) == EOF) { /* end of file? */
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#if defined (IOS_PTRERR)
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SET_INT (PTR); /* if err, set done */
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ptr_err = 1;
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#endif
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if (feof (ptr_unit.fileref)) {
|
||
if (ptr_stopioe) printf ("PTR end of file\n");
|
||
else return SCPE_OK; }
|
||
else perror ("PTR I/O error");
|
||
clearerr (ptr_unit.fileref);
|
||
return SCPE_IOERR; }
|
||
if (ptr_state == 0) ptr_unit.buf = temp & 0377; /* alpha */
|
||
else if (temp & 0200) { /* binary */
|
||
ptr_state = ptr_state - 6;
|
||
ptr_unit.buf = ptr_unit.buf | ((temp & 077) << ptr_state); }
|
||
if (ptr_state == 0) SET_INT (PTR); /* if done, set flag */
|
||
else sim_activate (&ptr_unit, ptr_unit.wait); /* else restart */
|
||
ptr_unit.pos = ptr_unit.pos + 1;
|
||
return SCPE_OK;
|
||
}
|
||
|
||
/* Reset routine */
|
||
|
||
t_stat ptr_reset (DEVICE *dptr)
|
||
{
|
||
ptr_state = 0; /* clear state */
|
||
ptr_unit.buf = 0;
|
||
CLR_INT (PTR); /* clear flag */
|
||
ptr_err = (ptr_unit.flags & UNIT_ATT)? 0: 1;
|
||
sim_cancel (&ptr_unit); /* deactivate unit */
|
||
return SCPE_OK;
|
||
}
|
||
|
||
/* Attach routine */
|
||
|
||
t_stat ptr_attach (UNIT *uptr, char *cptr)
|
||
{
|
||
t_stat reason;
|
||
|
||
reason = attach_unit (uptr, cptr);
|
||
ptr_err = (ptr_unit.flags & UNIT_ATT)? 0: 1;
|
||
return reason;
|
||
}
|
||
|
||
/* Detach routine */
|
||
|
||
t_stat ptr_detach (UNIT *uptr)
|
||
{
|
||
ptr_err = 1;
|
||
return detach_unit (uptr);
|
||
}
|
||
|
||
#if defined (PDP4) || defined (PDP7)
|
||
|
||
/* Bootstrap routine, PDP-4 and PDP-7
|
||
|
||
In a 4K system, the boostrap resides at 7762-7776.
|
||
In an 8K or greater system, the bootstrap resides at 17762-17776.
|
||
Because the program is so small, simple masking can be
|
||
used to remove addr<5> for a 4K system.
|
||
*/
|
||
|
||
#define BOOT_START 017577
|
||
#define BOOT_FPC 017577
|
||
#define BOOT_RPC 017770
|
||
#define BOOT_LEN (sizeof (boot_rom) / sizeof (int))
|
||
|
||
static const int32 boot_rom[] = {
|
||
0700144, /* rsb */
|
||
0117762, /* ff, jsb r1b */
|
||
0057666, /* dac done 1 */
|
||
0117762, /* jms r1b */
|
||
0057667, /* dac done 2 */
|
||
0117762, /* jms r1b */
|
||
0040007, /* dac conend */
|
||
0057731, /* dac conbeg */
|
||
0440007, /* isz conend */
|
||
0117762, /* blk, jms r1b */
|
||
0057673, /* dac cai */
|
||
0741100, /* spa */
|
||
0617665, /* jmp done */
|
||
0117762, /* jms r1b */
|
||
0057777, /* dac tem1 */
|
||
0317673, /* add cai */
|
||
0057775, /* dac cks */
|
||
0117713, /* jms r1a */
|
||
0140010, /* dzm word */
|
||
0457777, /* cont, isz tem1 */
|
||
0617632, /* jmp cont1 */
|
||
0217775, /* lac cks */
|
||
0740001, /* cma */
|
||
0740200, /* sza */
|
||
0740040, /* hlt */
|
||
0700144, /* rsb */
|
||
0617610, /* jmp blk */
|
||
0117713, /* cont1, jms r1a */
|
||
0057762, /* dac tem2 */
|
||
0117713, /* jms r1a */
|
||
0742010, /* rtl */
|
||
0742010, /* rtl */
|
||
0742010, /* rtl */
|
||
0742010, /* rtl */
|
||
0317762, /* add tem2 */
|
||
0057762, /* dac tem2 */
|
||
0117713, /* jms r1a */
|
||
0742020, /* rtr */
|
||
0317726, /* add cdsp */
|
||
0057713, /* dac r1a */
|
||
0517701, /* and ccma */
|
||
0740020, /* rar */
|
||
0317762, /* add tem2 */
|
||
0437713, /* xct i r1a */
|
||
0617622, /* jmp cont */
|
||
0617672, /* dsptch, jmp code0 */
|
||
0617670, /* jmp code1 */
|
||
0617700, /* jmp code2 */
|
||
0617706, /* jmp code3 */
|
||
0417711, /* xct code4 */
|
||
0617732, /* jmp const */
|
||
0740000, /* nop */
|
||
0740000, /* nop */
|
||
0740000, /* nop */
|
||
0200007, /* done, lac conend */
|
||
0740040, /* xx */
|
||
0740040, /* xx */
|
||
0517727, /* code1, and imsk */
|
||
0337762, /* add i tem2 */
|
||
0300010, /* code0, add word */
|
||
0740040, /* cai, xx */
|
||
0750001, /* clc */
|
||
0357673, /* tad cai */
|
||
0057673, /* dac cai */
|
||
0617621, /* jmp cont-1 */
|
||
0711101, /* code2, spa cla */
|
||
0740001, /* ccma, cma */
|
||
0277762, /* xor i tem2 */
|
||
0300010, /* add word */
|
||
0040010, /* code2a, dac word */
|
||
0617622, /* jmp cont */
|
||
0057711, /* code3, dac code4 */
|
||
0217673, /* lac cai */
|
||
0357701, /* tad ccma */
|
||
0740040, /* code4, xx */
|
||
0617622, /* jmp cont */
|
||
0000000, /* r1a, 0 */
|
||
0700101, /* rsf */
|
||
0617714, /* jmp .-1 */
|
||
0700112, /* rrb */
|
||
0700104, /* rsa */
|
||
0057730, /* dac tem */
|
||
0317775, /* add cks */
|
||
0057775, /* dac cks */
|
||
0217730, /* lac tem */
|
||
0744000, /* cll */
|
||
0637713, /* jmp i r1a */
|
||
0017654, /* cdsp, dsptch */
|
||
0760000, /* imsk, 760000 */
|
||
0000000, /* tem, 0 */
|
||
0000000, /* conbeg, 0 */
|
||
0300010, /* const, add word */
|
||
0060007, /* dac i conend */
|
||
0217731, /* lac conbeg */
|
||
0040010, /* dac index */
|
||
0220007, /* lac i conend */
|
||
0560010, /* con1, sad i index */
|
||
0617752, /* jmp find */
|
||
0560010, /* sad i index */
|
||
0617752, /* jmp find */
|
||
0560010, /* sad i index */
|
||
0617752, /* jmp find */
|
||
0560010, /* sad i index */
|
||
0617752, /* jmp find */
|
||
0560010, /* sad i index */
|
||
0617752, /* jmp find */
|
||
0617737, /* jmp con1 */
|
||
0200010, /* find, lac index */
|
||
0540007, /* sad conend */
|
||
0440007, /* isz conend */
|
||
0617704, /* jmp code2a */
|
||
0000000,
|
||
0000000,
|
||
0000000,
|
||
0000000,
|
||
0000000, /* r1b, 0 */
|
||
0700101, /* rsf */
|
||
0617763, /* jmp .-1 */
|
||
0700112, /* rrb */
|
||
0700144, /* rsb */
|
||
0637762, /* jmp i r1b */
|
||
0700144, /* go, rsb */
|
||
0117762, /* g, jms r1b */
|
||
0057775, /* dac cks */
|
||
0417775, /* xct cks */
|
||
0117762, /* jms r1b */
|
||
0000000, /* cks, 0 */
|
||
0617771 /* jmp g */
|
||
};
|
||
|
||
t_stat ptr_boot (int32 unitno)
|
||
{
|
||
int32 i, mask, wd;
|
||
extern int32 sim_switches;
|
||
|
||
if (MEMSIZE < 8192) mask = 0767777; /* 4k? */
|
||
else mask = 0777777;
|
||
for (i = 0; i < BOOT_LEN; i++) {
|
||
wd = boot_rom[i];
|
||
if ((wd >= 0040000) && (wd < 0640000)) wd = wd & mask;
|
||
M[(BOOT_START & mask) + i] = wd; }
|
||
saved_PC = ((sim_switches & SWMASK ('F'))? BOOT_FPC: BOOT_RPC) & mask;
|
||
return SCPE_OK;
|
||
}
|
||
|
||
#else
|
||
|
||
/* PDP-9 and PDP-15 have built-in hardware RIM loaders */
|
||
|
||
t_stat ptr_boot (int32 unitno)
|
||
{
|
||
return SCPE_ARG;
|
||
}
|
||
|
||
#endif
|
||
|
||
/* Paper tape punch: IOT routine */
|
||
|
||
int32 ptp (int32 pulse, int32 AC)
|
||
{
|
||
if (pulse & 001) { /* PSF */
|
||
if (TST_INT (PTP)) AC = AC | IOT_SKP; }
|
||
if (pulse & 002) CLR_INT (PTP); /* PCF */
|
||
if (pulse & 004) { /* PSA, PSB, PLS */
|
||
CLR_INT (PTP); /* clear flag */
|
||
ptp_unit.buf = (pulse & 040)? /* load punch buf */
|
||
(AC & 077) | 0200: AC & 0377; /* bin or alpha */
|
||
sim_activate (&ptp_unit, ptp_unit.wait); } /* activate unit */
|
||
return AC;
|
||
}
|
||
|
||
/* Unit service */
|
||
|
||
t_stat ptp_svc (UNIT *uptr)
|
||
{
|
||
SET_INT (PTP); /* set done flag */
|
||
if ((ptp_unit.flags & UNIT_ATT) == 0) { /* not attached? */
|
||
ptp_err = 1; /* set error */
|
||
return IORETURN (ptp_stopioe, SCPE_UNATT); }
|
||
if (putc (ptp_unit.buf, ptp_unit.fileref) == EOF) { /* I/O error? */
|
||
ptp_err = 1; /* set error */
|
||
perror ("PTP I/O error");
|
||
clearerr (ptp_unit.fileref);
|
||
return SCPE_IOERR; }
|
||
ptp_unit.pos = ptp_unit.pos + 1;
|
||
return SCPE_OK;
|
||
}
|
||
|
||
/* Reset routine */
|
||
|
||
t_stat ptp_reset (DEVICE *dptr)
|
||
{
|
||
ptp_unit.buf = 0;
|
||
CLR_INT (PTP); /* clear flag */
|
||
ptp_err = (ptp_unit.flags & UNIT_ATT)? 0: 1;
|
||
sim_cancel (&ptp_unit); /* deactivate unit */
|
||
return SCPE_OK;
|
||
}
|
||
|
||
/* Attach routine */
|
||
|
||
t_stat ptp_attach (UNIT *uptr, char *cptr)
|
||
{
|
||
t_stat reason;
|
||
|
||
reason = attach_unit (uptr, cptr);
|
||
ptp_err = (ptp_unit.flags & UNIT_ATT)? 0: 1;
|
||
return reason;
|
||
}
|
||
|
||
/* Detach routine */
|
||
|
||
t_stat ptp_detach (UNIT *uptr)
|
||
{
|
||
ptp_err = 1;
|
||
return detach_unit (uptr);
|
||
}
|
||
|
||
/* Terminal input: IOT routine */
|
||
|
||
int32 tti (int32 pulse, int32 AC)
|
||
{
|
||
if (pulse & 001) { /* KSF */
|
||
if (TST_INT (TTI)) AC = AC | IOT_SKP; }
|
||
if (pulse & 002) { /* KRB */
|
||
CLR_INT (TTI); /* clear flag */
|
||
AC = AC | tti_unit.buf & TTI_MASK; } /* return buffer */
|
||
return AC;
|
||
}
|
||
|
||
/* Unit service */
|
||
|
||
t_stat tti_svc (UNIT *uptr)
|
||
{
|
||
int32 temp;
|
||
|
||
sim_activate (&tti_unit, tti_unit.wait); /* continue poll */
|
||
|
||
#if defined (KSR28) /* Baudot... */
|
||
if (tti_state & TTI_2ND) { /* char waiting? */
|
||
tti_unit.buf = tti_state & TTI_MASK; /* return char */
|
||
tti_state = tti_state & ~TTI_2ND; } /* not waiting */
|
||
else { if ((temp = sim_poll_kbd ()) < SCPE_KFLAG) return temp;
|
||
temp = tti_trans[temp & 0177]; /* translate char */
|
||
if (temp == 0) return SCPE_OK; /* untranslatable? */
|
||
if (((temp & TTI_FIGURES) == (tti_state & TTI_FIGURES)) ||
|
||
(temp & TTI_BOTH)) tti_unit.buf = temp & TTI_MASK;
|
||
else { tti_unit.buf = (temp & TTI_FIGURES)?
|
||
BAUDOT_FIGURES: BAUDOT_LETTERS;
|
||
tti_state = temp | TTI_2ND; } } /* set 2nd waiting */
|
||
#else /* ASCII... */
|
||
if ((temp = sim_poll_kbd ()) < SCPE_KFLAG) return temp; /* no char or error? */
|
||
temp = temp & 0177;
|
||
if ((tti_unit.flags & UNIT_UC) && islower (temp)) temp = toupper (temp);
|
||
if ((tti_unit.flags & UNIT_HDX) &&
|
||
(!(tto_unit.flags & UNIT_UC) ||
|
||
((temp >= 007) && (temp <= 0137)))) {
|
||
sim_putchar (temp);
|
||
tto_unit.pos = tto_unit.pos + 1; }
|
||
tti_unit.buf = temp | 0200; /* got char */
|
||
#endif
|
||
SET_INT (TTI); /* set flag */
|
||
tti_unit.pos = tti_unit.pos + 1;
|
||
return SCPE_OK;
|
||
}
|
||
|
||
/* Reset routine */
|
||
|
||
t_stat tti_reset (DEVICE *dptr)
|
||
{
|
||
tti_unit.buf = 0; /* clear buffer */
|
||
tti_state = 0; /* clear state */
|
||
CLR_INT (TTI); /* clear flag */
|
||
sim_activate (&tti_unit, tti_unit.wait); /* activate unit */
|
||
return SCPE_OK;
|
||
}
|
||
|
||
/* Terminal output: IOT routine */
|
||
|
||
int32 tto (int32 pulse, int32 AC)
|
||
{
|
||
if (pulse & 001) { /* TSF */
|
||
if (TST_INT (TTO)) AC = AC | IOT_SKP; }
|
||
if (pulse & 002) CLR_INT (TTO); /* clear flag */
|
||
if (pulse & 004) { /* load buffer */
|
||
sim_activate (&tto_unit, tto_unit.wait); /* activate unit */
|
||
tto_unit.buf = AC & TTO_MASK; } /* load buffer */
|
||
return AC;
|
||
}
|
||
|
||
/* Unit service */
|
||
|
||
t_stat tto_svc (UNIT *uptr)
|
||
{
|
||
int32 out, temp;
|
||
|
||
SET_INT (TTO); /* set flag */
|
||
#if defined (KSR28) /* Baudot... */
|
||
if (tto_unit.buf == BAUDOT_FIGURES) { /* set figures? */
|
||
tto_state = TTO_FIGURES;
|
||
return SCPE_OK; }
|
||
if (tto_unit.buf == BAUDOT_LETTERS) { /* set letters? */
|
||
tto_state = 0;
|
||
return SCPE_OK; }
|
||
out = tto_trans[tto_unit.buf + tto_state]; /* translate */
|
||
#else
|
||
out = tto_unit.buf & 0177; /* ASCII... */
|
||
#endif
|
||
if (!(tto_unit.flags & UNIT_UC) ||
|
||
((out >= 007) && (out <= 0137))) {
|
||
temp = sim_putchar (out);
|
||
if (temp != SCPE_OK) return temp;
|
||
tto_unit.pos = tto_unit.pos + 1; }
|
||
return SCPE_OK;
|
||
}
|
||
|
||
/* Reset routine */
|
||
|
||
t_stat tto_reset (DEVICE *dptr)
|
||
{
|
||
tto_unit.buf = 0; /* clear buffer */
|
||
tto_state = 0; /* clear state */
|
||
CLR_INT (TTO); /* clear flag */
|
||
sim_cancel (&tto_unit); /* deactivate unit */
|
||
return SCPE_OK;
|
||
}
|