1. New Features 1.1 Directory and documentation - Only common files (SCP and libraries) are in the top level directory. Individual simulator files are in their individual directories. - simh_doc.txt has been split up. simh_doc.txt now documents only SCP. The individual simulators are documented in separate text files in their own directories. - mingw_build.bat is a batch file for the MINGW/gcc environment that will build all the simulators, assuming the root directory structure is at c:\sim. - Makefile is a UNIX make file for the gcc environment that will build all the simulators, assuming the root directory is at c:\sim. 1.2 SCP - DO <file name> executes the SCP commands in the specified file. - Replicated registers in unit structures can now be declared as arrays for examine, modify, save, and restore. Most replicated unit registers (for example, mag tape position registers) have been changed to arrays. - The ADD/REMOVE commands have been replaced by SET unit ONLINE and SET unit OFFLINE, respectively. - Register names that are unique within an entire simulator do not have to be prefaced with the device name. - The ATTACH command can attach files read only, either under user option (-r), or because the attached file is ready only. - The SET/SHOW capabilities have been extended. New forms include: SET <dev> param{=value}{ param ...} SET <unit> param{=value}{ param ...} SHOW <dev> {param param ...} SHOW <unit> {param param ...} - Multiple breakpoints have been implemented. Breakpoints are set/cleared/displayed by: BREAK addr_list{[count]} NOBREAK addr_list SHOW BREAK addr_list 1.3 PDP-11 simulator - Unibus map implemented, with 22b RP controller (URH70) or 18b RP controller (URH11) (in debug). - All DMA peripherals rewritten to use map. - Many peripherals modified for source sharing with VAX. - RQDX3 implemented. - Bugs fixed in RK11 and RL11 write check. 1.4 PDP-10 simulator - ITS 1-proceed implemented. - Bugs fixed in ITS PC sampling and LPMR 1.5 18b PDP simulator - Interrupts split out to multiple levels to allow easier expansion. 1.5 IBM System 3 Simulator - Written by Charles (Dutch) Owen. 1.6 VAX Simulator (in debug) - Simulates MicroVAX 3800 (KA655) with 16MB-64MB memory, RQDX3, RLV12, TSV11, DZV11, LPV11, PCV11. - CDROM capability has been added to the RQDX3, to allow testing with VMS hobbyist images. 1.7 SDS 940 Simulator (not tested) - Simulates SDS 940, 16K-64K memory, fixed and moving head disk, magtape, line printer, console. 1.8 Altair Z80 - Revised from Charles (Dutch) Owen's original by Peter Schorn. - MITS 8080 with full Z80 simulation. - 4K and 8K BASIC packages, Prolog package. 1.9 Interdata The I4 simulator has been withdrawn for major rework. Look for a complete 16b/32b Interdata simulator sometime next year. 2. Release Notes 2.1 SCP SCP now allows replicated registers in unit structures to be modelled as arrays. All replicated register declarations have been replaced by register array declarations. As a result, save files from prior revisions will generate errors after restoring main memory. 2.2 PDP-11 The Unibus map code is in debug. The map was implemented primarily to allow source sharing with the VAX, which requires a DMA map. DMA devices work correctly with the Unibus map disabled. The RQDX3 simulator has run a complete RSTS/E SYSGEN, with multiple drives, and booted the completed system from scratch. 2.3 VAX The VAX simulator will run the boot code up to the >>> prompt. It can successfully process a SHOW DEVICE command. It runs the HCORE instruction diagnostic. It can boot the hobbyist CD through SYSBOOT and through the date/time dialog and restore the hobbyist CD, using standalone backup. On the boot of the restored disk, it gets to the date/time dialog, and then crashes. 2.4 SDS 940 The SDS 940 is untested, awaiting real code. 2.5 GCC Optimization At -O2 and above, GCC does not correctly compile the simulators which use setjmp-longjmp (PDP-11, PDP-10, VAX). A working hypothesis is that optimized state maintained in registers is being used in the setjmp processing routine. On the PDP-11 and PDP-10, all of this state has been either made global, or volatile, to encourage GCC to keep the state up to date in memory. The VAX is still vulnerable. 3. Work list 3.1 SCP - Better ENABLE/DISABLE. 3.2 PDP-11 RQDX3 Software mapped mode, RCT read simulation, VMS debug.
244 lines
7.4 KiB
C
244 lines
7.4 KiB
C
/* pdp18b_tt1.c: 18b PDP's second Teletype
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Copyright (c) 1993-2001, Robert M Supnik
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Permission is hereby granted, free of charge, to any person obtaining a
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copy of this software and associated documentation files (the "Software"),
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to deal in the Software without restriction, including without limitation
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the rights to use, copy, modify, merge, publish, distribute, sublicense,
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and/or sell copies of the Software, and to permit persons to whom the
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Software is furnished to do so, subject to the following conditions:
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The above copyright notice and this permission notice shall be included in
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all copies or substantial portions of the Software.
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THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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ROBERT M SUPNIK BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
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IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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Except as contained in this notice, the name of Robert M Supnik shall not
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be used in advertising or otherwise to promote the sale, use or other dealings
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in this Software without prior written authorization from Robert M Supnik.
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tti1 keyboard
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tto1 teleprinter
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30-Nov-01 RMS Added extended SET/SHOW support
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25-Nov-01 RMS Revised interrupt structure
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19-Sep-01 RMS Fixed typo
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17-Sep-01 RMS Changed to use terminal multiplexor library
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07-Sep-01 RMS Moved function prototypes
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10-Jun-01 RMS Cleaned up IOT decoding to reflect hardware
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*/
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#include "pdp18b_defs.h"
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#include "sim_sock.h"
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#include "sim_tmxr.h"
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#include <ctype.h>
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#define UNIT_V_UC (UNIT_V_UF + 0) /* UC only */
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#define UNIT_UC (1 << UNIT_V_UC)
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extern int32 int_hwre[API_HLVL+1];
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extern int32 tmxr_poll; /* calibrated poll */
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TMLN tt1_ldsc = { 0 }; /* line descriptors */
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TMXR tt_desc = { 1, 0, &tt1_ldsc }; /* mux descriptor */
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t_stat tti1_svc (UNIT *uptr);
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t_stat tto1_svc (UNIT *uptr);
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t_stat tti1_reset (DEVICE *dptr);
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t_stat tto1_reset (DEVICE *dptr);
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t_stat tti1_attach (UNIT *uptr, char *cptr);
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t_stat tti1_detach (UNIT *uptr);
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t_stat tti1_status (FILE *st, UNIT *uptr, int32 val, void *desc);
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/* TTI1 data structures
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tti1_dev TTI1 device descriptor
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tti1_unit TTI1 unit
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tto1_mod TTI1 modifier list
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tti1_reg TTI1 register list
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*/
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UNIT tti1_unit = { UDATA (&tti1_svc, UNIT_ATTABLE+UNIT_UC, 0), KBD_POLL_WAIT };
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REG tti1_reg[] = {
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{ ORDATA (BUF, tti1_unit.buf, 8) },
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{ FLDATA (INT, int_hwre[API_TTI1], INT_V_TTI1) },
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{ FLDATA (DONE, int_hwre[API_TTI1], INT_V_TTI1) },
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{ FLDATA (UC, tti1_unit.flags, UNIT_V_UC), REG_HRO },
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{ DRDATA (POS, tt1_ldsc.rxcnt, 31), PV_LEFT },
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{ DRDATA (TIME, tti1_unit.wait, 24), REG_NZ + PV_LEFT },
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{ NULL } };
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MTAB tti1_mod[] = {
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{ UNIT_UC, 0, "lower case", "LC", NULL },
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{ UNIT_UC, UNIT_UC, "upper case", "UC", NULL },
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{ UNIT_ATT, UNIT_ATT, "line status", NULL, NULL, &tti1_status },
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{ MTAB_XTD | MTAB_VDV | MTAB_VUN | MTAB_NMO, 0, "LINE", NULL,
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NULL, &tti1_status, NULL },
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{ 0 } };
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DEVICE tti1_dev = {
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"TTI1", &tti1_unit, tti1_reg, tti1_mod,
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1, 10, 31, 1, 8, 8,
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&tmxr_ex, &tmxr_dep, &tti1_reset,
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NULL, &tti1_attach, &tti1_detach };
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/* TTO1 data structures
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tto1_dev TTO1 device descriptor
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tto1_unit TTO1 unit
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tto1_mod TTO1 modifier list
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tto1_reg TTO1 register list
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*/
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UNIT tto1_unit = { UDATA (&tto1_svc, UNIT_UC, 0), SERIAL_OUT_WAIT };
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REG tto1_reg[] = {
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{ ORDATA (BUF, tto1_unit.buf, 8) },
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{ FLDATA (INT, int_hwre[API_TTO1], INT_V_TTO1) },
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{ FLDATA (DONE, int_hwre[API_TTO1], INT_V_TTO1) },
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{ DRDATA (POS, tt1_ldsc.txcnt, 31), PV_LEFT },
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{ DRDATA (TIME, tto1_unit.wait, 24), PV_LEFT },
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{ NULL } };
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MTAB tto1_mod[] = {
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{ UNIT_UC, 0, "lower case", "LC", NULL },
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{ UNIT_UC, UNIT_UC, "upper case", "UC", NULL },
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{ 0 } };
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DEVICE tto1_dev = {
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"TTO1", &tto1_unit, tto1_reg, tto1_mod,
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1, 10, 31, 1, 8, 8,
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NULL, NULL, &tto1_reset,
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NULL, NULL, NULL };
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/* Terminal input: IOT routine */
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int32 tti1 (int32 pulse, int32 AC)
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{
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if (pulse & 001) { /* KSF1 */
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if (TST_INT (TTI1)) AC = AC | IOT_SKP; }
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if (pulse & 002) { /* KRB1 */
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CLR_INT (TTI1); /* clear flag */
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AC= AC | tti1_unit.buf; } /* return buffer */
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return AC;
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}
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/* Unit service */
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t_stat tti1_svc (UNIT *uptr)
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{
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int32 temp, newln;
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if (tt1_ldsc.conn) { /* connected? */
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tmxr_poll_rx (&tt_desc); /* poll for input */
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if (temp = tmxr_getc_ln (&tt1_ldsc)) { /* get char */
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temp = temp & 0177;
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if ((uptr -> flags & UNIT_UC) &&
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islower (temp)) temp = toupper (temp);
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uptr -> buf = temp | 0200; /* got char */
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SET_INT (TTI1); } /* set flag */
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sim_activate (uptr, uptr -> wait); } /* continue poll */
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if (uptr -> flags & UNIT_ATT) { /* attached? */
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newln = tmxr_poll_conn (&tt_desc, uptr); /* poll connect */
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if (newln >= 0) { /* got one? */
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sim_activate (&tti1_unit, tti1_unit.wait);
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tt1_ldsc.rcve = 1; } /* rcv enabled */
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sim_activate (uptr, tmxr_poll); } /* sched poll */
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return SCPE_OK;
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}
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/* Reset routine */
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t_stat tti1_reset (DEVICE *dptr)
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{
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tti1_unit.buf = 0; /* clear buffer */
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CLR_INT (TTI1); /* clear flag */
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if (tt1_ldsc.conn) { /* if conn, */
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sim_activate (&tti1_unit, tti1_unit.wait); /* activate, */
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tt1_ldsc.rcve = 1; } /* enable */
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else if (tti1_unit.flags & UNIT_ATT) /* if attached, */
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sim_activate (&tti1_unit, tmxr_poll); /* activate */
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else sim_cancel (&tti1_unit); /* else stop */
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return SCPE_OK;
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}
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/* Terminal output: IOT routine */
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int32 tto1 (int32 pulse, int32 AC)
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{
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if (pulse & 001) { /* TSF */
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if (TST_INT (TTO1)) AC = AC | IOT_SKP; }
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if (pulse & 002) CLR_INT (TTO1); /* clear flag */
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if (pulse & 004) { /* load buffer */
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sim_activate (&tto1_unit, tto1_unit.wait); /* activate unit */
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tto1_unit.buf = AC & 0377; } /* load buffer */
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return AC;
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}
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/* Unit service */
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t_stat tto1_svc (UNIT *uptr)
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{
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int32 out;
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SET_INT (TTO1); /* set flag */
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out = tto1_unit.buf & 0177;
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if (tt1_ldsc.conn) { /* connected? */
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if (tt1_ldsc.xmte) { /* tx enabled? */
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if (!(tto1_unit.flags & UNIT_UC) ||
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((out >= 007) && (out <= 0137)))
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tmxr_putc_ln (&tt1_ldsc, out); /* output char */
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tmxr_poll_tx (&tt_desc); } /* poll xmt */
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else { tmxr_poll_tx (&tt_desc); /* poll xmt */
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sim_activate (&tto1_unit, tmxr_poll); /* wait */
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return SCPE_OK; } }
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return SCPE_OK;
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}
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/* Reset routine */
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t_stat tto1_reset (DEVICE *dptr)
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{
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tto1_unit.buf = 0; /* clear buffer */
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CLR_INT (TTO1); /* clear flag */
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sim_cancel (&tto1_unit); /* deactivate unit */
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return SCPE_OK;
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}
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/* Attach routine */
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t_stat tti1_attach (UNIT *uptr, char *cptr)
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{
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t_stat r;
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r = tmxr_attach (&tt_desc, uptr, cptr); /* attach */
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if (r != SCPE_OK) return r; /* error */
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sim_activate (uptr, tmxr_poll); /* start poll */
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return SCPE_OK;
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}
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/* Detach routine */
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t_stat tti1_detach (UNIT *uptr)
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{
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t_stat r;
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r = tmxr_detach (&tt_desc, uptr); /* detach */
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tt1_ldsc.rcve = 0; /* disable rcv */
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sim_cancel (uptr); /* stop poll */
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return r;
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}
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/* Status routine */
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t_stat tti1_status (FILE *st, UNIT *uptr, int32 val, void *desc)
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{
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tmxr_fstatus (st, &tt1_ldsc, -1);
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return SCPE_OK;
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}
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