701f0fe028
1. New Features
1.1 Directory and documentation
- Only common files (SCP and libraries) are in the top level
directory. Individual simulator files are in their individual
directories.
- simh_doc.txt has been split up. simh_doc.txt now documents
only SCP. The individual simulators are documented in separate
text files in their own directories.
- mingw_build.bat is a batch file for the MINGW/gcc environment
that will build all the simulators, assuming the root directory
structure is at c:\sim.
- Makefile is a UNIX make file for the gcc environment that will
build all the simulators, assuming the root directory is at
c:\sim.
1.2 SCP
- DO <file name> executes the SCP commands in the specified file.
- Replicated registers in unit structures can now be declared as
arrays for examine, modify, save, and restore. Most replicated
unit registers (for example, mag tape position registers) have
been changed to arrays.
- The ADD/REMOVE commands have been replaced by SET unit ONLINE
and SET unit OFFLINE, respectively.
- Register names that are unique within an entire simulator do
not have to be prefaced with the device name.
- The ATTACH command can attach files read only, either under
user option (-r), or because the attached file is ready only.
- The SET/SHOW capabilities have been extended. New forms include:
SET <dev> param{=value}{ param ...}
SET <unit> param{=value}{ param ...}
SHOW <dev> {param param ...}
SHOW <unit> {param param ...}
- Multiple breakpoints have been implemented. Breakpoints are
set/cleared/displayed by:
BREAK addr_list{[count]}
NOBREAK addr_list
SHOW BREAK addr_list
1.3 PDP-11 simulator
- Unibus map implemented, with 22b RP controller (URH70) or 18b
RP controller (URH11) (in debug).
- All DMA peripherals rewritten to use map.
- Many peripherals modified for source sharing with VAX.
- RQDX3 implemented.
- Bugs fixed in RK11 and RL11 write check.
1.4 PDP-10 simulator
- ITS 1-proceed implemented.
- Bugs fixed in ITS PC sampling and LPMR
1.5 18b PDP simulator
- Interrupts split out to multiple levels to allow easier
expansion.
1.5 IBM System 3 Simulator
- Written by Charles (Dutch) Owen.
1.6 VAX Simulator (in debug)
- Simulates MicroVAX 3800 (KA655) with 16MB-64MB memory, RQDX3,
RLV12, TSV11, DZV11, LPV11, PCV11.
- CDROM capability has been added to the RQDX3, to allow testing
with VMS hobbyist images.
1.7 SDS 940 Simulator (not tested)
- Simulates SDS 940, 16K-64K memory, fixed and moving head
disk, magtape, line printer, console.
1.8 Altair Z80
- Revised from Charles (Dutch) Owen's original by Peter Schorn.
- MITS 8080 with full Z80 simulation.
- 4K and 8K BASIC packages, Prolog package.
1.9 Interdata
The I4 simulator has been withdrawn for major rework. Look for
a complete 16b/32b Interdata simulator sometime next year.
2. Release Notes
2.1 SCP
SCP now allows replicated registers in unit structures to be
modelled as arrays. All replicated register declarations have
been replaced by register array declarations. As a result,
save files from prior revisions will generate errors after
restoring main memory.
2.2 PDP-11
The Unibus map code is in debug. The map was implemented primarily
to allow source sharing with the VAX, which requires a DMA map.
DMA devices work correctly with the Unibus map disabled.
The RQDX3 simulator has run a complete RSTS/E SYSGEN, with multiple
drives, and booted the completed system from scratch.
2.3 VAX
The VAX simulator will run the boot code up to the >>> prompt. It
can successfully process a SHOW DEVICE command. It runs the HCORE
instruction diagnostic. It can boot the hobbyist CD through SYSBOOT
and through the date/time dialog and restore the hobbyist CD, using
standalone backup. On the boot of the restored disk, it gets to the
date/time dialog, and then crashes.
2.4 SDS 940
The SDS 940 is untested, awaiting real code.
2.5 GCC Optimization
At -O2 and above, GCC does not correctly compile the simulators which
use setjmp-longjmp (PDP-11, PDP-10, VAX). A working hypothesis is
that optimized state maintained in registers is being used in the
setjmp processing routine. On the PDP-11 and PDP-10, all of this
state has been either made global, or volatile, to encourage GCC to
keep the state up to date in memory. The VAX is still vulnerable.
3. Work list
3.1 SCP
- Better ENABLE/DISABLE.
3.2 PDP-11 RQDX3
Software mapped mode, RCT read simulation, VMS debug.
143 lines
5.9 KiB
C
143 lines
5.9 KiB
C
/* pdp8_defs.h: PDP-8 simulator definitions
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Copyright (c) 1993-2001, Robert M Supnik
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Permission is hereby granted, free of charge, to any person obtaining a
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copy of this software and associated documentation files (the "Software"),
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to deal in the Software without restriction, including without limitation
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the rights to use, copy, modify, merge, publish, distribute, sublicense,
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and/or sell copies of the Software, and to permit persons to whom the
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Software is furnished to do so, subject to the following conditions:
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The above copyright notice and this permission notice shall be included in
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all copies or substantial portions of the Software.
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THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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ROBERT M SUPNIK BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
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IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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Except as contained in this notice, the name of Robert M Supnik shall not
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be used in advertising or otherwise to promote the sale, use or other dealings
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in this Software without prior written authorization from Robert M Supnik.
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25-Nov-01 RMS Added RL8A support
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16-Sep-01 RMS Added multiple KL support
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18-Mar-01 RMS Added DF32 support
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15-Feb-01 RMS Added DECtape support
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14-Apr-99 RMS Changed t_addr to unsigned
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19-Mar-95 RMS Added dynamic memory size
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02-May-94 RMS Added non-existent memory handling
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The author gratefully acknowledges the help of Max Burnet, Richie Lary,
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and Bill Haygood in resolving questions about the PDP-8
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*/
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#include "sim_defs.h" /* simulator defns */
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/* Simulator stop codes */
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#define STOP_RSRV 1 /* must be 1 */
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#define STOP_HALT 2 /* HALT */
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#define STOP_IBKPT 3 /* breakpoint */
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/* Memory */
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#define MAXMEMSIZE 32768 /* max memory size */
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#define MEMSIZE (cpu_unit.capac) /* actual memory size */
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#define ADDRMASK (MAXMEMSIZE - 1) /* address mask */
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#define MEM_ADDR_OK(x) (((t_addr) (x)) < MEMSIZE)
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/* IOT subroutine return codes */
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#define IOT_V_SKP 12 /* skip */
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#define IOT_V_REASON 13 /* reason */
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#define IOT_SKP (1 << IOT_V_SKP)
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#define IOT_REASON (1 << IOT_V_REASON)
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#define IORETURN(f,v) ((f)? (v): SCPE_OK) /* stop on error */
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/* Interrupt flags
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The interrupt flags consist of three groups:
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1. Devices with individual interrupt enables. These record
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their interrupt requests in device_done and their enables
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in device_enable, and must occupy the low bit positions.
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2. Devices without interrupt enables. These record their
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interrupt requests directly in int_req, and must occupy
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the middle bit positions.
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3. Overhead. These exist only in int_req and must occupy the
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high bit positions.
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Because the PDP-8 does not have priority interrupts, the order
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of devices within groups does not matter.
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Note: all extra KL input and output interrupts must be assigned
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to contiguous bits.
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*/
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#define INT_V_START 0 /* enable start */
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#define INT_V_LPT (INT_V_START+0) /* line printer */
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#define INT_V_PTP (INT_V_START+1) /* tape punch */
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#define INT_V_PTR (INT_V_START+2) /* tape reader */
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#define INT_V_TTO (INT_V_START+3) /* terminal */
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#define INT_V_TTI (INT_V_START+4) /* keyboard */
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#define INT_V_CLK (INT_V_START+5) /* clock */
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#define INT_V_TTO1 (INT_V_START+6) /* tto1 */
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#define INT_V_TTO2 (INT_V_START+7) /* tto2 */
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#define INT_V_TTO3 (INT_V_START+8) /* tto3 */
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#define INT_V_TTO4 (INT_V_START+9) /* tto4 */
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#define INT_V_TTI1 (INT_V_START+10) /* tti1 */
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#define INT_V_TTI2 (INT_V_START+11) /* tti2 */
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#define INT_V_TTI3 (INT_V_START+12) /* tti3 */
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#define INT_V_TTI4 (INT_V_START+13) /* tti4 */
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#define INT_V_DIRECT (INT_V_START+14) /* direct start */
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#define INT_V_RX (INT_V_DIRECT+0) /* RX8E */
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#define INT_V_RK (INT_V_DIRECT+1) /* RK8E */
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#define INT_V_RF (INT_V_DIRECT+2) /* RF08 */
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#define INT_V_DF (INT_V_DIRECT+3) /* DF32 */
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#define INT_V_MT (INT_V_DIRECT+4) /* TM8E */
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#define INT_V_DTA (INT_V_DIRECT+5) /* TC08 */
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#define INT_V_RL (INT_V_DIRECT+6) /* RL8A */
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#define INT_V_PWR (INT_V_DIRECT+7) /* power int */
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#define INT_V_UF (INT_V_DIRECT+8) /* user int */
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#define INT_V_OVHD (INT_V_DIRECT+9) /* overhead start */
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#define INT_V_NO_ION_PENDING (INT_V_OVHD+0) /* ion pending */
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#define INT_V_NO_CIF_PENDING (INT_V_OVHD+1) /* cif pending */
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#define INT_V_ION (INT_V_OVHD+2) /* interrupts on */
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#define INT_LPT (1 << INT_V_LPT)
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#define INT_PTP (1 << INT_V_PTP)
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#define INT_PTR (1 << INT_V_PTR)
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#define INT_TTO (1 << INT_V_TTO)
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#define INT_TTI (1 << INT_V_TTI)
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#define INT_CLK (1 << INT_V_CLK)
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#define INT_TTO1 (1 << INT_V_TTO1)
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#define INT_TTO2 (1 << INT_V_TTO2)
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#define INT_TTO3 (1 << INT_V_TTO3)
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#define INT_TTO4 (1 << INT_V_TTO4)
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#define INT_TTI1 (1 << INT_V_TTI1)
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#define INT_TTI2 (1 << INT_V_TTI2)
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#define INT_TTI3 (1 << INT_V_TTI3)
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#define INT_TTI4 (1 << INT_V_TTI4)
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#define INT_RX (1 << INT_V_RX)
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#define INT_RK (1 << INT_V_RK)
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#define INT_RF (1 << INT_V_RF)
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#define INT_DF (1 << INT_V_DF)
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#define INT_MT (1 << INT_V_MT)
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#define INT_DTA (1 << INT_V_DTA)
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#define INT_RL (1 << INT_V_RL)
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#define INT_PWR (1 << INT_V_PWR)
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#define INT_UF (1 << INT_V_UF)
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#define INT_NO_ION_PENDING (1 << INT_V_NO_ION_PENDING)
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#define INT_NO_CIF_PENDING (1 << INT_V_NO_CIF_PENDING)
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#define INT_ION (1 << INT_V_ION)
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#define INT_DEV_ENABLE ((1 << INT_V_DIRECT) - 1) /* devices w/enables */
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#define INT_ALL ((1 << INT_V_OVHD) - 1) /* all interrupts */
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#define INT_INIT_ENABLE (INT_TTI+INT_TTO+INT_PTR+INT_PTP+INT_LPT)
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#define INT_PENDING (INT_ION+INT_NO_CIF_PENDING+INT_NO_ION_PENDING)
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#define INT_UPDATE ((int_req & ~INT_DEV_ENABLE) | (dev_done & int_enable))
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