304 lines
16 KiB
C
304 lines
16 KiB
C
/* i1401_defs.h: IBM 1401 simulator definitions
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Copyright (c) 1993-2010, Robert M. Supnik
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Permission is hereby granted, free of charge, to any person obtaining a
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copy of this software and associated documentation files (the "Software"),
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to deal in the Software without restriction, including without limitation
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the rights to use, copy, modify, merge, publish, distribute, sublicense,
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and/or sell copies of the Software, and to permit persons to whom the
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Software is furnished to do so, subject to the following conditions:
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The above copyright notice and this permission notice shall be included in
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all copies or substantial portions of the Software.
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THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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ROBERT M SUPNIK BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
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IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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Except as contained in this notice, the name of Robert M Supnik shall not be
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used in advertising or otherwise to promote the sale, use or other dealings
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in this Software without prior written authorization from Robert M Supnik.
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06-JUl-10 RMS Added overlap indicator definitions
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22-May-10 RMS Added check for 64b definitions
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11-Jul-08 RMS Added IO mode flag for boot (from Bob Abeles)
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28-Jun-07 RMS Defined character code for tape mark
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14-Nov-04 RMS Added column binary support
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27-Oct-04 RMS Added maximum instruction length
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16-Mar-03 RMS Fixed mnemonic for MCS
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03-Jun-02 RMS Added 1311 support
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14-Apr-99 RMS Converted t_addr to unsigned
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This simulator is based on the 1401 simulator written by Len Fehskens
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with assistance from Sarah Lee Harris and Bob Supnik. This one's for
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you, Len. I am grateful to Paul Pierce and Charles Owen for their help
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in answering questions, gathering source material, and debugging.
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*/
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#ifndef I1401_DEFS_H_
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#define I1401_DEFS_H_ 0
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#include "sim_defs.h"
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#if defined(USE_INT64) || defined(USE_ADDR64)
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#error "1401 does not support 64b values!"
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#endif
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/* Simulator stop codes */
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#define STOP_NXI 1 /* unimpl instr */
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#define STOP_NXM 2 /* non-exist mem */
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#define STOP_NXD 3 /* non-exist dev */
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#define STOP_NOWM 4 /* no WM under op */
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#define STOP_INVA 5 /* invalid A addr */
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#define STOP_INVB 6 /* invalid B addr */
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#define STOP_INVL 7 /* invalid length */
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#define STOP_INVM 8 /* invalid modifier */
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#define STOP_INVBR 9 /* invalid branch */
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#define STOP_IBKPT 10 /* breakpoint */
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#define STOP_HALT 11 /* halt */
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#define STOP_INVMTU 12 /* invalid MT unit */
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#define STOP_MTZ 13 /* MT zero lnt rec */
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#define STOP_MTL 14 /* MT write lock */
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#define STOP_CCT 15 /* inv CCT channel */
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#define STOP_NOCD 16 /* no cards left */
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#define STOP_WRAP 17 /* AS, BS mem wrap */
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#define STOP_IOC 18 /* I/O check */
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#define STOP_INVDSC 19 /* invalid disk sector */
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#define STOP_INVDCN 20 /* invalid disk count */
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#define STOP_INVDSK 21 /* invalid disk unit */
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#define STOP_INVDFN 22 /* invalid disk func */
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#define STOP_INVDLN 23 /* invalid disk reclen */
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#define STOP_WRADIS 24 /* write address dis */
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#define STOP_WRCHKE 25 /* write check error */
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#define STOP_INVDAD 26 /* invalid disk addr */
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#define STOP_INVDCY 27 /* invalid direct seek */
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/* Memory and devices */
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#define MAXMEMSIZE 16000 /* max memory */
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#define MEMSIZE (cpu_unit.capac) /* current memory */
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#define CDR_BUF 1 /* card rdr buffer */
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#define CDR_WIDTH 80 /* card rdr width */
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#define CDP_BUF 101 /* card punch buffer */
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#define CDP_WIDTH 80 /* card punch width */
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#define CD_CBUF1 401 /* r/p col bin buf 12-3 */
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#define CD_CBUF2 501 /* r/p col bin buf 4-9 */
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#define LPT_BUF 201 /* line print buffer */
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#define LPT_WIDTH 132 /* line print width */
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#define CCT_LNT 132 /* car ctrl length */
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#define INQ_WIDTH 80 /* inq term width */
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#define ADDR_ERR(x) (((uint32) (x)) >= MEMSIZE)
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/* Binary address format
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<14:0> address, with index added in
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<23:16> index register memory address
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<25:24> address error bits
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*/
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#define ADDRMASK 037777 /* addr mask */
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#define INDEXMASK 077777 /* addr + index mask */
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#define V_INDEX 16
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#define M_INDEX 0177
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#define V_ADDRERR 24
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#define BA (1 << V_ADDRERR) /* bad addr digit */
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#define X1 (87 << V_INDEX) /* index reg 1 */
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#define X2 (92 << V_INDEX) /* index reg 2 */
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#define X3 (97 << V_INDEX) /* index reg 3 */
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/* CPU instruction control flags. The flag definitions must be harmonized
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with the UNIT flag definitions used by the simulator. */
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/* Lengths */
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#define L1 0001 /* 1: op */
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#define L2 0002 /* 2: op d */
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#define L4 0004 /* 4: op aaa */
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#define L5 0010 /* 5: op aaa d */
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#define L7 0020 /* 7: op aaa bbb */
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#define L8 0040 /* 8: op aaa bbb d */
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#define MAX_L 8 /* max length */
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/* CPU options, stored in cpu_unit.flags */
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#define MDV (1 << (UNIT_V_UF + 0)) /* multiply/divide */
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#define MR (1 << (UNIT_V_UF + 1)) /* move record */
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#define XSA (1 << (UNIT_V_UF + 2)) /* index, store addr */
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#define EPE (1 << (UNIT_V_UF + 3)) /* expanded edit */
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#define MA (1 << (UNIT_V_UF + 4)) /* modify address */
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#define BBE (1 << (UNIT_V_UF + 5)) /* br bit equal */
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#define HLE (1 << (UNIT_V_UF + 6)) /* high/low/equal */
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#define UNIT_MSIZE (1 << (UNIT_V_UF + 7)) /* fake flag */
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#define ALLOPT (MDV + MR + XSA + EPE + MA + BBE + HLE)
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#define STDOPT (MDV + MR + XSA + EPE + MA + BBE + HLE)
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/* Fetch control */
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#define AREQ (1 << (UNIT_V_UF + 8)) /* validate A */
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#define BREQ (1 << (UNIT_V_UF + 9)) /* validate B */
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#define MLS (1 << (UNIT_V_UF + 10)) /* move load store */
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#define NOWM (1 << (UNIT_V_UF + 11)) /* no WM at end */
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#define HNOP (1 << (UNIT_V_UF + 12)) /* halt or nop */
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#define IO (1 << (UNIT_V_UF + 13)) /* IO */
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#define UNIT_BCD (1 << (UNIT_V_UF + 14)) /* BCD strings */
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#if (UNIT_V_UF < 6) || ((UNIT_V_UF + 14) > 31)
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Definition error: flags overlap
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#endif
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/* BCD memory character format */
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#define WM 0100 /* word mark */
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#define ZONE 0060 /* zone */
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#define BBIT 0040 /* 1 in valid sign */
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#define ABIT 0020 /* sign (1 = +) */
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#define DIGIT 0017 /* digit */
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#define CHAR 0077 /* character */
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#define V_WM 6
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#define V_ZONE 4
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#define V_DIGIT 0
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/* Interesting BCD characters */
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#define BCD_BLANK 000
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#define BCD_ONE 001
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#define BCD_TWO 002
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#define BCD_THREE 003
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#define BCD_FOUR 004
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#define BCD_FIVE 005
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#define BCD_SIX 006
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#define BCD_SEVEN 007
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#define BCD_EIGHT 010
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#define BCD_NINE 011
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#define BCD_ZERO 012
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#define BCD_TAPMRK 017
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#define BCD_ALT 020
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#define BCD_S 022
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#define BCD_U 024
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#define BCD_W 026
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#define BCD_RECMRK 032
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#define BCD_COMMA 033
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#define BCD_PERCNT 034
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#define BCD_WM 035
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#define BCD_BS 036
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#define BCD_TS 037
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#define BCD_MINUS 040
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#define BCD_M 044
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#define BCD_R 051
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#define BCD_DOLLAR 053
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#define BCD_ASTER 054
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#define BCD_AMPER 060
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#define BCD_A 061
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#define BCD_B 062
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#define BCD_C 063
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#define BCD_E 065
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#define BCD_DECIMAL 073
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#define BCD_SQUARE 074
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#define BCD_GRPMRK 077
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/* Opcodes */
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#define OP_R 001 /* read */
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#define OP_W 002 /* write */
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#define OP_WR 003 /* write and read */
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#define OP_P 004 /* punch */
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#define OP_RP 005 /* read and punch */
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#define OP_WP 006 /* write and punch */
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#define OP_WRP 007 /* write read punch */
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#define OP_RF 010 /* reader feed */
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#define OP_PF 011 /* punch feed */
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#define OP_MA 013 /* modify address */
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#define OP_MUL 014 /* multiply */
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#define OP_CS 021 /* clear storage */
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#define OP_S 022 /* subtract */
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#define OP_MTF 024 /* magtape function */
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#define OP_BWZ 025 /* branch wm or zone */
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#define OP_BBE 026 /* branch bit equal */
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#define OP_MZ 030 /* move zone */
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#define OP_MCS 031 /* move suppr zeroes */
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#define OP_SWM 033 /* set word mark */
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#define OP_DIV 034 /* divide */
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#define OP_SS 042 /* select stacker */
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#define OP_LCA 043 /* load characters */
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#define OP_MCW 044 /* move characters */
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#define OP_NOP 045 /* no op */
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#define OP_MCM 047 /* move to rec/grp mk */
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#define OP_SAR 050 /* store A register */
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#define OP_ZS 052 /* zero and subtract */
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#define OP_A 061 /* add */
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#define OP_B 062 /* branch */
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#define OP_C 063 /* compare */
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#define OP_MN 064 /* move numeric */
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#define OP_MCE 065 /* move char and edit */
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#define OP_CC 066 /* carriage control */
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#define OP_SBR 070 /* store B register */
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#define OP_ZA 072 /* zero and add */
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#define OP_H 073 /* halt */
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#define OP_CWM 074 /* clear word mark */
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/* I/O addresses */
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#define IO_INQ 023 /* inquiry terminal */
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#define IO_MT 024 /* magtape */
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#define IO_MTB 062 /* binary magtape */
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#define IO_DP 066 /* 1311 diskpack */
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/* I/O modes */
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#define MD_NORM 0 /* normal (move) */
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#define MD_WM 1 /* word mark (load) */
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#define MD_BIN 2 /* binary */
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#define MD_BOOT 4 /* boot read */
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/* Indicator characters */
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#define IN_UNC 000 /* unconditional */
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#define IN_CC9 011 /* carr ctrl chan 9 */
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#define IN_CC12 014 /* carr ctrl chan 12 */
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#define IN_UNQ 021 /* unequal */
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#define IN_EQU 022 /* equal */
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#define IN_LOW 023 /* low */
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#define IN_HGH 024 /* high */
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#define IN_DPW 025 /* parity/compare check */
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#define IN_LNG 026 /* wrong lnt record */
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#define IN_UNA 027 /* unequal addr cmp */
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#define IN_DSK 030 /* disk error */
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#define IN_OVF 031 /* overflow */
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#define IN_LPT 032 /* printer error */
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#define IN_PRO 034 /* process check */
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#define IN_DBY 036 /* disk busy */
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#define IN_TBY 041 /* tape busy */
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#define IN_END 042 /* end indicator */
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#define IN_TAP 043 /* tape error */
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#define IN_ACC 045 /* access error */
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#define IN_BSY 047 /* printer busy */
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#define IN_INR 050 /* inquiry request */
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#define IN_PCB 051 /* printer carr busy */
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#define IN_PNCH 052 /* punch error */
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#define IN_INC 054 /* inquiry clear */
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#define IN_LST 061 /* last card */
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#define IN_SSB 062 /* sense switch B */
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#define IN_SSC 063 /* sense switch C */
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#define IN_SSD 064 /* sense switch D */
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#define IN_SSE 065 /* sense switch E */
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#define IN_SSF 066 /* sense switch F */
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#define IN_SSG 067 /* sense switch G */
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#define IN_RBY 070 /* reader busy */
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#define IN_PBY 071 /* punch busy */
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#define IN_READ 072 /* reader error */
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#define CRETIOE(f,c) return ((f)? (c): SCPE_OK)
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/* Function prototypes */
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int32 bcd2ascii (int32 c, t_bool use_h);
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int32 ascii2bcd (int32 c);
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#endif
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