5531ccb175
These changes facilitate more robust parameter type checking and helps to identify unexpected coding errors. Most simulators can now also be compiled with a C++ compiler without warnings. Additionally, these changes have also been configured to facilitate easier backporting of simulator and device simulation modules to run under the simh v3.9+ SCP framework.
494 lines
19 KiB
C
494 lines
19 KiB
C
/* pdp11_kg.c - Communications Arithmetic Option KG11-A
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Copyright (c) 2007-2010, John A. Dundas III
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Permission is hereby granted, free of charge, to any person obtaining a
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copy of this software and associated documentation files (the "Software"),
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to deal in the Software without restriction, including without limitation
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the rights to use, copy, modify, merge, publish, distribute, sublicense,
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and/or sell copies of the Software, and to permit persons to whom the
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Software is furnished to do so, subject to the following conditions:
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The above copyright notice and this permission notice shall be included in
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all copies or substantial portions of the Software.
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THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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ROBERT M SUPNIK BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
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IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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Except as contained in this notice, the name of the author shall not be
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used in advertising or otherwise to promote the sale, use or other dealings
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in this Software without prior written authorization from the author.
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kg KG11-A Communications Arithmetic Option (M7251)
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03-Jan-10 JAD Eliminate gcc warnings
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08-Jan-08 JAD First public release integrated with SIMH V3.7-3.
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09-Dec-07 JAD SIMH-style debugging.
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Finished validating against real hardware.
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Support for up to 8 units, the maximum.
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Keep all module data in the UNIT structure.
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Clean up bit and mask definitions.
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01-Dec-07 JAD Now work on the corner cases that the
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diagnostic does not check.
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CLR does not clear the QUO bit.
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Correct SR write logic.
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29-Nov-07 JAD Original implementation and testing based on
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an idea from 07-Jul-03. Passes the ZKGAB0
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diagnostic.
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Information necessary to create this simulation was gathered from
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a number of sources including:
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KG11-A Exclusive-OR and CRC block check manual, DEC-11-HKGAA-B-D
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<http://www.computer.museum.uq.edu.au/pdf/DEC-11-HKGAA-B-D%20KG11-A%20Exclusive-OR%20and%20CRC%20Block%20Check%20Manual.pdf>
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Maintenance print set
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<http://bitsavers.org/pdf/dec/unibus/KG11A_EngrDrws.pdf>
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A Painless Guide to CRC Error Detection Algorithms, Ross N. Williams
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<http://www.ross.net/crc/download/crc_v3.txt">
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The original PDP-11 instruction set, as implemented in the /20,
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/15, /10, and /5, did not include XOR. [One of the differences
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tables incorrectly indicates the /04 does not implement this
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instruction.] This device implements XOR, XORB, and a variety of
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CRCs.
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The maintenance prints indicate that the device was probably available
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starting in late 1971. May need to check further. The first edition
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of the manual was May 1972.
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The device was still sold at least as late as mid-1982 according
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to the PDP-11 Systems and Options Summary. RSTS/E included support
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for up to 8 units in support of the 2780 emulation or for use with
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DP11, DU11, or DUP11. The device appears to have been retired by
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1983-03, and possibly earlier.
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I/O Page Registers
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SR 7707x0 (read-write) status
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BCC 7707x2 (read-only) BCC (block check character)
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DR 7707x4 (write-only) data
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Vector: none
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Priority: none
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The KG11-A is a programmed-I/O, non-interrupting device. Therefore
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no vector or bus request level are necessary. It is a Unibus device
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but since it does not address memory itself (it only presents
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registers in the I/O page) it is compatible with extended Unibus
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machines (22-bit) as well as traditional Unibus.
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Implements 5 error detection codes:
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LRC-8
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LRC-16
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CRC-12
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CRC-16
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CRC-CCITT
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*/
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#if !defined (VM_PDP11)
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#error "KG11 is not supported!"
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#endif
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#include "pdp11_defs.h"
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extern REG cpu_reg[];
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extern int32 R[];
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#ifndef KG_UNITS
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#define KG_UNITS (8)
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#endif
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/* Control and Status Register */
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#define KGSR_V_QUO (8) /* RO */
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#define KGSR_V_DONE (7) /* RO */
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#define KGSR_V_SEN (6) /* R/W shift enable */
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#define KGSR_V_STEP (5) /* W */
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#define KGSR_V_CLR (4) /* W */
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#define KGSR_V_DDB (3) /* R/W double data byte */
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#define KGSR_V_CRCIC (2) /* R/W */
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#define KGSR_V_LRC (1) /* R/W */
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#define KGSR_V_16 (0) /* R/W */
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#define KGSR_M_QUO (1u << KGSR_V_QUO)
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#define KGSR_M_DONE (1u << KGSR_V_DONE)
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#define KGSR_M_SEN (1u << KGSR_V_SEN)
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#define KGSR_M_STEP (1u << KGSR_V_STEP)
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#define KGSR_M_CLR (1u << KGSR_V_CLR)
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#define KGSR_M_DDB (1u << KGSR_V_DDB)
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#define KGSR_M_CRCIC (1u << KGSR_V_CRCIC)
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#define KGSR_M_LRC (1u << KGSR_V_LRC)
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#define KGSR_M_16 (1u << KGSR_V_16)
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#define KG_SR_RDMASK (KGSR_M_QUO | KGSR_M_DONE | KGSR_M_SEN | KGSR_M_DDB | \
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KGSR_M_CRCIC | KGSR_M_LRC | KGSR_M_16)
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#define KG_SR_WRMASK (KGSR_M_SEN | KGSR_M_DDB | KGSR_M_CRCIC | \
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KGSR_M_LRC | KGSR_M_16)
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#define KG_SR_POLYMASK (KGSR_M_CRCIC|KGSR_M_LRC|KGSR_M_16)
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/* Unit structure redefinitions */
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#define SR u3
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#define BCC u4
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#define DR u5
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#define PULSCNT u6
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#define POLY_LRC8 (0x0008)
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#define POLY_LRC16 (0x0080)
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#define POLY_CRC12 (0x0f01)
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#define POLY_CRC16 (0xa001)
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#define POLY_CCITT (0x8408)
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static const struct {
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uint16 poly;
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uint16 pulses;
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const char * const name;
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} config[] = {
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/* DDB=0 */
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{ POLY_CRC12, 6, "CRC-12" },
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{ POLY_CRC16, 8, "CRC-16" },
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{ POLY_LRC8, 8, "LRC-8" },
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{ POLY_LRC16, 8, "LRC-16" },
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{ 0, 0, "undefined" },
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{ POLY_CCITT, 8, "CRC-CCITT" },
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{ 0, 0, "undefined" },
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{ 0, 0, "undefined" },
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/* DDB=1 */
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{ POLY_CRC12, 12, "CRC-12" },
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{ POLY_CRC16, 16, "CRC-16" },
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{ POLY_LRC8, 16, "LRC-8" },
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{ POLY_LRC16, 16, "LRC-16" },
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{ 0, 0, "undefined" },
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{ POLY_CCITT, 16, "CRC-CCITT" },
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{ 0, 0, "undefined" },
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{ 0, 0, "undefined" }
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};
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/* Forward declarations */
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static t_stat kg_rd (int32 *, int32, int32);
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static t_stat kg_wr (int32, int32, int32);
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static t_stat kg_reset (DEVICE *);
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static void do_poly (int, t_bool);
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static t_stat set_units (UNIT *, int32, CONST char *, void *);
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t_stat kg_help (FILE *st, DEVICE *dptr, UNIT *uptr, int32 flag, const char *cptr);
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const char *kg_description (DEVICE *dptr);
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/* 16-bit rotate right */
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#define ROR(n,v) (((v >> n) & DMASK) | ((v << (16 - n)) & DMASK))
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/* 8-bit rotate right */
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#define RORB(n,v) (((v & 0377) >> n) | ((v << (8 - n)) & 0377))
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/* KG data structures
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kg_dib KG PDP-11 device information block
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kg_unit KG unit descriptor
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kg_reg KG register list
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kg_mod KG modifiers table
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kg_debug KG debug names table
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kg_dev KG device descriptor
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*/
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#define IOLN_KG 006
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static DIB kg_dib = {
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IOBA_AUTO,
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(IOLN_KG + 2) * KG_UNITS,
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&kg_rd,
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&kg_wr,
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0, 0, 0, { NULL }, IOLN_KG+2
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};
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static UNIT kg_unit[] = {
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{ UDATA (NULL, 0, 0) },
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{ UDATA (NULL, UNIT_DISABLE + UNIT_DIS, 0) },
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{ UDATA (NULL, UNIT_DISABLE + UNIT_DIS, 0) },
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{ UDATA (NULL, UNIT_DISABLE + UNIT_DIS, 0) },
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{ UDATA (NULL, UNIT_DISABLE + UNIT_DIS, 0) },
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{ UDATA (NULL, UNIT_DISABLE + UNIT_DIS, 0) },
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{ UDATA (NULL, UNIT_DISABLE + UNIT_DIS, 0) },
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{ UDATA (NULL, UNIT_DISABLE + UNIT_DIS, 0) },
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};
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static const REG kg_reg[] = {
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{ URDATAD (SR, kg_unit[0].SR, DEV_RDX, 16, 0, KG_UNITS, 0, "control and status register; R/W") },
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{ URDATAD (BCC, kg_unit[0].BCC, DEV_RDX, 16, 0, KG_UNITS, 0, "result block check character; R/O") },
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{ URDATAD (DR, kg_unit[0].DR, DEV_RDX, 16, 0, KG_UNITS, 0, "input data register; W/O") },
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{ URDATAD (PULSCNT, kg_unit[0].PULSCNT, DEV_RDX, 16, 0, KG_UNITS, 0, "polynomial cycle stage") },
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{ ORDATA (DEVADDR, kg_dib.ba, 32), REG_HRO },
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{ NULL }
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};
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static const MTAB kg_mod[] = {
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{ MTAB_XTD|MTAB_VDV|MTAB_VALR, 020, "ADDRESS", NULL,
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NULL, &show_addr, NULL, "Bus address" },
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{ MTAB_XTD|MTAB_VDV, 0, NULL, "UNITS=1..8",
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&set_units, NULL, NULL, "Specify number of KG devices" },
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{ 0 }
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};
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#define DBG_REG (01)
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#define DBG_POLY (02)
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#define DBG_CYCLE (04)
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static const DEBTAB kg_debug[] = {
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{"REG", DBG_REG},
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{"POLY", DBG_POLY},
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{"CYCLE", DBG_CYCLE},
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{0},
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};
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DEVICE kg_dev = {
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"KG", (UNIT *) &kg_unit, (REG *) kg_reg, (MTAB *) kg_mod,
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KG_UNITS, 8, 16, 2, 8, 16,
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NULL, /* examine */
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NULL, /* deposit */
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&kg_reset, /* reset */
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NULL, /* boot */
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NULL, /* attach */
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NULL, /* detach */
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&kg_dib,
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DEV_DISABLE | DEV_DIS | DEV_UBUS | DEV_DEBUG,
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0, /* debug control */
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(DEBTAB *) &kg_debug, /* debug flags */
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NULL, /* memory size chage */
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NULL, /* logical name */
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&kg_help, /* help */
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NULL, /* attach help */
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NULL, /* help context */
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&kg_description, /* description */
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};
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/* KG I/O address routines */
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static t_stat kg_rd (int32 *data, int32 PA, int32 access)
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{
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int unit = (PA >> 3) & 07;
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if ((unit >= KG_UNITS) || (kg_unit[unit].flags & UNIT_DIS))
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return (SCPE_NXM);
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switch ((PA >> 1) & 03) {
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case 00: /* SR */
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if (DEBUG_PRI(kg_dev, DBG_REG))
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fprintf (sim_deb, ">>KG%d: rd SR %06o, PC %06o\n",
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unit, kg_unit[unit].SR, PC);
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*data = kg_unit[unit].SR & KG_SR_RDMASK;
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break;
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case 01: /* BCC */
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if (DEBUG_PRI(kg_dev, DBG_REG))
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fprintf (sim_deb, ">>KG%d rd BCC %06o, PC %06o\n",
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unit, kg_unit[unit].BCC, PC);
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*data = kg_unit[unit].BCC & DMASK;
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break;
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case 02: /* DR */
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break;
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default:
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break;
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}
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return (SCPE_OK);
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}
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static t_stat kg_wr (int32 data, int32 PA, int32 access)
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{
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int setup;
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int unit = (PA >> 3) & 07;
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if ((unit >= KG_UNITS) || (kg_unit[unit].flags & UNIT_DIS))
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return (SCPE_NXM);
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switch ((PA >> 1) & 03) {
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case 00: /* SR */
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if (access == WRITEB)
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data = (PA & 1) ?
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(kg_unit[unit].SR & 0377) | (data << 8) :
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(kg_unit[unit].SR & ~0377) | data;
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if (DEBUG_PRI(kg_dev, DBG_REG))
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fprintf (sim_deb, ">>KG%d: wr SR %06o, PC %06o\n",
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unit, data, PC);
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if (data & KGSR_M_CLR) {
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kg_unit[unit].PULSCNT = 0; /* not sure about this */
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kg_unit[unit].BCC = 0;
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kg_unit[unit].SR |= KGSR_M_DONE;
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}
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setup = (kg_unit[unit].SR & 017) ^ (data & 017);
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kg_unit[unit].SR = (kg_unit[unit].SR & ~KG_SR_WRMASK) |
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(data & KG_SR_WRMASK);
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/* if low 4b changed, reset C1 & C2 */
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if (setup) {
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kg_unit[unit].PULSCNT = 0;
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if (DEBUG_PRI(kg_dev, DBG_POLY))
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fprintf (sim_deb, ">>KG%d poly %s %d\n",
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unit, config[data & 017].name, config[data & 017].pulses);
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}
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if (data & KGSR_M_SEN)
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break;
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if (data & KGSR_M_STEP) {
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do_poly (unit, TRUE);
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break;
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}
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break;
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case 01: /* BCC */
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break; /* ignored */
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case 02: /* DR */
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if (access == WRITEB)
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data = (PA & 1) ?
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(kg_unit[unit].DR & 0377) | (data << 8) :
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(kg_unit[unit].DR & ~0377) | data;
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kg_unit[unit].DR = data & DMASK;
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if (DEBUG_PRI(kg_dev, DBG_REG))
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fprintf (sim_deb, ">>KG%d: wr DR %06o, data %06o, PC %06o\n",
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unit, kg_unit[unit].DR, data, PC);
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kg_unit[unit].SR &= ~KGSR_M_DONE;
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/* In a typical device, this is normally where we would use sim_activate()
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to initiate an I/O to be completed later. The KG is a little
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different. When it was first introduced, it's computation operation
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completed before another instruction could execute (on early PDP-11s),
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and software often took "advantage" of this fact by not bothering
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to check the status of the DONE bit. In reality, the execution
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time of the polynomial is dependent upon the width of the poly; if
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8 bits 1us, if 16 bits, 2us. Since known existing software will
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break if we actually defer the computation, it is performed immediately
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instead. However this could easily be made into a run-time option,
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if there were software to validate correct operation. */
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if (kg_unit[unit].SR & KGSR_M_SEN)
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do_poly (unit, FALSE);
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break;
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default:
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break;
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}
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return (SCPE_OK);
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}
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/* KG reset */
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static t_stat kg_reset (DEVICE *dptr)
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{
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int i;
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if (DEBUG_PRI(kg_dev, DBG_REG))
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fprintf (sim_deb, ">>KG: reset PC %06o\n", PC);
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for (i = 0; i < KG_UNITS; i++) {
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kg_unit[i].SR = KGSR_M_DONE;
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kg_unit[i].BCC = 0;
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kg_unit[i].PULSCNT = 0;
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}
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return auto_config(dptr->name, (dptr->flags & DEV_DIS) ? 0 : kg_dev.numunits);
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}
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static void cycleOneBit (int unit)
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{
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int quo;
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if (DEBUG_PRI(kg_dev, DBG_CYCLE))
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fprintf (sim_deb, ">>KG%d: cycle s BCC %06o DR %06o\n",
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unit, kg_unit[unit].BCC, kg_unit[unit].DR);
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if (kg_unit[unit].SR & KGSR_M_DONE)
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return;
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if ((kg_unit[unit].SR & KG_SR_POLYMASK) == 0)
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kg_unit[unit].BCC = (kg_unit[unit].BCC & 077) |
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((kg_unit[unit].BCC >> 2) & 07700);
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kg_unit[unit].SR &= ~KGSR_M_QUO;
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quo = (kg_unit[unit].BCC & 01) ^ (kg_unit[unit].DR & 01);
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kg_unit[unit].BCC = (kg_unit[unit].BCC & ~01) | quo;
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if (kg_unit[unit].SR & KGSR_M_LRC)
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kg_unit[unit].BCC = (kg_unit[unit].SR & KGSR_M_16) ?
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ROR(1, kg_unit[unit].BCC) :
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RORB(1, kg_unit[unit].BCC);
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else
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kg_unit[unit].BCC = (kg_unit[unit].BCC & 01) ?
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(kg_unit[unit].BCC >> 1) ^ config[kg_unit[unit].SR & 07].poly :
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kg_unit[unit].BCC >> 1;
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kg_unit[unit].DR >>= 1;
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kg_unit[unit].SR |= quo << KGSR_V_QUO;
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if ((kg_unit[unit].SR & KG_SR_POLYMASK) == 0)
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kg_unit[unit].BCC = (kg_unit[unit].BCC & 077) |
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((kg_unit[unit].BCC & 07700) << 2);
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kg_unit[unit].PULSCNT++;
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if (kg_unit[unit].PULSCNT >= config[kg_unit[unit].SR & 017].pulses)
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kg_unit[unit].SR |= KGSR_M_DONE;
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if (DEBUG_PRI(kg_dev, DBG_CYCLE))
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fprintf (sim_deb, ">>KG%d: cycle e BCC %06o DR %06o\n",
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unit, kg_unit[unit].BCC, kg_unit[unit].DR);
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}
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static void do_poly (int unit, t_bool step)
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{
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if (kg_unit[unit].SR & KGSR_M_DONE)
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return;
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if (step)
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cycleOneBit (unit);
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||
else {
|
||
while (!(kg_unit[unit].SR & KGSR_M_DONE))
|
||
cycleOneBit (unit);
|
||
}
|
||
}
|
||
|
||
static t_stat set_units (UNIT *u, int32 val, CONST char *s, void *desc)
|
||
{
|
||
uint32 i, units;
|
||
t_stat stat;
|
||
|
||
if (s == NULL)
|
||
return (SCPE_ARG);
|
||
units = get_uint (s, 10, KG_UNITS, &stat);
|
||
if (stat != SCPE_OK)
|
||
return (stat);
|
||
if (units == 0)
|
||
return SCPE_ARG;
|
||
if (units == kg_dev.numunits)
|
||
return SCPE_OK;
|
||
for (i = 0; i < KG_UNITS; i++) {
|
||
if (i < units)
|
||
kg_unit[i].flags &= ~UNIT_DIS;
|
||
else
|
||
kg_unit[i].flags |= UNIT_DIS;
|
||
}
|
||
kg_dev.numunits = units;
|
||
kg_reset (&kg_dev);
|
||
return (SCPE_OK);
|
||
}
|
||
|
||
t_stat kg_help (FILE *st, DEVICE *dptr, UNIT *uptr, int32 flag, const char *cptr)
|
||
{
|
||
const char *const text =
|
||
/*567901234567890123456789012345678901234567890123456789012345678901234567890*/
|
||
" KG11-A Communications Arithmetic Option (KG)\n"
|
||
"\n"
|
||
" The KG11-A is a programmed I/O, non-interrupting, dedicated arithmetic\n"
|
||
" processor for the Unibus. The device is used to compute the block check\n"
|
||
" character (BCC) over a block of data, typically in data communication\n"
|
||
" applications. The KG11 can compute three different Cyclic Redundancy\n"
|
||
" Check (CRC) polynomials (CRC-16, CRC-12, CRC-CCITT) and two Longitudinal\n"
|
||
" Redundancy Checks (LRC, Exclusive-OR; LRC-8, LRC-16). Up to eight units\n"
|
||
" may be contiguously present in a single machine and are all located at\n"
|
||
" fixed addresses. This simulation implements all functionality of the\n"
|
||
" device including the ability to single step computation of the BCC.\n"
|
||
" The KG is disabled by default.\n"
|
||
/*567901234567890123456789012345678901234567890123456789012345678901234567890*/
|
||
"\n";
|
||
fprintf (st, "%s", text);
|
||
fprint_set_help (st, dptr);
|
||
fprint_show_help (st, dptr);
|
||
fprint_reg_help (st, dptr);
|
||
return SCPE_OK;
|
||
}
|
||
|
||
const char *kg_description (DEVICE *dptr)
|
||
{
|
||
return "KG11-A Communications Arithmetic Option";
|
||
}
|