252 lines
9.4 KiB
C
252 lines
9.4 KiB
C
/* i8273.c: Intel i8273 UART adapter
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Copyright (c) 2011, William A. Beech
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Permission is hereby granted, free of charge, to any person obtaining a
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copy of this software and associated documentation files (the "Software"),
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to deal in the Software without restriction, including without limitation
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the rights to use, copy, modify, merge, publish, distribute, sublicense,
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and/or sell copies of the Software, and to permit persons to whom the
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Software is furnished to do so, subject to the following conditions:
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The above copyright notice and this permission notice shall be included in
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all copies or substantial portions of the Software.
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THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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WILLIAM A. BEECH BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
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IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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Except as contained in this notice, the name of William A. Beech shall not be
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used in advertising or otherwise to promote the sale, use or other dealings
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in this Software without prior written authorization from William A. Beech.
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These functions support a simulated i8273 interface device on an iSBC.
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The device had one physical I/O port which could be connected
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to any serial I/O device that would connect to a current loop,
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RS232, or TTY interface. Available baud rates were jumper
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selectable for each port from 110 to 9600.
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All I/O is via programmed I/O. The i8273 has a status port
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and a data port.
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The simulated device does not support synchronous mode. The simulated device
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supports a select from I/O space and one address line. The data port is at the
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lower address and the status/command port is at the higher.
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A write to the status port can select some options for the device:
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Asynchronous Mode Instruction
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+---+---+---+---+---+---+---+---+
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| S2 S1 EP PEN L2 L1 B2 B1|
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+---+---+---+---+---+---+---+---+
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Baud Rate Factor
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B2 0 1 0 1
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B1 0 0 1 1
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sync 1X 16X 64X
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mode
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Character Length
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L2 0 1 0 1
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L1 0 0 1 1
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5 6 7 8
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bits bits bits bits
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EP - A 1 in this bit position selects even parity.
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PEN - A 1 in this bit position enables parity.
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Number of Stop Bits
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S2 0 1 0 1
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S1 0 0 1 1
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invalid 1 1.5 2
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bit bits bits
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Command Instruction Format
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+---+---+---+---+---+---+---+---+
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| EH IR RTS ER SBRK RxE DTR TxE|
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+---+---+---+---+---+---+---+---+
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TxE - A 1 in this bit position enables transmit.
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DTR - A 1 in this bit position forces *DTR to zero.
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RxE - A 1 in this bit position enables receive.
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SBRK - A 1 in this bit position forces TxD to zero.
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ER - A 1 in this bit position resets the error bits
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RTS - A 1 in this bit position forces *RTS to zero.
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IR - A 1 in this bit position returns the 8251 to Mode Instruction Format.
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EH - A 1 in this bit position enables search for sync characters.
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A read of the status port gets the port status:
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Status Read Format
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+---+---+---+---+---+---+---+---+
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|DSR SD FE OE PE TxE RxR TxR|
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+---+---+---+---+---+---+---+---+
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TxR - A 1 in this bit position signals transmit ready to receive a character.
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RxR - A 1 in this bit position signals receiver has a character.
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TxE - A 1 in this bit position signals transmitter has no more characters to transmit.
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PE - A 1 in this bit signals a parity error.
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OE - A 1 in this bit signals an transmit overrun error.
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FE - A 1 in this bit signals a framing error.
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SD - A 1 in this bit position returns the 8251 to Mode Instruction Format.
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DSR - A 1 in this bit position signals *DSR is at zero.
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A read to the data port gets the buffered character, a write
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to the data port writes the character to the device.
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*/
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#include <stdio.h>
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#include "multibus_defs.h"
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#define UNIT_V_ANSI (UNIT_V_UF + 0) /* ANSI mode */
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#define UNIT_ANSI (1 << UNIT_V_ANSI)
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uint8
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wr0 = 0, /* command register */
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wr1 = 0, /* enable register */
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wr2 = 0, /* CH A mode register */
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/* CH B interrups vector */
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wr3 = 0, /* configuration register 1 */
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wr4 = 0, /* configuration register 2 */
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wr5 = 0, /* configuration register 3 */
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wr6 = 0, /* sync low byte */
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wr7 = 0, /* sync high byte */
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rr0 = 0, /* status register */
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rr1 = 0, /* error register */
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rr2 = 0; /* read interrupt vector */
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/* function prototypes */
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t_stat i8273_reset (DEVICE *dptr);
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/* i8273 Standard I/O Data Structures */
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UNIT i8273_unit = { UDATA (NULL, 0, 0), KBD_POLL_WAIT };
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REG i8273_reg[] = {
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{ HRDATA (WR0, wr0, 8) },
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{ HRDATA (WR1, wr1, 8) },
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{ HRDATA (WR2, wr2, 8) },
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{ HRDATA (WR3, wr3, 8) },
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{ HRDATA (WR4, wr4, 8) },
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{ HRDATA (WR5, wr5, 8) },
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{ HRDATA (WR6, wr6, 8) },
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{ HRDATA (WR7, wr7, 8) },
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{ HRDATA (RR0, rr0, 8) },
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{ HRDATA (RR0, rr1, 8) },
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{ HRDATA (RR0, rr2, 8) },
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{ NULL }
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};
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MTAB i8273_mod[] = {
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{ UNIT_ANSI, 0, "TTY", "TTY", NULL },
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{ UNIT_ANSI, UNIT_ANSI, "ANSI", "ANSI", NULL },
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{ 0 }
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};
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DEBTAB i8273_debug[] = {
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{ "ALL", DEBUG_all },
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{ "FLOW", DEBUG_flow },
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{ "READ", DEBUG_read },
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{ "WRITE", DEBUG_write },
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{ "LEV1", DEBUG_level1 },
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{ "LEV2", DEBUG_level2 },
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{ NULL }
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};
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DEVICE i8273_dev = {
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"I8273", //name
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&i8273_unit, //units
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i8273_reg, //registers
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i8273_mod, //modifiers
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1, //numunits
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16, //aradix
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32, //awidth
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1, //aincr
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16, //dradix
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8, //dwidth
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NULL, //examine
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NULL, //deposit
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i8273_reset, //reset
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NULL, //boot
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NULL, //attach
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NULL, //detach
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NULL, //ctxt
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DEV_DEBUG, //flags
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0, //dctrl
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i8273_debug, //debflags
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NULL, //msize
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NULL //lname
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};
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/* Service routines to handle simulator functions */
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/* Reset routine */
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t_stat i8273_reset (DEVICE *dptr)
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{
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wr0 = 0; /* command register */
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wr1 = 0; /* enable register */
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wr2 = 0; /* CH A mode register */
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/* CH B interrups vector */
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wr3 = 0; /* configuration register 1 */
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wr4 = 0; /* configuration register 2 */
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wr5 = 0; /* configuration register 3 */
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wr6 = 0; /* sync low byte */
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wr7 = 0; /* sync high byte */
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rr0 = 0; /* status register */
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rr1 = 0; /* error register */
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rr2 = 0; /* read interrupt vector */
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sim_printf(" 8273 Reset\n");
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return SCPE_OK;
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}
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/* I/O instruction handlers, called from the CPU module when an
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IN or OUT instruction is issued.
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Each function is passed an 'io' flag, where 0 means a read from
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the port, and 1 means a write to the port. On input, the actual
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input is passed as the return value, on output, 'data' is written
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to the device.
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*/
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int32 i8273s(int32 io, int32 data)
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{
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if (io == 0) { /* read status port */
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return i8273_unit.u3;
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} else { /* write status port */
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if (data == 0x40) { /* reset port! */
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i8273_unit.u3 = 0x05; /* status */
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i8273_unit.u4 = 0; /* mode instruction */
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i8273_unit.u5 = 0; /* command instruction */
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i8273_unit.u6 = 0;
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i8273_unit.buf = 0;
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i8273_unit.pos = 0;
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sim_printf("8273 Reset\n");
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} else if (i8273_unit.u6) {
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i8273_unit.u5 = data;
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sim_printf("8273 Command Instruction=%02X\n", data);
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} else {
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i8273_unit.u4 = data;
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sim_printf("8273 Mode Instruction=%02X\n", data);
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i8273_unit.u6++;
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}
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return (0);
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}
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}
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int32 i8273d(int32 io, int32 data)
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{
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if (io == 0) { /* read data port */
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i8273_unit.u3 &= 0xFD;
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return (i8273_unit.buf);
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} else { /* write data port */
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sim_putchar(data);
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}
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return 0;
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}
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