c0beba5498
This change introduces initial support for the AT&T 3B2 Rev 3 platform, based
around the WE32200 CPU with up to 64MB of RAM and SCSI disk and tape support.
This simulator is experimental and not yet supported. It will not be built by
default, but can be built with:
make 3b2-600
Or by using the 3B2-600 Windows Visual Studio project.
82 lines
2.8 KiB
C
82 lines
2.8 KiB
C
/* 3b2_dmac.h: AT&T 3B2 DMA Controller Header
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Copyright (c) 2021, Seth J. Morabito
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Permission is hereby granted, free of charge, to any person
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obtaining a copy of this software and associated documentation
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files (the "Software"), to deal in the Software without
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restriction, including without limitation the rights to use, copy,
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modify, merge, publish, distribute, sublicense, and/or sell copies
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of the Software, and to permit persons to whom the Software is
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furnished to do so, subject to the following conditions:
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The above copyright notice and this permission notice shall be
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included in all copies or substantial portions of the Software.
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THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
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ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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SOFTWARE.
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Except as contained in this notice, the name of the author shall
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not be used in advertising or otherwise to promote the sale, use or
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other dealings in this Software without prior written authorization
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from the author.
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*/
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#ifndef _3B2_DMAC_H_
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#define _3B2_DMAC_H_
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#include "sim_defs.h"
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#define DMA_MODE_VERIFY 0
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#define DMA_MODE_WRITE 1 /* Write to memory from device */
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#define DMA_MODE_READ 2 /* Read from memory to device */
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#define DMA_IF_READ (IFBASE + IF_DATA_REG)
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typedef struct {
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uint16 page;
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uint16 addr; /* Original addr */
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uint16 wcount; /* Original wcount */
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uint16 addr_c; /* Current addr */
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int32 wcount_c; /* Current word-count */
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uint16 ptr; /* Pointer into memory */
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} dma_channel;
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typedef struct {
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/* Byte (high/low) flip-flop */
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uint8 bff;
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/* Address and count registers for channels 0-3 */
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dma_channel channels[4];
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/* DMAC programmable registers */
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uint8 command;
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uint8 mode;
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uint8 request;
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uint8 mask;
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uint8 status;
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} DMA_STATE;
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typedef struct {
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uint8 channel;
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uint32 service_address;
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t_bool *drq;
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void (*dma_handler)(uint8 channel, uint32 service_address);
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void (*after_dma_callback)();
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} dmac_dma_handler;
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/* DMAC */
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t_stat dmac_reset(DEVICE *dptr);
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uint32 dmac_read(uint32 pa, size_t size);
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void dmac_write(uint32 pa, uint32 val, size_t size);
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void dmac_service_drqs();
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void dmac_generic_dma(uint8 channel, uint32 service_address);
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uint32 dma_address(uint8 channel, uint32 offset, t_bool r);
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#endif
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