25f053e45d
Fix bug in interrupt handling in KI when EPT not at 0.
Fix bug with handling of CCW_COMP flag on DF10 devices.
726 lines
25 KiB
C
726 lines
25 KiB
C
/* kx10_rs.c: DEC Massbus RS04
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Copyright (c) 2017-2020, Richard Cornwell
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Permission is hereby granted, free of charge, to any person obtaining a
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copy of this software and associated documentation files (the "Software"),
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to deal in the Software without restriction, including without limitation
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the rights to use, copy, modify, merge, publish, distribute, sublicense,
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and/or sell copies of the Software, and to permit persons to whom the
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Software is furnished to do so, subject to the following conditions:
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The above copyright notice and this permission notice shall be included in
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all copies or substantial portions of the Software.
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THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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FITNESS FOR A PARTICULAR PURSOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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RICHARD CORNWELL BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
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IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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*/
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#include "kx10_defs.h"
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#ifndef NUM_DEVS_RS
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#define NUM_DEVS_RS 0
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#endif
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#if (NUM_DEVS_RS > 0)
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#define BUF_EMPTY(u) (u->hwmark == 0xFFFFFFFF)
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#define CLR_BUF(u) u->hwmark = 0xFFFFFFFF
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#define RS_NUMWD 128 /* 36bit words/sec */
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#define NUM_UNITS_RS 8
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/* Flags in the unit flags word */
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#define UNIT_V_DTYPE (UNIT_V_UF + 0) /* disk type */
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#define UNIT_M_DTYPE 7
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#define UNIT_DTYPE (UNIT_M_DTYPE << UNIT_V_DTYPE)
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#define DTYPE(x) (((x) & UNIT_M_DTYPE) << UNIT_V_DTYPE)
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#define GET_DTYPE(x) (((x) >> UNIT_V_DTYPE) & UNIT_M_DTYPE)
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/* Parameters in the unit descriptor */
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#define CMD u3
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/* u3 low */
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/* RSC - 00 - control */
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#define CS1_GO 1 /* go */
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#define CS1_V_FNC 1 /* function pos */
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#define CS1_M_FNC 037 /* function mask */
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#define CS1_FNC (CS1_M_FNC << CS1_V_FNC)
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#define FNC_NOP 000 /* no operation */
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#define FNC_DCLR 004 /* drive clear */
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#define FNC_PRESET 010 /* read-in preset */
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#define FNC_SEARCH 014 /* search */
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#define FNC_XFER 024 /* >=? data xfr */
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#define FNC_WCHK 024 /* write check */
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#define FNC_WRITE 030 /* write */
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#define FNC_READ 034 /* read */
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#define CS1_DVA 0004000 /* drive avail NI */
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#define GET_FNC(x) (((x) >> CS1_V_FNC) & CS1_M_FNC)
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/* u3 low */
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/* RSDS - 01 - drive status */
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#define DS_VV 0000000 /* volume valid */
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#define DS_DRY 0000200 /* drive ready */
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#define DS_DPR 0000400 /* drive present */
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#define DS_PGM 0001000 /* programable NI */
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#define DS_LST 0002000 /* last sector */
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#define DS_WRL 0004000 /* write locked */
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#define DS_MOL 0010000 /* medium online */
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#define DS_PIP 0020000 /* pos in progress */
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#define DS_ERR 0040000 /* error */
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#define DS_ATA 0100000 /* attention active */
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#define DS_MBZ 0000076
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/* u3 high */
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/* RSER1 - 02 - error status 1 */
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#define ER1_ILF 0000001 /* illegal func */
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#define ER1_ILR 0000002 /* illegal register */
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#define ER1_RMR 0000004 /* reg mod refused */
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#define ER1_PAR 0000010 /* parity err */
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#define ER1_FER 0000020 /* format err NI */
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#define ER1_WCF 0000040 /* write clk fail NI */
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#define ER1_ECH 0000100 /* ECC hard err NI */
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#define ER1_HCE 0000200 /* hdr comp err NI */
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#define ER1_HCR 0000400 /* hdr CRC err NI */
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#define ER1_AOE 0001000 /* addr ovflo err */
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#define ER1_IAE 0002000 /* invalid addr err */
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#define ER1_WLE 0004000 /* write lock err */
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#define ER1_DTE 0010000 /* drive time err NI */
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#define ER1_OPI 0020000 /* op incomplete */
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#define ER1_UNS 0040000 /* drive unsafe */
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#define ER1_DCK 0100000 /* data check NI */
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/* RSMR - 03 - maintenace register */
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/* RSAS - 04 - attention summary */
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#define AS_U0 0000001 /* unit 0 flag */
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#define DA u4
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/* u4 high */
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/* RSDC - 05 - desired sector */
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#define DA_V_SC 0 /* sector pos */
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#define DA_M_SC 077 /* sector mask */
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#define DA_V_SF 6 /* track pos */
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#define DA_M_SF 077 /* track mask */
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#define DA_MBZ 0170000
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#define GET_SC(x) (((x) >> DA_V_SC) & DA_M_SC)
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#define GET_SF(x) (((x) >> DA_V_SF) & DA_M_SF)
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/* RSDT - 06 - drive type */
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/* RSLA - 07 - look ahead register */
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#define LA_V_SC 6 /* sector pos */
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#define GET_DA(c,d) (((GET_SF (c)) * rs_drv_tab[d].sect) + GET_SC (c))
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#define DATAPTR u6
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/* This controller supports many different disk drive types. These drives
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are operated in 576 bytes/sector (128 36b words/sector) mode, which gives
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them somewhat different geometry from the PDP-11 variants:
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type #sectors/ #surfaces/
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surface cylinder
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RS03 32 64
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RS04 32 64
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In theory, each drive can be a different type. The size field in
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each unit selects the drive capacity for each drive and thus the
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drive type. DISKS MUST BE DECLARED IN ASCENDING SIZE.
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*/
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#define RS03_DTYPE 0
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#define RS03_SECT 64
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#define RS03_SURF 32
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#define RS03_DEV 020002
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#define RS03_SIZE (RS03_SECT * RS03_SURF * RS_NUMWD)
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#define RS04_DTYPE 1
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#define RS04_SECT 64
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#define RS04_SURF 32
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#define RS04_DEV 020003
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#define RS04_SIZE (RS04_SECT * RS04_SURF * RS_NUMWD)
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struct drvtyp {
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int32 sect; /* sectors */
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int32 surf; /* surfaces */
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int32 size; /* #blocks */
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int32 devtype; /* device type */
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};
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struct drvtyp rs_drv_tab[] = {
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{ RS03_SECT, RS03_SURF, RS03_SIZE, RS03_DEV },
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{ RS04_SECT, RS04_SURF, RS04_SIZE, RS04_DEV },
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{ 0 }
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};
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uint64 rs_buf[NUM_DEVS_RS][RS_NUMWD];
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int rs_write(DEVICE *dptr, struct rh_if *rhc, int reg, uint32 data);
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int rs_read(DEVICE *dptr, struct rh_if *rhc, int reg, uint32 *data);
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void rs_rst(DEVICE *dptr);
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t_stat rs_svc(UNIT *);
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t_stat rs_boot(int32, DEVICE *);
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void rs_ini(UNIT *, t_bool);
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t_stat rs_reset(DEVICE *);
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t_stat rs_attach(UNIT *, CONST char *);
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t_stat rs_detach(UNIT *);
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t_stat rs_set_type(UNIT *uptr, int32 val, CONST char *cptr, void *desc);
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t_stat rs_help (FILE *st, DEVICE *dptr, UNIT *uptr, int32 flag,
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const char *cptr);
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const char *rs_description (DEVICE *dptr);
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UNIT rs_unit[] = {
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/* Controller 1 */
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{ UDATA (&rs_svc, UNIT_FIX+UNIT_ATTABLE+UNIT_DISABLE+
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UNIT_ROABLE+DTYPE(RS04_DTYPE)+CNTRL_RH(0), RS04_SIZE) },
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{ UDATA (&rs_svc, UNIT_FIX+UNIT_ATTABLE+UNIT_DISABLE+
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UNIT_ROABLE+DTYPE(RS04_DTYPE)+CNTRL_RH(0), RS04_SIZE) },
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{ UDATA (&rs_svc, UNIT_FIX+UNIT_ATTABLE+UNIT_DISABLE+
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UNIT_ROABLE+DTYPE(RS04_DTYPE)+CNTRL_RH(0), RS04_SIZE) },
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{ UDATA (&rs_svc, UNIT_FIX+UNIT_ATTABLE+UNIT_DISABLE+
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UNIT_ROABLE+DTYPE(RS04_DTYPE)+CNTRL_RH(0), RS04_SIZE) },
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{ UDATA (&rs_svc, UNIT_FIX+UNIT_ATTABLE+UNIT_DISABLE+
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UNIT_ROABLE+DTYPE(RS04_DTYPE)+CNTRL_RH(0), RS04_SIZE) },
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{ UDATA (&rs_svc, UNIT_FIX+UNIT_ATTABLE+UNIT_DISABLE+
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UNIT_ROABLE+DTYPE(RS04_DTYPE)+CNTRL_RH(0), RS04_SIZE) },
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{ UDATA (&rs_svc, UNIT_FIX+UNIT_ATTABLE+UNIT_DISABLE+
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UNIT_ROABLE+DTYPE(RS04_DTYPE)+CNTRL_RH(0), RS04_SIZE) },
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{ UDATA (&rs_svc, UNIT_FIX+UNIT_ATTABLE+UNIT_DISABLE+
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UNIT_ROABLE+DTYPE(RS04_DTYPE)+CNTRL_RH(0), RS04_SIZE) },
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};
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struct rh_if rs_rh[] = {
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{ &rs_write, &rs_read, &rs_rst},
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};
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DIB rs_dib[] = {
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{RH10_DEV, 1, &rh_devio, &rh_devirq, &rs_rh[0]}
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};
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MTAB rs_mod[] = {
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#if KL
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{MTAB_XTD|MTAB_VDV, TYPE_RH10, NULL, "RH10", &rh_set_type, NULL,
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NULL, "Sets controller to RH10" },
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{MTAB_XTD|MTAB_VDV, TYPE_RH20, "RH20", "RH20", &rh_set_type, &rh_show_type,
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NULL, "Sets controller to RH20"},
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#endif
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{ MTAB_XTD|MTAB_VUN, 0, "write enabled", "WRITEENABLED",
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&set_writelock, &show_writelock, NULL, "Write enable drive" },
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{ MTAB_XTD|MTAB_VUN, 1, NULL, "LOCKED",
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&set_writelock, NULL, NULL, "Write lock drive" },
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{UNIT_DTYPE, (RS03_DTYPE << UNIT_V_DTYPE), "RS03", "RS03", &rs_set_type },
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{UNIT_DTYPE, (RS04_DTYPE << UNIT_V_DTYPE), "RS04", "RS04", &rs_set_type },
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{0}
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};
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REG rsa_reg[] = {
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{ORDATA(IVECT, rs_rh[0].ivect, 18)},
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{FLDATA(IMODE, rs_rh[0].imode, 0)},
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{ORDATA(XFER, rs_rh[0].xfer_drive, 3), REG_HRO},
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{ORDATA(DRIVE, rs_rh[0].drive, 3), REG_HRO},
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{ORDATA(REG, rs_rh[0].reg, 6), REG_RO},
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{ORDATA(RAE, rs_rh[0].rae, 8), REG_RO},
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{ORDATA(ATTN, rs_rh[0].attn, 8), REG_RO},
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{ORDATA(STATUS, rs_rh[0].status, 18), REG_RO},
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{ORDATA(CIA, rs_rh[0].cia, 18)},
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{ORDATA(CCW, rs_rh[0].ccw, 18)},
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{ORDATA(WCR, rs_rh[0].wcr, 18)},
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{ORDATA(CDA, rs_rh[0].cda, 18)},
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{ORDATA(DEVNUM, rs_rh[0].devnum, 9), REG_HRO},
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{ORDATA(BUF, rs_rh[0].buf, 36), REG_HRO},
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{BRDATA(BUFF, rs_buf[0], 16, 64, RS_NUMWD), REG_HRO},
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{0}
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};
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DEVICE rsa_dev = {
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"FSA", rs_unit, rsa_reg, rs_mod,
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NUM_UNITS_RS, 8, 18, 1, 8, 36,
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NULL, NULL, &rs_reset, &rs_boot, &rs_attach, &rs_detach,
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&rs_dib[0], DEV_DISABLE | DEV_DIS | DEV_DEBUG, 0, dev_debug,
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NULL, NULL, &rs_help, NULL, NULL, &rs_description
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};
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DEVICE *rs_devs[] = {
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&rsa_dev,
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};
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void
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rs_rst(DEVICE *dptr)
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{
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UNIT *uptr=dptr->units;
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int drive;
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for(drive = 0; drive < NUM_UNITS_RS; drive++, uptr++) {
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uptr->CMD &= DS_MOL|DS_WRL|DS_DPR|DS_DRY|DS_VV|076;
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uptr->DA &= 003400177777;
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}
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}
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int
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rs_write(DEVICE *dptr, struct rh_if *rhc, int reg, uint32 data) {
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int i;
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int unit = rhc->drive;
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UNIT *uptr = &dptr->units[unit];
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if ((uptr->flags & UNIT_DIS) != 0)
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return 1;
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if ((uptr->CMD & CS1_GO) && reg != 04) {
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uptr->CMD |= (ER1_RMR << 16)|DS_ERR;
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return 0;
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}
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switch(reg) {
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case 000: /* control */
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sim_debug(DEBUG_DETAIL, dptr, "%s%o Status=%06o\n", dptr->name, unit, uptr->CMD);
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/* Set if drive not writable */
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if (uptr->flags & UNIT_WPRT)
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uptr->CMD |= DS_WRL;
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/* If drive not ready don't do anything */
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if ((uptr->CMD & DS_DRY) == 0) {
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uptr->CMD |= (ER1_RMR << 16)|DS_ERR;
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sim_debug(DEBUG_DETAIL, dptr, "%s%o busy\n", dptr->name, unit);
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return 0;
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}
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/* Check if GO bit set */
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if ((data & 1) == 0) {
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uptr->CMD &= ~076;
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uptr->CMD |= data & 076;
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sim_debug(DEBUG_DETAIL, dptr, "%s%o no go\n", dptr->name, unit);
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return 0; /* No, nop */
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}
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uptr->CMD &= DS_ATA|DS_VV|DS_DPR|DS_MOL|DS_WRL;
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uptr->CMD |= data & 076;
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switch (GET_FNC(data)) {
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case FNC_NOP:
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uptr->CMD |= DS_DRY;
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break;
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case FNC_SEARCH: /* search */
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case FNC_WCHK: /* write check */
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case FNC_WRITE: /* write */
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case FNC_READ: /* read */
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uptr->CMD |= DS_PIP|CS1_GO;
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CLR_BUF(uptr);
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uptr->DATAPTR = 0;
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break;
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case FNC_PRESET: /* read-in preset */
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uptr->DA = 0;
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if ((uptr->flags & UNIT_ATT) != 0)
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uptr->CMD |= DS_VV;
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uptr->CMD |= DS_DRY;
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rh_setirq(rhc);
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break;
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case FNC_DCLR: /* drive clear */
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uptr->CMD |= DS_DRY;
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uptr->CMD &= ~(DS_ATA|CS1_GO);
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rhc->attn = 0;
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clr_interrupt(rhc->devnum);
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for (i = 0; i < 8; i++) {
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if (dptr->units[i].CMD & DS_ATA)
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rhc->attn |= 1 << i;
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}
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break;
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default:
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uptr->CMD |= DS_DRY|DS_ERR|DS_ATA;
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uptr->CMD |= (ER1_ILF << 16);
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}
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if (uptr->CMD & CS1_GO)
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sim_activate(uptr, 100);
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sim_debug(DEBUG_DETAIL, dptr, "%s%o AStatus=%06o\n", dptr->name, unit, uptr->CMD);
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return 0;
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case 001: /* status */
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break;
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case 002: /* error register 1 */
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uptr->CMD &= 0177777;
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uptr->CMD |= data << 16;
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if (data != 0)
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uptr->CMD |= DS_ERR;
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break;
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case 003: /* maintenance */
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break;
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case 004: /* atten summary */
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rhc->attn = 0;
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for (i = 0; i < 8; i++) {
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if (data & (1<<i))
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dptr->units[i].CMD &= ~DS_ATA;
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if (dptr->units[i].CMD & DS_ATA)
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rhc->attn |= 1 << i;
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}
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break;
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case 005: /* sector/track */
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uptr->DA = data & 0177777;
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break;
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case 006: /* drive type */
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case 007: /* look ahead */
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break;
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default:
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uptr->CMD |= (ER1_ILR<<16)|DS_ERR;
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rhc->rae |= 1 << unit;
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}
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return 0;
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}
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int
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rs_read(DEVICE *dptr, struct rh_if *rhc, int reg, uint32 *data) {
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int unit = rhc->drive;
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UNIT *uptr = &dptr->units[unit];
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uint32 temp = 0;
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int i;
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if ((uptr->flags & UNIT_DIS) != 0)
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return 1;
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if ((uptr->flags & UNIT_ATT) == 0 && reg != 04) { /* not attached? */
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*data = 0;
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return 0;
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}
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switch(reg) {
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case 000: /* control */
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temp = uptr->CMD & 077;
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if (uptr->flags & UNIT_ATT)
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temp |= CS1_DVA;
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if ((uptr->CMD & CS1_GO) == 0)
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temp |= CS1_GO;
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break;
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case 001: /* status */
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temp = uptr->CMD & 0177700;
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break;
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case 002: /* error register 1 */
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temp = (uptr->CMD >> 16) & 0177777;
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break;
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case 004: /* atten summary */
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for (i = 0; i < 8; i++) {
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if (dptr->units[i].CMD & DS_ATA) {
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temp |= 1 << i;
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}
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}
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break;
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case 005: /* sector/track */
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temp = uptr->DA & 0177777;
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break;
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case 006: /* drive type */
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temp = rs_drv_tab[GET_DTYPE(uptr->flags)].devtype;
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break;
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case 003: /* maintenance */
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case 007: /* look ahead */
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break;
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default:
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uptr->CMD |= (ER1_ILR<<16);
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rhc->rae |= 1 << unit;
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}
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*data = temp;
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return 0;
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}
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t_stat rs_svc (UNIT *uptr)
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{
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int dtype = GET_DTYPE(uptr->flags);
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int ctlr = GET_CNTRL_RH(uptr->flags);
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int unit;
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DEVICE *dptr;
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struct rh_if *rhc;
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int da;
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int sts;
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/* Find dptr, and df10 */
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dptr = rs_devs[ctlr];
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rhc = &rs_rh[ctlr];
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unit = uptr - dptr->units;
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if ((uptr->flags & UNIT_ATT) == 0) { /* not attached? */
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uptr->CMD |= (ER1_UNS << 16) | DS_ATA|DS_ERR; /* set drive error */
|
||
rh_setirq(rhc);
|
||
return (SCPE_OK);
|
||
}
|
||
|
||
/* Check if seeking */
|
||
if (uptr->CMD & DS_PIP) {
|
||
uptr->CMD &= ~DS_PIP;
|
||
uptr->DATAPTR = 0;
|
||
}
|
||
|
||
switch (GET_FNC(uptr->CMD)) {
|
||
case FNC_NOP:
|
||
case FNC_DCLR: /* drive clear */
|
||
break;
|
||
case FNC_PRESET: /* read-in preset */
|
||
uptr->CMD |= DS_DRY|DS_ATA;
|
||
uptr->CMD &= ~CS1_GO;
|
||
rh_setattn(rhc, unit);
|
||
sim_debug(DEBUG_DETAIL, dptr, "%s%o seekdone\n", dptr->name, unit);
|
||
break;
|
||
|
||
case FNC_SEARCH: /* search */
|
||
if (GET_SC(uptr->DA) >= rs_drv_tab[dtype].sect ||
|
||
GET_SF(uptr->DA) >= rs_drv_tab[dtype].surf)
|
||
uptr->CMD |= (ER1_IAE << 16)|DS_ERR;
|
||
uptr->CMD |= DS_DRY|DS_ATA;
|
||
uptr->CMD &= ~CS1_GO;
|
||
rh_setattn(rhc, unit);
|
||
sim_debug(DEBUG_DETAIL, dptr, "%s%o searchdone\n", dptr->name, unit);
|
||
break;
|
||
|
||
case FNC_READ: /* read */
|
||
case FNC_WCHK: /* write check */
|
||
if (BUF_EMPTY(uptr)) {
|
||
int wc;
|
||
if (GET_SC(uptr->DA) >= rs_drv_tab[dtype].sect ||
|
||
GET_SF(uptr->DA) >= rs_drv_tab[dtype].surf) {
|
||
uptr->CMD |= (ER1_IAE << 16)|DS_ERR|DS_DRY|DS_ATA;
|
||
uptr->CMD &= ~CS1_GO;
|
||
sim_debug(DEBUG_DETAIL, dptr, "%s%o readx done\n", dptr->name, unit);
|
||
rh_finish_op(rhc, 0);
|
||
return SCPE_OK;
|
||
}
|
||
sim_debug(DEBUG_DETAIL, dptr, "%s%o read (%d,%d)\n", dptr->name, unit,
|
||
GET_SC(uptr->DA), GET_SF(uptr->DA));
|
||
da = GET_DA(uptr->DA, dtype) * RS_NUMWD;
|
||
(void)sim_fseek(uptr->fileref, da * sizeof(uint64), SEEK_SET);
|
||
wc = sim_fread (&rs_buf[ctlr][0], sizeof(uint64), RS_NUMWD,
|
||
uptr->fileref);
|
||
while (wc < RS_NUMWD)
|
||
rs_buf[ctlr][wc++] = 0;
|
||
uptr->hwmark = RS_NUMWD;
|
||
uptr->DATAPTR = 0;
|
||
}
|
||
|
||
rhc->buf = rs_buf[ctlr][uptr->DATAPTR++];
|
||
sim_debug(DEBUG_DATA, dptr, "%s%o read word %d %012llo %09o %06o\n",
|
||
dptr->name, unit, uptr->DATAPTR, rhc->buf, rhc->cda, rhc->wcr);
|
||
if (rh_write(rhc)) {
|
||
if (uptr->DATAPTR == RS_NUMWD) {
|
||
/* Increment to next sector. Set Last Sector */
|
||
uptr->DATAPTR = 0;
|
||
CLR_BUF(uptr);
|
||
uptr->DA += 1 << DA_V_SC;
|
||
if (GET_SC(uptr->DA) >= rs_drv_tab[dtype].sect) {
|
||
uptr->DA &= (DA_M_SF << DA_V_SF);
|
||
uptr->DA += 1 << DA_V_SF;
|
||
if (GET_SF(uptr->DA) >= rs_drv_tab[dtype].surf)
|
||
uptr->CMD |= DS_LST;
|
||
}
|
||
if (rh_blkend(rhc))
|
||
goto rd_end;
|
||
}
|
||
sim_activate(uptr, 10);
|
||
} else {
|
||
rd_end:
|
||
sim_debug(DEBUG_DETAIL, dptr, "%s%o read done\n", dptr->name, unit);
|
||
uptr->CMD |= DS_DRY;
|
||
uptr->CMD &= ~CS1_GO;
|
||
if (uptr->DATAPTR == RS_NUMWD)
|
||
(void)rh_blkend(rhc);
|
||
rh_finish_op(rhc, 0);
|
||
return SCPE_OK;
|
||
}
|
||
break;
|
||
|
||
case FNC_WRITE: /* write */
|
||
if (BUF_EMPTY(uptr)) {
|
||
if (GET_SC(uptr->DA) >= rs_drv_tab[dtype].sect ||
|
||
GET_SF(uptr->DA) >= rs_drv_tab[dtype].surf) {
|
||
uptr->CMD |= (ER1_IAE << 16)|DS_ERR|DS_DRY|DS_ATA;
|
||
uptr->CMD &= ~CS1_GO;
|
||
sim_debug(DEBUG_DETAIL, dptr, "%s%o writex done\n", dptr->name, unit);
|
||
rh_finish_op(rhc, 0);
|
||
return SCPE_OK;
|
||
}
|
||
uptr->DATAPTR = 0;
|
||
uptr->hwmark = 0;
|
||
}
|
||
sts = rh_read(rhc);
|
||
rs_buf[ctlr][uptr->DATAPTR++] = rhc->buf;
|
||
sim_debug(DEBUG_DATA, dptr, "%s%o write word %d %012llo %09o %06o\n",
|
||
dptr->name, unit, uptr->DATAPTR, rhc->buf, rhc->cda, rhc->wcr);
|
||
if (sts == 0) {
|
||
while (uptr->DATAPTR < RS_NUMWD)
|
||
rs_buf[ctlr][uptr->DATAPTR++] = 0;
|
||
}
|
||
if (uptr->DATAPTR == RS_NUMWD) {
|
||
sim_debug(DEBUG_DETAIL, dptr, "%s%o write (%d,%d)\n", dptr->name, unit,
|
||
GET_SC(uptr->DA), GET_SF(uptr->DA));
|
||
da = GET_DA(uptr->DA, dtype) * RS_NUMWD;
|
||
(void)sim_fseek(uptr->fileref, da * sizeof(uint64), SEEK_SET);
|
||
(void)sim_fwrite (&rs_buf[ctlr][0], sizeof(uint64), RS_NUMWD,
|
||
uptr->fileref);
|
||
uptr->DATAPTR = 0;
|
||
CLR_BUF(uptr);
|
||
if (sts) {
|
||
uptr->DA += 1 << DA_V_SC;
|
||
if (GET_SC(uptr->DA) >= rs_drv_tab[dtype].sect) {
|
||
uptr->DA &= (DA_M_SF << DA_V_SF);
|
||
uptr->DA += 1 << DA_V_SF;
|
||
if (GET_SF(uptr->DA) >= rs_drv_tab[dtype].surf)
|
||
uptr->CMD |= DS_LST;
|
||
}
|
||
}
|
||
if (rh_blkend(rhc))
|
||
goto wr_end;
|
||
}
|
||
if (sts) {
|
||
sim_activate(uptr, 10);
|
||
} else {
|
||
wr_end:
|
||
sim_debug(DEBUG_DETAIL, dptr, "%s%o write done\n", dptr->name, unit);
|
||
uptr->CMD |= DS_DRY;
|
||
uptr->CMD &= ~CS1_GO;
|
||
rh_finish_op(rhc, 0);
|
||
return SCPE_OK;
|
||
}
|
||
break;
|
||
}
|
||
return SCPE_OK;
|
||
}
|
||
|
||
|
||
t_stat
|
||
rs_set_type(UNIT *uptr, int32 val, CONST char *cptr, void *desc)
|
||
{
|
||
int i;
|
||
|
||
if (uptr == NULL) return SCPE_IERR;
|
||
uptr->flags &= ~(UNIT_DTYPE);
|
||
uptr->flags |= val;
|
||
i = GET_DTYPE(val);
|
||
uptr->capac = rs_drv_tab[i].size;
|
||
return SCPE_OK;
|
||
}
|
||
|
||
|
||
t_stat
|
||
rs_reset(DEVICE * rstr)
|
||
{
|
||
int ctlr;
|
||
for (ctlr = 0; ctlr < NUM_DEVS_RS; ctlr++) {
|
||
rs_rh[ctlr].status = 0;
|
||
rs_rh[ctlr].attn = 0;
|
||
rs_rh[ctlr].rae = 0;
|
||
}
|
||
return SCPE_OK;
|
||
}
|
||
|
||
/* Boot from given device */
|
||
t_stat
|
||
rs_boot(int32 unit_num, DEVICE * rptr)
|
||
{
|
||
UNIT *uptr = &rptr->units[unit_num];
|
||
int ctlr = GET_CNTRL_RH(uptr->flags);
|
||
struct rh_if *rhc;
|
||
DEVICE *dptr;
|
||
uint32 addr;
|
||
uint32 ptr = 0;
|
||
uint64 word;
|
||
int wc;
|
||
|
||
dptr = rs_devs[ctlr];
|
||
rhc = &rs_rh[ctlr];
|
||
(void)sim_fseek(uptr->fileref, 0, SEEK_SET);
|
||
(void)sim_fread (&rs_buf[0][0], sizeof(uint64), RS_NUMWD, uptr->fileref);
|
||
uptr->CMD |= DS_VV;
|
||
addr = rs_buf[0][ptr] & RMASK;
|
||
wc = (rs_buf[0][ptr++] >> 18) & RMASK;
|
||
while (wc != 0) {
|
||
wc = (wc + 1) & RMASK;
|
||
addr = (addr + 1) & RMASK;
|
||
word = rs_buf[0][ptr++];
|
||
if (addr < 020)
|
||
FM[addr] = word;
|
||
else
|
||
M[addr] = word;
|
||
}
|
||
addr = rs_buf[0][ptr] & RMASK;
|
||
wc = (rs_buf[0][ptr++] >> 18) & RMASK;
|
||
word = rs_buf[0][ptr++];
|
||
rhc->reg = 040;
|
||
rhc->drive = uptr - dptr->units;
|
||
rhc->status |= PI_ENABLE;
|
||
PC = word & RMASK;
|
||
return SCPE_OK;
|
||
|
||
}
|
||
|
||
|
||
/* Device attach */
|
||
|
||
t_stat rs_attach (UNIT *uptr, CONST char *cptr)
|
||
{
|
||
t_stat r;
|
||
DEVICE *rstr;
|
||
DIB *dib;
|
||
int ctlr;
|
||
|
||
uptr->capac = rs_drv_tab[GET_DTYPE (uptr->flags)].size;
|
||
r = attach_unit (uptr, cptr);
|
||
if (r != SCPE_OK)
|
||
return r;
|
||
rstr = find_dev_from_unit(uptr);
|
||
if (rstr == 0)
|
||
return SCPE_OK;
|
||
dib = (DIB *) rstr->ctxt;
|
||
for (ctlr = 0; rh[ctlr].dev_num != 0; ctlr++) {
|
||
if (rh[ctlr].dev == rstr)
|
||
break;
|
||
}
|
||
if (uptr->flags & UNIT_WPRT)
|
||
uptr->CMD |= DS_WRL;
|
||
if (sim_switches & SIM_SW_REST)
|
||
return SCPE_OK;
|
||
uptr->DA = 0;
|
||
uptr->CMD &= ~DS_VV;
|
||
uptr->CMD |= DS_DPR|DS_MOL|DS_DRY;
|
||
rs_rh[ctlr].status |= PI_ENABLE;
|
||
set_interrupt(dib->dev_num, rs_rh[ctlr].status);
|
||
return SCPE_OK;
|
||
}
|
||
|
||
/* Device detach */
|
||
|
||
t_stat rs_detach (UNIT *uptr)
|
||
{
|
||
if (!(uptr->flags & UNIT_ATT)) /* attached? */
|
||
return SCPE_OK;
|
||
if (sim_is_active (uptr)) /* unit active? */
|
||
sim_cancel (uptr); /* cancel operation */
|
||
uptr->CMD &= ~(DS_VV|DS_WRL|DS_DPR|DS_DRY);
|
||
return detach_unit (uptr);
|
||
}
|
||
|
||
t_stat rs_help (FILE *st, DEVICE *dptr, UNIT *uptr, int32 flag, const char *cptr)
|
||
{
|
||
fprintf (st, "RS04 Disk Pack Drives (RS)\n\n");
|
||
fprintf (st, "The RS controller implements the Massbus family of fast disk drives. RS\n");
|
||
fprintf (st, "options include the ability to set units write enabled or write locked, to\n");
|
||
fprintf (st, "set the drive type to one of six disk types or autosize, and to write a DEC\n");
|
||
fprintf (st, "standard 044 compliant bad block table on the last track.\n\n");
|
||
fprint_set_help (st, dptr);
|
||
fprint_show_help (st, dptr);
|
||
fprintf (st, "\nThe type options can be used only when a unit is not attached to a file.\n");
|
||
fprintf (st, "The RS device supports the BOOT command.\n");
|
||
fprint_reg_help (st, dptr);
|
||
return SCPE_OK;
|
||
}
|
||
|
||
const char *rs_description (DEVICE *dptr)
|
||
{
|
||
return "RS04 Massbus disk controller";
|
||
}
|
||
|
||
|
||
#endif
|