92ff16ca7b
This change lays the groundwork for adding support for Rev 3 3B2 models, which includes the Model 500, Model 600, and Model 1000. Rather than use the fixed strings "400" and "1000" in file names, the strings "rev2" and "rev3" will be used, which allows greater flexibility to implement various system configurations more easily. Additionally, this change adds a copy of the Debug Monitor (DEMON) ROM image for the Rev 2 board, to be used soon in a later checkin.
383 lines
13 KiB
C
383 lines
13 KiB
C
/* 3b2_rev2_mau.c: AT&T 3B2 Rev 2 (Model 400) Math Acceleration
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Unit (WE32106 MAU) Header
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Copyright (c) 2019, Seth J. Morabito
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Permission is hereby granted, free of charge, to any person
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obtaining a copy of this software and associated documentation
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files (the "Software"), to deal in the Software without
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restriction, including without limitation the rights to use, copy,
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modify, merge, publish, distribute, sublicense, and/or sell copies
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of the Software, and to permit persons to whom the Software is
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furnished to do so, subject to the following conditions:
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The above copyright notice and this permission notice shall be
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included in all copies or substantial portions of the Software.
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THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
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ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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SOFTWARE.
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Except as contained in this notice, the name of the author shall
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not be used in advertising or otherwise to promote the sale, use or
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other dealings in this Software without prior written authorization
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from the author.
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---------------------------------------------------------------------
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This file is part of a simulation of the WE32106 Math Acceleration
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Unit. The WE32106 MAU is an IEEE-754 compabitle floating point
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hardware math accelerator that was available as an optional
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component on the AT&T 3B2/310 and 3B2/400, and a standard component
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on the 3B2/500, 3B2/600, and 3B2/1000.
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Portions of this code are derived from the SoftFloat 2c library by
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John R. Hauser. Functions derived from SoftFloat 2c are clearly
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marked in the comments.
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Legal Notice
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============
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SoftFloat was written by John R. Hauser. Release 2c of SoftFloat
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was made possible in part by the International Computer Science
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Institute, located at Suite 600, 1947 Center Street, Berkeley,
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California 94704. Funding was partially provided by the National
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Science Foundation under grant MIP-9311980. The original version
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of this code was written as part of a project to build a
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fixed-point vector processor in collaboration with the University
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of California at Berkeley, overseen by Profs. Nelson Morgan and
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John Wawrzynek.
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THIS SOFTWARE IS DISTRIBUTED AS IS, FOR FREE. Although reasonable
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effort has been made to avoid it, THIS SOFTWARE MAY CONTAIN FAULTS
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THAT WILL AT TIMES RESULT IN INCORRECT BEHAVIOR. USE OF THIS
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SOFTWARE IS RESTRICTED TO PERSONS AND ORGANIZATIONS WHO CAN AND
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WILL TOLERATE ALL LOSSES, COSTS, OR OTHER PROBLEMS THEY INCUR DUE
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TO THE SOFTWARE WITHOUT RECOMPENSE FROM JOHN HAUSER OR THE
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INTERNATIONAL COMPUTER SCIENCE INSTITUTE, AND WHO FURTHERMORE
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EFFECTIVELY INDEMNIFY JOHN HAUSER AND THE INTERNATIONAL COMPUTER
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SCIENCE INSTITUTE (possibly via similar legal notice) AGAINST ALL
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LOSSES, COSTS, OR OTHER PROBLEMS INCURRED BY THEIR CUSTOMERS AND
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CLIENTS DUE TO THE SOFTWARE, OR INCURRED BY ANYONE DUE TO A
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DERIVATIVE WORK THEY CREATE USING ANY PART OF THE SOFTWARE.
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The following are expressly permitted, even for commercial
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purposes:
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(1) distribution of SoftFloat in whole or in part, as long as this
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and other legal notices remain and are prominent, and provided also
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that, for a partial distribution, prominent notice is given that it
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is a subset of the original; and
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(2) inclusion or use of SoftFloat in whole or in part in a
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derivative work, provided that the use restrictions above are met
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and the minimal documentation requirements stated in the source
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code are satisfied.
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---------------------------------------------------------------------
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Data Types
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==========
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The WE32106 MAU stores values using IEEE-754 1985 types, plus a
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non-standard Decimal type.
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- Decimal Type - 18 BCD digits long. Each digit is 4 bits wide.
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Sign is encoded in byte 0.
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3322 2222 2222 1111 1111 1100 0000 0000
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1098 7654 3210 9876 5432 1098 7654 3210
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+-------------------+----+----+----+----+
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| unused | D18| D17| D16| D15| High Word
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+----+----+----+----+----+----+----+----+
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| D14| D13| D12| D11| D10| D09| D08| D07| Middle Word
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+----+----+----+----+----+----+----+----+
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| D06| D05| D04| D03| D02| D01| D00|sign| Low Word
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+----+----+----+----+----+----+----+----+
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Sign: 0: Positive Infinity 10: Positive Number
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1: Negative Infinity 11: Negative Number
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2: Positive NaN 12: Positive Number
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3: Negative NaN 13: Negative Number
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4-9: Trapping NaN 14-15: Positive Number
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- Extended Precision (80-bit) - exponent biased by 16383
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3 322222222221111 1 111110000000000
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1 098765432109876 5 432109876543210
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+-----------------+-+---------------+
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| unused |S| Exponent | High Word
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+-+---------------+-+---------------+
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|J| Fraction (high word) | Middle Word
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+-+---------------------------------+
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| Fraction (low word) | Low Word
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+-----------------------------------+
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- Double Precision (64-bit) - exponent biased by 1023
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3 3222222222 211111111110000000000
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1 0987654321 098765432109876543210
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+-+----------+---------------------+
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|S| Exponent | Fraction (high) | High Word
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+-+----------+---------------------+
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| Fraction (low) | Low Word
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+----------------------------------+
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- Single Precision (32-bit) - exponent biased by 127
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3 32222222 22211111111110000000000
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1 09876543 21098765432109876543210
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+-+--------+-----------------------+
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|S| Exp | Fraction |
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+-+--------+-----------------------+
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*/
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#ifndef _3B2_REV2_MAU_H_
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#define _3B2_REV2_MAU_H_
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#include "sim_defs.h"
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#define SRC_LEN_INVALID 0
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#define SRC_LEN_SINGLE 1
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#define SRC_LEN_DOUBLE 2
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#define SRC_LEN_TRIPLE 3
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#define MAU_ASR_RC_SHIFT 22
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#define MAU_ASR_PR 0x20u /* Partial Remainder */
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#define MAU_ASR_QS 0x40u /* Divide By Zero Sticky */
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#define MAU_ASR_US 0x80u /* Underflow Sticky */
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#define MAU_ASR_OS 0x100u /* Overflow Sticky */
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#define MAU_ASR_IS 0x200u /* Invalid Operation Sticky */
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#define MAU_ASR_PM 0x400u /* Inexact Mask */
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#define MAU_ASR_QM 0x800u /* Divide by Zero Mask */
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#define MAU_ASR_UM 0x1000u /* Underflow Mask */
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#define MAU_ASR_OM 0x2000u /* Overflow Mask */
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#define MAU_ASR_IM 0x4000u /* Invalid Operation Mask */
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#define MAU_ASR_UO 0x10000u /* Unordered */
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#define MAU_ASR_CSC 0x20000u /* Context Switch Control */
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#define MAU_ASR_PS 0x40000u /* Inexact Sticky */
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#define MAU_ASR_IO 0x80000u /* Integer Overflow */
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#define MAU_ASR_Z 0x100000u /* Zero Flag */
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#define MAU_ASR_N 0x200000u /* Negative Flag */
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#define MAU_ASR_RC 0x400000u /* Round Control */
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#define MAU_ASR_NTNC 0x1000000u /* Nontrapping NaN Control */
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#define MAU_ASR_ECP 0x2000000u /* Exception Condition */
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#define MAU_ASR_RA 0x80000000u /* Result Available */
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#define MAU_RC_RN 0 /* Round toward Nearest */
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#define MAU_RC_RP 1 /* Round toward Plus Infin. */
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#define MAU_RC_RM 2 /* Round toward Neg. Infin. */
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#define MAU_RC_RZ 3 /* Round toward Zero */
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#define SFP_SIGN(V) (((V) >> 31) & 1)
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#define SFP_EXP(V) (((V) >> 23) & 0xff)
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#define SFP_FRAC(V) ((V) & 0x7fffff)
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#define DFP_SIGN(V) (((V) >> 63) & 1)
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#define DFP_EXP(V) (((V) >> 52) & 0x7ff)
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#define DFP_FRAC(V) ((V) & 0xfffffffffffffull)
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#define XFP_SIGN(V) (((V)->sign_exp >> 15) & 1)
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#define XFP_EXP(V) ((V)->sign_exp & 0x7fff)
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#define XFP_FRAC(V) ((V)->frac)
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#define XFP_IS_NORMAL(V) ((V)->frac & 0x8000000000000000ull)
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#define DEFAULT_XFP_NAN_SIGN_EXP 0xffff
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#define DEFAULT_XFP_NAN_FRAC 0xc000000000000000ull
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#define SFP_IS_TRAPPING_NAN(V) (((((V) >> 22) & 0x1ff) == 0x1fe) && \
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((V) & 0x3fffff))
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#define DFP_IS_TRAPPING_NAN(V) (((((V) >> 51) & 0xfff) == 0xffe) && \
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((V) & 0x7ffffffffffffull))
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#define XFP_IS_NAN(V) ((((V)->sign_exp & 0x7fff) == 0x7fff) && \
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(t_uint64)((V)->frac << 1))
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#define XFP_IS_TRAPPING_NAN(V) ((((V)->sign_exp) & 0x7fff) && \
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((((V)->frac) & ~(0x4000000000000000ull)) << 1) && \
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(((V)->frac) == ((V)->frac & ~(0x4000000000000000ull))))
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#define PACK_DFP(SIGN,EXP,FRAC) ((((t_uint64)(SIGN))<<63) + \
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(((t_uint64)(EXP))<<52) + \
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((t_uint64)(FRAC)))
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#define PACK_SFP(SIGN,EXP,FRAC) (((uint32)(SIGN)<<31) + \
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((uint32)(EXP)<<23) + \
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((uint32)(FRAC)))
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#define PACK_XFP(SIGN,EXP,FRAC,V) do { \
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(V)->frac = (FRAC); \
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(V)->sign_exp = ((uint16)(SIGN) << 15) + (EXP); \
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(V)->s = FALSE; \
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} while (0)
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#define PACK_XFP_S(SIGN,EXP,FRAC,S,V) do { \
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(V)->frac = (FRAC); \
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(V)->sign_exp = ((uint16)(SIGN) << 15) + (EXP); \
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(V)->s = (S) != 0; \
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} while (0)
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#define MAU_RM ((RM)((mau_state.asr >> 22) & 3))
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typedef enum {
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M_ADD = 0x02,
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M_SUB = 0x03,
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M_DIV = 0x04,
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M_REM = 0x05,
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M_MUL = 0x06,
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M_MOVE = 0x07,
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M_RDASR = 0x08,
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M_WRASR = 0x09,
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M_CMP = 0x0a,
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M_CMPE = 0x0b,
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M_ABS = 0x0c,
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M_SQRT = 0x0d,
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M_RTOI = 0x0e,
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M_FTOI = 0x0f,
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M_ITOF = 0x10,
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M_DTOF = 0x11,
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M_FTOD = 0x12,
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M_NOP = 0x13,
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M_EROF = 0x14,
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M_NEG = 0x17,
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M_LDR = 0x18,
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M_CMPS = 0x1a,
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M_CMPES = 0x1b
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} mau_opcodes;
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typedef enum {
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M_OP3_F0_SINGLE,
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M_OP3_F1_SINGLE,
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M_OP3_F2_SINGLE,
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M_OP3_F3_SINGLE,
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M_OP3_F0_DOUBLE,
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M_OP3_F1_DOUBLE,
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M_OP3_F2_DOUBLE,
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M_OP3_F3_DOUBLE,
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M_OP3_F0_TRIPLE,
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M_OP3_F1_TRIPLE,
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M_OP3_F2_TRIPLE,
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M_OP3_F3_TRIPLE,
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M_OP3_MEM_SINGLE,
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M_OP3_MEM_DOUBLE,
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M_OP3_MEM_TRIPLE,
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M_OP3_NONE
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} op3_spec;
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/* Specifier bytes for Operands 1 and 2 */
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typedef enum {
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M_OP_F0,
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M_OP_F1,
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M_OP_F2,
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M_OP_F3,
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M_OP_MEM_SINGLE,
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M_OP_MEM_DOUBLE,
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M_OP_MEM_TRIPLE,
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M_OP_NONE
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} op_spec;
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/*
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* 128-bit value
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*/
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typedef struct {
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t_uint64 low;
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t_uint64 high;
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} t_mau_128;
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/*
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* Not-a-Number Type
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*/
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typedef struct {
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t_bool sign;
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t_uint64 high;
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t_uint64 low;
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} T_NAN;
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/*
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* Extended Precision (80 bits).
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*
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* Note that an undocumented feature of the WE32106 requires the use
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* of uint32 rather than uint16 for the sign and exponent components
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* of the struct. Although bits 80-95 are "unused", several
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* diagnostics actually expect these bits to be moved and preserved on
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* word transfers. They are ignored and discarded by math routines,
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* however.
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*
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* The 's' field holds the Sticky bit used by rounding.
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*/
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typedef struct {
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uint32 sign_exp; /* Sign and Exponent */
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t_uint64 frac; /* Fraction/Significand/Mantissa */
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t_bool s; /* Sticky bit */
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} XFP;
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typedef struct {
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uint32 h;
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t_uint64 l;
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} DEC;
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/*
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* Supported rounding modes.
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*/
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typedef enum {
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ROUND_NEAREST,
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ROUND_PLUS_INF,
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ROUND_MINUS_INF,
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ROUND_ZERO
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} RM;
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/*
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* Double Precision (64 bits)
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*/
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typedef t_uint64 DFP;
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/*
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* Single Precision (32 bits)
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*/
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typedef uint32 SFP;
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/*
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* MAU state
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*/
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typedef struct {
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uint32 cmd;
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/* Exception */
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uint32 exception;
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/* Status register */
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uint32 asr;
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t_bool trapping_nan;
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/* Generate a Non-Trapping NaN */
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t_bool ntnan;
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/* Source (from broadcast) */
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uint32 src;
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/* Destination (from broadcast) */
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uint32 dst;
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uint8 opcode;
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uint8 op1;
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uint8 op2;
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uint8 op3;
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/* Data Register */
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XFP dr;
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/* Operand Registers */
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XFP f0;
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XFP f1;
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XFP f2;
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XFP f3;
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} MAU_STATE;
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t_stat mau_reset(DEVICE *dptr);
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t_stat mau_attach(UNIT *uptr, CONST char *cptr);
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t_stat mau_detach(UNIT *uptr);
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t_stat mau_broadcast(uint32 cmd, uint32 src, uint32 dst);
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CONST char *mau_description(DEVICE *dptr);
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t_stat mau_broadcast(uint32 cmd, uint32 src, uint32 dst);
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#endif /* _3B2_REV2_MAU_H_ */
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