183 lines
6.5 KiB
C
183 lines
6.5 KiB
C
/* iSBC80-24.c: Intel iSBC 80/24 Processor simulator
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Copyright (c) 2010, William A. Beech
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Permission is hereby granted, free of charge, to any person obtaining a
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copy of this software and associated documentation files (the "Software"),
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to deal in the Software without restriction, including without limitation
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the rights to use, copy, modify, merge, publish, distribute, sublicense,
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and/or sell copies of the Software, and to permit persons to whom the
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Software is furnished to do so, subject to the following conditions:
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The above copyright notice and this permission notice shall be included in
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all copies or substantial portions of the Software.
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THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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WILLIAM A. BEECH BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
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IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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Except as contained in this notice, the name of William A. Beech shall not be
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used in advertising or otherwise to promote the sale, use or other dealings
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in this Software without prior written authorization from William A. Beech.
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MODIFICATIONS:
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04 Nov 16 - Original file.
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NOTES:
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This software was written by Bill Beech, Nov 2016, to allow emulation of Multibus
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Computer Systems.
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*/
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#include "system_defs.h"
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/* function prototypes */
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t_stat SBC_config(void);
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t_stat SBC_reset (DEVICE *dptr);
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uint8 get_mbyte(uint16 addr);
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uint16 get_mword(uint16 addr);
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void put_mbyte(uint16 addr, uint8 val);
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void put_mword(uint16 addr, uint16 val);
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/* external globals */
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extern uint8 i8255_C[4]; //port C byte I/O
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extern uint16 PCX; /* External view of PC */
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/* external function prototypes */
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extern uint8 multibus_get_mbyte(uint16 addr);
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extern void multibus_put_mbyte(uint16 addr, uint8 val);
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extern t_stat i8080_reset (DEVICE *dptr); /* reset the 8080 emulator */
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extern DEVICE i8080_dev;
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extern t_stat i8251_reset (DEVICE *dptr);
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extern uint8 i8251s(t_bool io, uint8 data, uint8 devnum);
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extern uint8 i8251d(t_bool io, uint8 data, uint8 devnum);
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extern DEVICE i8251_dev;
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extern t_stat i8253_reset (DEVICE *dptr);
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extern uint8 i8253t0(t_bool io, uint8 data, uint8 devnum);
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extern uint8 i8253t1(t_bool io, uint8 data, uint8 devnum);
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extern uint8 i8253t2(t_bool io, uint8 data, uint8 devnum);
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extern uint8 i8253c(t_bool io, uint8 data, uint8 devnum);
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extern DEVICE i8253_dev;
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extern t_stat i8255_reset (DEVICE *dptr);
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extern uint8 i8255a(t_bool io, uint8 data, uint8 devnum);
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extern uint8 i8255b(t_bool io, uint8 data, uint8 devnum);
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extern uint8 i8255c(t_bool io, uint8 data, uint8 devnum);
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extern uint8 i8255s(t_bool io, uint8 data, uint8 devnum);
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extern DEVICE i8255_dev;
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extern t_stat i8259_reset (DEVICE *dptr);
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extern uint8 i8259a(t_bool io, uint8 data, uint8 devnum);
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extern uint8 i8259b(t_bool io, uint8 data, uint8 devnum);
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extern DEVICE i8259_dev;
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extern uint8 EPROM_get_mbyte(uint16 addr, uint8 devnum);
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extern UNIT EPROM_unit[];
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extern t_stat EPROM_reset (DEVICE *dptr, uint16 base, uint16 size);
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extern uint8 RAM_get_mbyte(uint16 addr);
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extern void RAM_put_mbyte(uint16 addr, uint8 val);
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extern UNIT RAM_unit;
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extern t_stat RAM_reset (DEVICE *dptr, uint16 base, uint16 size);
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extern t_stat i8251_cfg(uint8 base, uint8 devnum);
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extern t_stat i8253_cfg(uint8 base, uint8 devnum);
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extern t_stat i8255_cfg(uint8 base, uint8 devnum);
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extern t_stat i8259_cfg(uint8 base, uint8 devnum);
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extern t_stat RAM_cfg(uint16 base, uint16 size);
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extern t_stat EPROM_cfg(uint16 base, uint16 size, uint8 devnum);
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// globals
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int onetime = 0;
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t_stat SBC_config(void)
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{
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sim_printf("Configuring iSBC-80/24 SBC\n Onboard Devices:\n");
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i8251_cfg(I8251_BASE, 0);
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i8253_cfg(I8253_BASE, 0);
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i8255_cfg(I8255_BASE_0, 0);
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i8255_cfg(I8255_BASE_1, 1);
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i8259_cfg(I8259_BASE, 0);
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EPROM_cfg(ROM_BASE, ROM_SIZE, 0);
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RAM_cfg(RAM_BASE, RAM_SIZE);
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return SCPE_OK;
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}
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/* SBC reset routine */
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t_stat SBC_reset (DEVICE *dptr)
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{
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if (onetime == 0) {
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SBC_config();
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onetime++;
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}
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i8080_reset(&i8080_dev);
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i8251_reset(&i8251_dev);
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i8253_reset(&i8253_dev);
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i8255_reset(&i8255_dev);
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i8255_reset(&i8255_dev);
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i8259_reset(&i8259_dev);
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return SCPE_OK;
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}
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/* get a byte from memory - handle RAM, ROM, I/O, and Multibus memory */
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uint8 get_mbyte(uint16 addr)
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{
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/* if local EPROM handle it */
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if ((ROM_DISABLE && (i8255_C[0] & 0x20)) || (ROM_DISABLE == 0)) { /* EPROM enabled */
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if ((addr >= EPROM_unit->u3) && ((uint16)addr <= (EPROM_unit->u3 + EPROM_unit->capac))) {
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return EPROM_get_mbyte(addr, 0);
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}
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} /* if local RAM handle it */
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if ((RAM_DISABLE && (i8255_C[0] & 0x10)) || (RAM_DISABLE == 0)) { /* RAM enabled */
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if ((addr >= RAM_unit.u3) && ((uint16)addr <= (RAM_unit.u3 + RAM_unit.capac))) {
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return RAM_get_mbyte(addr);
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}
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} /* otherwise, try the multibus */
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return multibus_get_mbyte(addr);
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}
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/* get a word from memory */
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uint16 get_mword(uint16 addr)
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{
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uint16 val;
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val = get_mbyte(addr);
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val |= (get_mbyte(addr+1) << 8);
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return val;
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}
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/* put a byte to memory - handle RAM, ROM, I/O, and Multibus memory */
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void put_mbyte(uint16 addr, uint8 val)
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{
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/* if local EPROM handle it */
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if ((ROM_DISABLE && (i8255_C[0] & 0x20)) || (ROM_DISABLE == 0)) { /* EPROM enabled */
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if ((addr >= EPROM_unit->u3) && ((uint16)addr <= (EPROM_unit->u3 + EPROM_unit->capac))) {
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sim_printf("Write to R/O memory address %04X from PC=%04X - ignored\n", addr, PCX);
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return;
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}
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} /* if local RAM handle it */
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if ((RAM_DISABLE && (i8255_C[0] & 0x10)) || (RAM_DISABLE == 0)) { /* RAM enabled */
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if ((addr >= RAM_unit.u3) && ((uint16)addr <= (RAM_unit.u3 + RAM_unit.capac))) {
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RAM_put_mbyte(addr, val);
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return;
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}
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} /* otherwise, try the multibus */
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multibus_put_mbyte(addr, val);
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}
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/* put a word to memory */
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void put_mword(uint16 addr, uint16 val)
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{
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put_mbyte(addr, val & 0xff);
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put_mbyte(addr+1, val >> 8);
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}
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/* end of iSBC80-24.c */
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