The makefile now works for Linux and most Unix's. Howevr, for Solaris and MacOS, you must first export the OSTYPE environment variable: > export OSTYPE > make Otherwise, you will get build errors. 1. New Features 1.1 3.8-0 1.1.1 SCP and Libraries - BREAK, NOBREAK, and SHOW BREAK with no argument will set, clear, and show (respectively) a breakpoint at the current PC. 1.1.2 GRI - Added support for the GRI-99 processor. 1.1.3 HP2100 - Added support for the BACI terminal interface. - Added support for RTE OS/VMA/EMA, SIGNAL, VIS firmware extensions. 1.1.4 Nova - Added support for 64KW memory (implemented in third-party CPU's). 1.1.5 PDP-11 - Added support for DC11, RC11, KE11A, KG11A. - Added modem control support for DL11. - Added ASCII character support for all 8b devices. 1.2 3.8-1 1.2.1 SCP and libraries - Added capability to set line connection order for terminal multiplexers. 1.2.2 HP2100 - Added support for 12620A/12936A privileged interrupt fence. - Added support for 12792C eight-channel asynchronous multiplexer. 2. Bugs Fixed Please see the revision history on http://simh.trailing-edge.com or in the source module sim_rev.h.
521 lines
20 KiB
C
521 lines
20 KiB
C
/* pdp11_io_lib.c: Unibus/Qbus common support routines
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Copyright (c) 1993-2008, Robert M Supnik
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Permission is hereby granted, free of charge, to any person obtaining a
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copy of this software and associated documentation files (the "Software"),
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to deal in the Software without restriction, including without limitation
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the rights to use, copy, modify, merge, publish, distribute, sublicense,
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and/or sell copies of the Software, and to permit persons to whom the
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Software is furnished to do so, subject to the following conditions:
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The above copyright notice and this permission notice shall be included in
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all copies or substantial portions of the Software.
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THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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ROBERT M SUPNIK BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
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IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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Except as contained in this notice, the name of Robert M Supnik shall not be
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used in advertising or otherwise to promote the sale, use or other dealings
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in this Software without prior written authorization from Robert M Supnik.
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*/
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#if defined (VM_PDP10) /* PDP10 version */
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#include "pdp10_defs.h"
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#elif defined (VM_VAX) /* VAX version */
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#include "vax_defs.h"
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#else /* PDP-11 version */
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#include "pdp11_defs.h"
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#endif
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#include "sim_sock.h"
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#include "sim_tmxr.h"
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extern FILE *sim_log;
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extern DEVICE *sim_devices[];
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extern int32 autcon_enb;
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extern int32 int_vec[IPL_HLVL][32];
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extern int32 (*int_ack[IPL_HLVL][32])(void);
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extern t_stat (*iodispR[IOPAGESIZE >> 1])(int32 *dat, int32 ad, int32 md);
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extern t_stat (*iodispW[IOPAGESIZE >> 1])(int32 dat, int32 ad, int32 md);
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extern t_stat build_dib_tab (void);
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static DIB *iodibp[IOPAGESIZE >> 1];
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/* Enable/disable autoconfiguration */
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t_stat set_autocon (UNIT *uptr, int32 val, char *cptr, void *desc)
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{
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if (cptr != NULL)
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return SCPE_ARG;
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autcon_enb = val;
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return auto_config (NULL, 0);
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}
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/* Show autoconfiguration status */
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t_stat show_autocon (FILE *st, UNIT *uptr, int32 val, void *desc)
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{
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fprintf (st, "autoconfiguration ");
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fprintf (st, autcon_enb? "enabled": "disabled");
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return SCPE_OK;
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}
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/* Change device address */
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t_stat set_addr (UNIT *uptr, int32 val, char *cptr, void *desc)
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{
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DEVICE *dptr;
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DIB *dibp;
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uint32 newba;
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t_stat r;
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if (cptr == NULL)
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return SCPE_ARG;
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if ((val == 0) || (uptr == NULL))
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return SCPE_IERR;
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dptr = find_dev_from_unit (uptr);
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if (dptr == NULL)
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return SCPE_IERR;
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dibp = (DIB *) dptr->ctxt;
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if (dibp == NULL)
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return SCPE_IERR;
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newba = (uint32) get_uint (cptr, DEV_RDX, IOPAGEBASE+IOPAGEMASK, &r); /* get new */
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if (r != SCPE_OK)
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return r;
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if ((newba <= IOPAGEBASE) || /* > IO page base? */
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(newba % ((uint32) val))) /* check modulus */
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return SCPE_ARG;
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dibp->ba = newba; /* store */
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dptr->flags = dptr->flags & ~DEV_FLTA; /* not floating */
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autcon_enb = 0; /* autoconfig off */
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return SCPE_OK;
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}
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/* Show device address */
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t_stat show_addr (FILE *st, UNIT *uptr, int32 val, void *desc)
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{
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DEVICE *dptr;
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DIB *dibp;
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if (uptr == NULL)
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return SCPE_IERR;
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dptr = find_dev_from_unit (uptr);
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if (dptr == NULL)
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return SCPE_IERR;
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dibp = (DIB *) dptr->ctxt;
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if ((dibp == NULL) || (dibp->ba <= IOPAGEBASE))
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return SCPE_IERR;
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fprintf (st, "address=");
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fprint_val (st, (t_value) dibp->ba, DEV_RDX, 32, PV_LEFT);
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if (dibp->lnt > 1) {
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fprintf (st, "-");
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fprint_val (st, (t_value) dibp->ba + dibp->lnt - 1, DEV_RDX, 32, PV_LEFT);
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}
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if (dptr->flags & DEV_FLTA)
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fprintf (st, "*");
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return SCPE_OK;
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}
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/* Set address floating */
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t_stat set_addr_flt (UNIT *uptr, int32 val, char *cptr, void *desc)
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{
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DEVICE *dptr;
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if (cptr != NULL)
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return SCPE_ARG;
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if (uptr == NULL)
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return SCPE_IERR;
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dptr = find_dev_from_unit (uptr);
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if (dptr == NULL)
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return SCPE_IERR;
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dptr->flags = dptr->flags | DEV_FLTA; /* floating */
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return auto_config (NULL, 0); /* autoconfigure */
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}
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/* Change device vector */
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t_stat set_vec (UNIT *uptr, int32 arg, char *cptr, void *desc)
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{
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DEVICE *dptr;
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DIB *dibp;
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uint32 newvec;
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t_stat r;
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if (cptr == NULL)
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return SCPE_ARG;
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if (uptr == NULL)
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return SCPE_IERR;
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dptr = find_dev_from_unit (uptr);
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if (dptr == NULL)
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return SCPE_IERR;
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dibp = (DIB *) dptr->ctxt;
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if (dibp == NULL)
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return SCPE_IERR;
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newvec = (uint32) get_uint (cptr, DEV_RDX, VEC_Q + 01000, &r);
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if ((r != SCPE_OK) || (newvec == VEC_Q) ||
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((newvec + (dibp->vnum * 4)) >= (VEC_Q + 01000)) ||
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(newvec & ((dibp->vnum > 1)? 07: 03)))
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return SCPE_ARG;
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dibp->vec = newvec;
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dptr->flags = dptr->flags & ~DEV_FLTA; /* not floating */
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autcon_enb = 0; /* autoconfig off */
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return SCPE_OK;
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}
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/* Show device vector */
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t_stat show_vec (FILE *st, UNIT *uptr, int32 arg, void *desc)
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{
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DEVICE *dptr;
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DIB *dibp;
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uint32 vec, numvec;
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if (uptr == NULL)
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return SCPE_IERR;
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dptr = find_dev_from_unit (uptr);
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if (dptr == NULL)
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return SCPE_IERR;
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dibp = (DIB *) dptr->ctxt;
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if (dibp == NULL)
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return SCPE_IERR;
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vec = dibp->vec;
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if (arg)
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numvec = arg;
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else numvec = dibp->vnum;
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if (vec == 0)
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fprintf (st, "no vector");
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else {
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fprintf (st, "vector=");
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fprint_val (st, (t_value) vec, DEV_RDX, 16, PV_LEFT);
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if (numvec > 1) {
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fprintf (st, "-");
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fprint_val (st, (t_value) vec + (4 * (numvec - 1)), DEV_RDX, 16, PV_LEFT);
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}
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}
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return SCPE_OK;
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}
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/* Show vector for terminal multiplexor */
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t_stat show_vec_mux (FILE *st, UNIT *uptr, int32 arg, void *desc)
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{
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TMXR *mp = (TMXR *) desc;
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if ((mp == NULL) || (arg == 0))
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return SCPE_IERR;
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return show_vec (st, uptr, ((mp->lines * 2) / arg), desc);
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}
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/* Init Unibus tables */
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void init_ubus_tab (void)
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{
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int32 i, j;
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for (i = 0; i < IPL_HLVL; i++) { /* clear intr tab */
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for (j = 0; j < 32; j++) {
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int_vec[i][j] = 0;
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int_ack[i][j] = NULL;
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}
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}
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for (i = 0; i < (IOPAGESIZE >> 1); i++) { /* clear dispatch tab */
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iodispR[i] = NULL;
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iodispW[i] = NULL;
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iodibp[i] = NULL;
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}
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return;
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}
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/* Build Unibus tables */
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t_stat build_ubus_tab (DEVICE *dptr, DIB *dibp)
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{
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int32 i, idx, vec, ilvl, ibit;
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if ((dptr == NULL) || (dibp == NULL)) /* validate args */
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return SCPE_IERR;
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if (dibp->vnum > VEC_DEVMAX)
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return SCPE_IERR;
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for (i = 0; i < dibp->vnum; i++) { /* loop thru vec */
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idx = dibp->vloc + i; /* vector index */
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vec = dibp->vec? (dibp->vec + (i * 4)): 0; /* vector addr */
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ilvl = idx / 32;
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ibit = idx % 32;
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if ((int_ack[ilvl][ibit] && dibp->ack[i] && /* conflict? */
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(int_ack[ilvl][ibit] != dibp->ack[i])) ||
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(int_vec[ilvl][ibit] && vec &&
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(int_vec[ilvl][ibit] != vec))) {
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printf ("Device %s interrupt slot conflict at %d\n",
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sim_dname (dptr), idx);
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if (sim_log)
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fprintf (sim_log, "Device %s interrupt slot conflict at %d\n",
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sim_dname (dptr), idx);
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return SCPE_STOP;
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}
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if (dibp->ack[i])
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int_ack[ilvl][ibit] = dibp->ack[i];
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else if (vec)
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int_vec[ilvl][ibit] = vec;
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}
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for (i = 0; i < (int32) dibp->lnt; i = i + 2) { /* create entries */
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idx = ((dibp->ba + i) & IOPAGEMASK) >> 1; /* index into disp */
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if ((iodispR[idx] && dibp->rd && /* conflict? */
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(iodispR[idx] != dibp->rd)) ||
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(iodispW[idx] && dibp->wr &&
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(iodispW[idx] != dibp->wr))) {
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printf ("Device %s address conflict at \n", sim_dname (dptr));
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fprint_val (stdout, (t_value) dibp->ba, DEV_RDX, 32, PV_LEFT);
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if (sim_log) {
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fprintf (sim_log, "Device %s address conflict at \n", sim_dname (dptr));
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fprint_val (sim_log, (t_value) dibp->ba, DEV_RDX, 32, PV_LEFT);
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}
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return SCPE_STOP;
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}
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if (dibp->rd) /* set rd dispatch */
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iodispR[idx] = dibp->rd;
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if (dibp->wr) /* set wr dispatch */
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iodispW[idx] = dibp->wr;
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iodibp[idx] = dibp; /* remember DIB */
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}
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return SCPE_OK;
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}
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/* Show IO space */
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t_stat show_iospace (FILE *st, UNIT *uptr, int32 val, void *desc)
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{
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uint32 i, j;
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DEVICE *dptr;
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DIB *dibp;
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if (build_dib_tab ()) /* build IO page */
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return SCPE_OK;
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for (i = 0, dibp = NULL; i < (IOPAGESIZE >> 1); i++) { /* loop thru entries */
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if (iodibp[i] && (iodibp[i] != dibp)) { /* new block? */
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dibp = iodibp[i]; /* DIB for block */
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for (j = 0, dptr = NULL; sim_devices[j] != NULL; j++) {
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if (((DIB*) sim_devices[j]->ctxt) == dibp) {
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dptr = sim_devices[j]; /* locate device */
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break;
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} /* end if */
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} /* end for j */
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fprint_val (st, (t_value) dibp->ba, DEV_RDX, 32, PV_LEFT);
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fprintf (st, " - ");
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fprint_val (st, (t_value) dibp->ba + dibp->lnt - 1, DEV_RDX, 32, PV_LEFT);
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fprintf (st, "%c\t%s\n", /* print block entry */
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(dptr && (dptr->flags & DEV_FLTA))? '*': ' ',
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dptr? sim_dname (dptr): "CPU");
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} /* end if */
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} /* end for i */
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return SCPE_OK;
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}
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/* Autoconfiguration
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The table reflects the MicroVAX 3900 microcode, with one addition - the
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number of controllers field handles devices where multiple instances
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are simulated through a single DEVICE structure (e.g., DZ, VH).
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A minus number of vectors indicates a field that should be calculated
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but not placed in the DIB (RQ, TQ dynamic vectors) */
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#define AUTO_MAXC 4
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#define AUTO_CSRBASE 0010
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#define AUTO_VECBASE 0300
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typedef struct {
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char *dnam[AUTO_MAXC];
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int32 numc;
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int32 numv;
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uint32 amod;
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uint32 vmod;
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uint32 fixa[AUTO_MAXC];
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uint32 fixv[AUTO_MAXC];
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} AUTO_CON;
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AUTO_CON auto_tab[] = {
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{ { "DCI" }, DCX_LINES, 2, 0, 8, { 0 } }, /* DC11 - fx CSRs */
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{ { "DLI" }, DLX_LINES, 2, 0, 8, { 0 } }, /* KL11/DL11/DLV11 - fx CSRs */
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{ { NULL }, 1, 2, 0, 8, { 0 } }, /* DLV11J - fx CSRs */
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{ { NULL }, 1, 2, 8, 8 }, /* DJ11 */
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{ { NULL }, 1, 2, 16, 8 }, /* DH11 */
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{ { NULL }, 1, 2, 8, 8 }, /* DQ11 */
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{ { NULL }, 1, 2, 8, 8 }, /* DU11 */
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{ { NULL }, 1, 2, 8, 8 }, /* DUP11 */
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{ { NULL }, 10, 2, 8, 8 }, /* LK11A */
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{ { NULL }, 1, 2, 8, 8 }, /* DMC11 */
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{ { "DZ" }, DZ_MUXES, 2, 8, 8 }, /* DZ11 */
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{ { NULL }, 1, 2, 8, 8 }, /* KMC11 */
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{ { NULL }, 1, 2, 8, 8 }, /* LPP11 */
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{ { NULL }, 1, 2, 8, 8 }, /* VMV21 */
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{ { NULL }, 1, 2, 16, 8 }, /* VMV31 */
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{ { NULL }, 1, 2, 8, 8 }, /* DWR70 */
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{ { "RL", "RLB" }, 1, 1, 8, 4, {IOBA_RL}, {VEC_RL} }, /* RL11 */
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{ { "TS", "TSB", "TSC", "TSD" }, 1, 1, 0, 4, /* TS11 */
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{IOBA_TS, IOBA_TS + 4, IOBA_TS + 8, IOBA_TS + 12},
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{VEC_TS} },
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{ { NULL }, 1, 2, 16, 8 }, /* LPA11K */
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{ { NULL }, 1, 2, 8, 8 }, /* KW11C */
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{ { NULL }, 1, 1, 8, 8 }, /* reserved */
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{ { "RX", "RY" }, 1, 1, 8, 4, {IOBA_RX} , {VEC_RX} }, /* RX11/RX211 */
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{ { NULL }, 1, 1, 8, 4 }, /* DR11W */
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{ { NULL }, 1, 1, 8, 4, { 0, 0 }, { 0 } }, /* DR11B - fx CSRs,vec */
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{ { NULL }, 1, 2, 8, 8 }, /* DMP11 */
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{ { NULL }, 1, 2, 8, 8 }, /* DPV11 */
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{ { NULL }, 1, 2, 8, 8 }, /* ISB11 */
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{ { NULL }, 1, 2, 16, 8 }, /* DMV11 */
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{ { "XU", "XUB" }, 1, 1, 8, 4, {IOBA_XU}, {VEC_XU} }, /* DEUNA */
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{ { "XQ", "XQB" }, 1, 1, 0, 4, /* DEQNA */
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{IOBA_XQ,IOBA_XQB}, {VEC_XQ} },
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{ { "RQ", "RQB", "RQC", "RQD" }, 1, -1, 4, 4, /* RQDX3 */
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{IOBA_RQ}, {VEC_RQ} },
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{ { NULL }, 1, 8, 32, 4 }, /* DMF32 */
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{ { NULL }, 1, 2, 16, 8 }, /* KMS11 */
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{ { NULL }, 1, 1, 16, 4 }, /* VS100 */
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{ { "TQ", "TQB" }, 1, -1, 4, 4, {IOBA_TQ}, {VEC_TQ} }, /* TQK50 */
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{ { NULL }, 1, 2, 16, 8 }, /* KMV11 */
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{ { "VH" }, VH_MUXES, 2, 16, 8 }, /* DHU11/DHQ11 */
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{ { NULL }, 1, 6, 32, 4 }, /* DMZ32 */
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{ { NULL }, 1, 6, 32, 4 }, /* CP132 */
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{ { NULL }, 1, 2, 64, 8, { 0 } }, /* QVSS - fx CSR */
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{ { NULL }, 1, 1, 8, 4 }, /* VS31 */
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{ { NULL }, 1, 1, 0, 4, { 0 } }, /* LNV11 - fx CSR */
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{ { NULL }, 1, 1, 16, 4 }, /* LNV21/QPSS */
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{ { NULL }, 1, 1, 8, 4, { 0 } }, /* QTA - fx CSR */
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{ { NULL }, 1, 1, 8, 4 }, /* DSV11 */
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{ { NULL }, 1, 2, 8, 8 }, /* CSAM */
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{ { NULL }, 1, 2, 8, 8 }, /* ADV11C */
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{ { NULL }, 1, 0, 8, 0 }, /* AAV11C */
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{ { NULL }, 1, 2, 8, 8, { 0 }, { 0 } }, /* AXV11C - fx CSR,vec */
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{ { NULL }, 1, 2, 4, 8, { 0 } }, /* KWV11C - fx CSR */
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{ { NULL }, 1, 2, 8, 8, { 0 } }, /* ADV11D - fx CSR */
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{ { NULL }, 1, 2, 8, 8, { 0 } }, /* AAV11D - fx CSR */
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{ { "QDSS" }, 1, 3, 0, 16, {IOBA_QDSS} }, /* QDSS - fx CSR */
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{ { NULL }, -1 } /* end table */
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};
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t_stat auto_config (char *name, int32 nctrl)
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{
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uint32 csr = IOPAGEBASE + AUTO_CSRBASE;
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uint32 vec = VEC_Q + AUTO_VECBASE;
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AUTO_CON *autp;
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DEVICE *dptr;
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DIB *dibp;
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uint32 j, k, vmask, amask;
|
|
|
|
if (autcon_enb == 0) /* enabled? */
|
|
return SCPE_OK;
|
|
if (name) { /* updating? */
|
|
if (nctrl < 0)
|
|
return SCPE_ARG;
|
|
for (autp = auto_tab; autp->numc >= 0; autp++) {
|
|
for (j = 0; (j < AUTO_MAXC) && autp->dnam[j]; j++) {
|
|
if (strcmp (name, autp->dnam[j]) == 0)
|
|
autp->numc = nctrl;
|
|
}
|
|
}
|
|
}
|
|
for (autp = auto_tab; autp->numc >= 0; autp++) { /* loop thru table */
|
|
if (autp->amod) { /* floating csr? */
|
|
amask = autp->amod - 1;
|
|
csr = (csr + amask) & ~amask; /* align csr */
|
|
}
|
|
for (j = k = 0; (j < AUTO_MAXC) && autp->dnam[j]; j++) {
|
|
if (autp->dnam[j] == NULL) /* no device? */
|
|
continue;
|
|
dptr = find_dev (autp->dnam[j]); /* find ctrl */
|
|
if ((dptr == NULL) || /* enabled, floating? */
|
|
(dptr->flags & DEV_DIS) ||
|
|
!(dptr->flags & DEV_FLTA))
|
|
continue;
|
|
dibp = (DIB *) dptr->ctxt; /* get DIB */
|
|
if (dibp == NULL) /* not there??? */
|
|
return SCPE_IERR;
|
|
if (autp->amod) { /* dyn csr needed? */
|
|
if (autp->fixa[k]) /* fixed csr avail? */
|
|
dibp->ba = autp->fixa[k]; /* use it */
|
|
else { /* no fixed left */
|
|
dibp->ba = csr; /* set CSR */
|
|
csr += (autp->numc * autp->amod); /* next CSR */
|
|
} /* end else */
|
|
} /* end if dyn csr */
|
|
if (autp->numv && autp->vmod) { /* dyn vec needed? */
|
|
uint32 numv = abs (autp->numv); /* get num vec */
|
|
if (autp->fixv[k]) { /* fixed vec avail? */
|
|
if (autp->numv > 0)
|
|
dibp->vec = autp->fixv[k]; /* use it */
|
|
}
|
|
else { /* no fixed left */
|
|
vmask = autp->vmod - 1;
|
|
vec = (vec + vmask) & ~vmask; /* align vector */
|
|
if (autp->numv > 0)
|
|
dibp->vec = vec; /* set vector */
|
|
vec += (autp->numc * numv * 4);
|
|
} /* end else */
|
|
} /* end if dyn vec */
|
|
k++; /* next instance */
|
|
} /* end for j */
|
|
if (autp->amod) /* flt CSR? gap */
|
|
csr = csr + 2;
|
|
} /* end for i */
|
|
return SCPE_OK;
|
|
}
|
|
|
|
/* Factory bad block table creation routine
|
|
|
|
This routine writes a DEC standard 044 compliant bad block table on the
|
|
last track of the specified unit. The bad block table consists of 10
|
|
repetitions of the same table, formatted as follows:
|
|
|
|
words 0-1 pack id number
|
|
words 2-3 cylinder/sector/surface specifications
|
|
:
|
|
words n-n+1 end of table (-1,-1)
|
|
|
|
Inputs:
|
|
uptr = pointer to unit
|
|
sec = number of sectors per surface
|
|
wds = number of words per sector
|
|
Outputs:
|
|
sta = status code
|
|
*/
|
|
|
|
t_stat pdp11_bad_block (UNIT *uptr, int32 sec, int32 wds)
|
|
{
|
|
int32 i;
|
|
t_addr da;
|
|
uint16 *buf;
|
|
|
|
if ((sec < 2) || (wds < 16))
|
|
return SCPE_ARG;
|
|
if ((uptr->flags & UNIT_ATT) == 0)
|
|
return SCPE_UNATT;
|
|
if (uptr->flags & UNIT_RO)
|
|
return SCPE_RO;
|
|
if (!get_yn ("Overwrite last track? [N]", FALSE))
|
|
return SCPE_OK;
|
|
da = (uptr->capac - (sec * wds)) * sizeof (uint16);
|
|
if (sim_fseek (uptr->fileref, da, SEEK_SET))
|
|
return SCPE_IOERR;
|
|
if ((buf = (uint16 *) malloc (wds * sizeof (uint16))) == NULL)
|
|
return SCPE_MEM;
|
|
buf[0] = buf[1] = 012345u;
|
|
buf[2] = buf[3] = 0;
|
|
for (i = 4; i < wds; i++)
|
|
buf[i] = 0177777u;
|
|
for (i = 0; (i < sec) && (i < 10); i++)
|
|
sim_fwrite (buf, sizeof (uint16), wds, uptr->fileref);
|
|
free (buf);
|
|
if (ferror (uptr->fileref))
|
|
return SCPE_IOERR;
|
|
return SCPE_OK;
|
|
}
|