- This change introduces a full refactor of the interrupt subsystem for the system board (SBD) and the I/O bus (CIO). Interrupt decode should now be significantly faster, and not require an expensive calculation on every step. - The TIMER device has been split into Rev 2 and Rev 3 implementations. - The optional 3B2/400 Debug Monitor ROMs can now be booted by passing the "DEMON" argument to the 3B2/400 simulator BOOT command. Any of the following will cause the Debug Monitor ROM to be booted instead of the standard 3B2/400 ROM: sim> BOOT DEMON sim> BOOT CPU DEMON sim> BOOT DEMON CPU
82 lines
3.3 KiB
C
82 lines
3.3 KiB
C
/* 3b2_stddev.h: AT&T 3B2 miscellaneous system board devices.
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Copyright (c) 2017, Seth J. Morabito
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Permission is hereby granted, free of charge, to any person
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obtaining a copy of this software and associated documentation
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files (the "Software"), to deal in the Software without
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restriction, including without limitation the rights to use, copy,
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modify, merge, publish, distribute, sublicense, and/or sell copies
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of the Software, and to permit persons to whom the Software is
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furnished to do so, subject to the following conditions:
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The above copyright notice and this permission notice shall be
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included in all copies or substantial portions of the Software.
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THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
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ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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SOFTWARE.
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Except as contained in this notice, the name of the author shall
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not be used in advertising or otherwise to promote the sale, use or
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other dealings in this Software without prior written authorization
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from the author.
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*/
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#ifndef _3B2_STDDEV_H_
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#define _3B2_STDDEV_H_
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#include "3b2_defs.h"
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/* NVRAM */
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t_stat nvram_ex(t_value *vptr, t_addr exta, UNIT *uptr, int32 sw);
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t_stat nvram_dep(t_value val, t_addr exta, UNIT *uptr, int32 sw);
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t_stat nvram_reset(DEVICE *dptr);
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uint32 nvram_read(uint32 pa, size_t size);
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t_stat nvram_attach(UNIT *uptr, CONST char *cptr);
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t_stat nvram_detach(UNIT *uptr);
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const char *nvram_description(DEVICE *dptr);
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t_stat nvram_help(FILE *st, DEVICE *dptr, UNIT *uptr, int32 flag, const char *cptr);
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void nvram_write(uint32 pa, uint32 val, size_t size);
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/* TOD */
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typedef struct tod_data {
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int32 delta; /* Delta between simulated time and real time (sec.) */
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uint8 tsec; /* 1/10 seconds */
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uint8 unit_sec; /* 1's column seconds */
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uint8 ten_sec; /* 10's column seconds */
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uint8 unit_min; /* 1's column minutes */
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uint8 ten_min; /* 10's column minutes */
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uint8 unit_hour; /* 1's column hours */
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uint8 ten_hour; /* 10's column hours */
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uint8 unit_day; /* 1's column day of month */
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uint8 ten_day; /* 10's column day of month */
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uint8 wday; /* Day of week (0-6) */
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uint8 unit_mon; /* 1's column month */
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uint8 ten_mon; /* 10's column month */
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uint8 year; /* 1, 2, 4, 8 shift register */
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uint8 pad[3]; /* Padding to 32 bytes */
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} TOD_DATA;
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void tod_resync();
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void tod_update_delta();
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t_stat tod_reset(DEVICE *dptr);
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t_stat tod_attach(UNIT *uptr, CONST char *cptr);
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t_stat tod_detach(UNIT *uptr);
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const char *tod_description(DEVICE *dptr);
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t_stat tod_help(FILE *st, DEVICE *dptr, UNIT *uptr, int32 flag, const char *cptr);
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uint32 tod_read(uint32 pa, size_t size);
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void tod_write(uint32, uint32 val, size_t size);
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#if defined(REV3)
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/* Fault Register */
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uint32 flt_read(uint32 pa, size_t size);
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void flt_write(uint32 pa, uint32 val, size_t size);
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#endif
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#endif /* _3B2_STDDEV_H_ */
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