110 lines
3.8 KiB
C
110 lines
3.8 KiB
C
/* nova_clk.c: NOVA real-time clock simulator
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Copyright (c) 1993-1999, Robert M. Supnik
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Permission is hereby granted, free of charge, to any person obtaining a
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copy of this software and associated documentation files (the "Software"),
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to deal in the Software without restriction, including without limitation
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the rights to use, copy, modify, merge, publish, distribute, sublicense,
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and/or sell copies of the Software, and to permit persons to whom the
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Software is furnished to do so, subject to the following conditions:
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The above copyright notice and this permission notice shall be included in
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all copies or substantial portions of the Software.
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THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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ROBERT M SUPNIK BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
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IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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Except as contained in this notice, the name of Robert M Supnik shall not
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be used in advertising or otherwise to promote the sale, use or other dealings
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in this Software without prior written authorization from Robert M Supnik.
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24-Sep-97 RMS Fixed bug in unit service (found by Dutch Owen)
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clk real-time clock
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*/
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#include "nova_defs.h"
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extern int32 int_req, dev_busy, dev_done, dev_disable;
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int32 clk_sel = 0; /* selected freq */
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int32 clk_alt_time[4] = { 16000, 100000, 10000, 1000 }; /* freq table */
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t_stat clk_svc (UNIT *uptr);
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t_stat clk_reset (DEVICE *dptr);
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extern t_stat sim_activate (UNIT *uptr, int32 delay);
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extern t_stat sim_cancel (UNIT *uptr);
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/* CLK data structures
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clk_dev CLK device descriptor
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clk_unit CLK unit descriptor
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clk_reg CLK register list
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*/
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UNIT clk_unit = { UDATA (&clk_svc, 0, 0), 16000 };
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REG clk_reg[] = {
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{ ORDATA (SELECT, clk_sel, 2) },
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{ FLDATA (BUSY, dev_busy, INT_V_CLK) },
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{ FLDATA (DONE, dev_done, INT_V_CLK) },
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{ FLDATA (DISABLE, dev_disable, INT_V_CLK) },
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{ FLDATA (INT, int_req, INT_V_CLK) },
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{ DRDATA (TIME0, clk_alt_time[0], 24), REG_NZ + PV_LEFT },
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{ DRDATA (TIME1, clk_alt_time[1], 24), REG_NZ + PV_LEFT },
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{ DRDATA (TIME2, clk_alt_time[2], 24), REG_NZ + PV_LEFT },
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{ DRDATA (TIME3, clk_alt_time[3], 24), REG_NZ + PV_LEFT },
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{ NULL } };
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DEVICE clk_dev = {
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"CLK", &clk_unit, clk_reg, NULL,
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1, 0, 0, 0, 0, 0,
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NULL, NULL, &clk_reset,
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NULL, NULL, NULL };
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/* IOT routine */
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int32 clk (int32 pulse, int32 code, int32 AC)
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{
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if (code == ioDOA) clk_sel = AC & 3;
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switch (pulse) { /* decode IR<8:9> */
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case iopS: /* start */
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dev_busy = dev_busy | INT_CLK; /* set busy */
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dev_done = dev_done & ~INT_CLK; /* clear done, int */
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int_req = int_req & ~INT_CLK;
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sim_activate (&clk_unit, clk_alt_time[clk_sel]); /* activate unit */
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break;
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case iopC: /* clear */
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dev_busy = dev_busy & ~INT_CLK; /* clear busy */
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dev_done = dev_done & ~INT_CLK; /* clear done, int */
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int_req = int_req & ~INT_CLK;
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sim_cancel (&clk_unit); /* deactivate unit */
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break; } /* end switch */
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return 0;
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}
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/* Unit service */
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t_stat clk_svc (UNIT *uptr)
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{
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dev_done = dev_done | INT_CLK; /* set done */
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dev_busy = dev_busy & ~INT_CLK; /* clear busy */
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int_req = (int_req & ~INT_DEV) | (dev_done & ~dev_disable);
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sim_activate (&clk_unit, clk_alt_time[clk_sel]); /* reactivate unit */
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return SCPE_OK;
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}
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/* Reset routine */
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t_stat clk_reset (DEVICE *dptr)
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{
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clk_sel = 0;
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dev_busy = dev_busy & ~INT_CLK; /* clear busy */
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dev_done = dev_done & ~INT_CLK; /* clear done, int */
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int_req = int_req & ~INT_CLK;
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sim_cancel (&clk_unit); /* deactivate unit */
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return SCPE_OK;
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}
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