f1fb14d350
Adds the following devices to AltairZ80: TUART0: Cromemco FDC controller TUART console port at I/O address 0x00. TUART1: Cromemco TU-ART port A at I/O address 0x20. TUART2: Cromemco TU-ART port B at I/I address 0x50. These devices are fully TMXR capable.
737 lines
24 KiB
C
737 lines
24 KiB
C
/* s100_tuart.c: Cromemco TU-ART
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Copyright (c) 2024, Patrick Linstruth
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Permission is hereby granted, free of charge, to any person obtaining a
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copy of this software and associated documentation files (the "Software"),
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to deal in the Software without restriction, including without limitation
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the rights to use, copy, modify, merge, publish, distribute, sublicense,
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and/or sell copies of the Software, and to permit persons to whom the
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Software is furnished to do so, subject to the following conditions:
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The above copyright notice and this permission notice shall be included in
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all copies or substantial portions of the Software.
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THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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ROBERT M SUPNIK BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
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IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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Except as contained in this notice, the name of Charles E. Owen shall not be
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used in advertising or otherwise to promote the sale, use or other dealings
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in this Software without prior written authorization from Charles E. Owen.
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*/
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#include "altairz80_defs.h"
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#include "sim_tmxr.h"
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#define TUART_NAME "CROMEMCO TU-ART"
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#define TUART0_SNAME "TUART0"
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#define TUART1_SNAME "TUART1"
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#define TUART2_SNAME "TUART2"
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#define TUART_WAIT 1000 /* Service Wait Interval */
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#define TUART0_IOBASE 0x00
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#define TUART0_IOSIZE 4
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#define TUART1_IOBASE 0x20
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#define TUART1_IOSIZE 4
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#define TUART2_IOBASE 0x50
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#define TUART2_IOSIZE 4
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/* Status Register */
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#define TUART_FME 0x01 /* Framing Error */
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#define TUART_ORE 0x02 /* Overrun */
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#define TUART_IPG 0x20 /* Interrupt Pending */
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#define TUART_RDA 0x40 /* Receive Data Available */
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#define TUART_TBE 0x80 /* Transmit Buffer Empty */
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/* Command Register */
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#define TUART_RESET 0x01 /* Reset */
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#define TUART_INTA 0x08 /* Interrupt Enable */
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#define TUART_HBD 0x10 /* High baud rate */
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#define TUART_110 0x01
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#define TUART_150 0x02
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#define TUART_300 0x04
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#define TUART_1200 0x08
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#define TUART_2400 0x10
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#define TUART_4800 0x20
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#define TUART_9600 0x40
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#define TUART_1STOP 0x80
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#define TUART_BAUD(xptr) ((xptr->baud * xptr->hbd > 76800) ? 76800 : xptr->baud * xptr->hbd)
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#define TUART_RDAIE 0x10
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#define TUART_TBEIE 0x20
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#define TUART_RDAIA 0xe7
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#define TUART_TBSIA 0xef
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/* Debug flags */
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#define STATUS_MSG (1 << 0)
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#define IRQ_MSG (1 << 1)
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#define ERROR_MSG (1 << 2)
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#define VERBOSE_MSG (1 << 3)
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/* IO Read/Write */
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#define IO_RD 0x00 /* IO Read */
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#define IO_WR 0x01 /* IO Write */
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typedef struct {
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PNP_INFO pnp; /* Must be first */
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t_bool conn; /* Connected Status */
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TMLN *tmln; /* TMLN pointer */
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TMXR *tmxr; /* TMXR pointer */
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int32 baud; /* Baud rate */
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uint8 hbd; /* High baud mult */
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uint8 sbits; /* Stop bits */
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uint8 rxb; /* Receive Buffer */
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uint8 txb; /* Transmit Buffer */
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t_bool txp; /* Transmit Pending */
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uint8 stb; /* Status Buffer */
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t_bool inta; /* Interrupt Ack Ena */
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uint8 intmask; /* Int Enable Mask */
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uint8 intadr; /* Interrupt Address */
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uint8 intvector; /* Interrupt Vector */
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} TUART_CTX;
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extern t_stat set_iobase(UNIT *uptr, int32 val, CONST char *cptr, void *desc);
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extern t_stat show_iobase(FILE *st, UNIT *uptr, int32 val, CONST void *desc);
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extern uint32 sim_map_resource(uint32 baseaddr, uint32 size, uint32 resource_type,
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int32 (*routine)(const int32, const int32, const int32), const char* name, uint8 unmap);
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static const char* tuart_description(DEVICE *dptr);
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static t_stat tuart_svc(UNIT *uptr);
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static t_stat tuart_reset(DEVICE *dptr, int32 (*routine)(const int32, const int32, const int32));
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static t_stat tuart0_reset(DEVICE *dptr);
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static t_stat tuart1_reset(DEVICE *dptr);
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static t_stat tuart2_reset(DEVICE *dptr);
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static t_stat tuart_attach(UNIT *uptr, CONST char *cptr);
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static t_stat tuart_detach(UNIT *uptr);
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static t_stat tuart_set_baud(UNIT *uptr, int32 value, const char *cptr, void *desc);
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static t_stat tuart_show_baud(FILE *st, UNIT *uptr, int32 value, const void *desc);
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static t_stat tuart_config_line(UNIT *uptr);
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static int32 tuart0_io(int32 addr, int32 io, int32 data);
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static int32 tuart1_io(int32 addr, int32 io, int32 data);
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static int32 tuart2_io(int32 addr, int32 io, int32 data);
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static int32 tuart_io(DEVICE *dptr, int32 addr, int32 io, int32 data);
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static int32 tuart_stat(DEVICE *dptr, int32 io, int32 data);
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static int32 tuart_data(DEVICE *dptr, int32 io, int32 data);
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static int32 tuart_command(DEVICE *dptr, int32 io, int32 data);
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static int32 tuart_intadrmsk(DEVICE *dptr, int32 io, int32 data);
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static void tuart_int(UNIT *uptr);
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extern uint32 vectorInterrupt; /* Vector Interrupt bits */
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extern uint8 dataBus[MAX_INT_VECTORS]; /* Data bus value */
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/* Debug Flags */
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static DEBTAB tuart_dt[] = {
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{ "STATUS", STATUS_MSG, "Status messages" },
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{ "IRQ", IRQ_MSG, "Interrupt messages" },
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{ "ERROR", ERROR_MSG, "Error messages" },
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{ "VERBOSE", VERBOSE_MSG, "Verbose messages" },
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{ NULL, 0 }
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};
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/* Terminal multiplexer library descriptors */
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static TMLN tuart0_tmln[] = { /* line descriptors */
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{ 0 }
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};
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static TMLN tuart1_tmln[] = { /* line descriptors */
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{ 0 }
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};
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static TMLN tuart2_tmln[] = { /* line descriptors */
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{ 0 }
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};
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static TMXR tuart0_tmxr = { /* multiplexer descriptor */
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1, /* number of terminal lines */
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0, /* listening port (reserved) */
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0, /* master socket (reserved) */
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tuart0_tmln, /* line descriptor array */
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NULL, /* line connection order */
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NULL /* multiplexer device (derived internally) */
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};
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static TMXR tuart1_tmxr = { /* multiplexer descriptor */
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1, /* number of terminal lines */
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0, /* listening port (reserved) */
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0, /* master socket (reserved) */
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tuart1_tmln, /* line descriptor array */
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NULL, /* line connection order */
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NULL /* multiplexer device (derived internally) */
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};
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static TMXR tuart2_tmxr = { /* multiplexer descriptor */
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1, /* number of terminal lines */
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0, /* listening port (reserved) */
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0, /* master socket (reserved) */
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tuart2_tmln, /* line descriptor array */
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NULL, /* line connection order */
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NULL /* multiplexer device (derived internally) */
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};
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#define UNIT_V_TUART_CONSOLE (UNIT_V_UF + 0) /* Port checks console for input */
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#define UNIT_TUART_CONSOLE (1 << UNIT_V_TUART_CONSOLE)
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#define UNIT_V_TUART_EVEN (UNIT_V_UF + 1) /* Mode 2 interrupts even mode */
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#define UNIT_TUART_EVEN (1 << UNIT_V_TUART_EVEN)
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static MTAB tuart_mod[] = {
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{ MTAB_XTD|MTAB_VDV|MTAB_VALR, 0, "IOBASE", "IOBASE",
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&set_iobase, &show_iobase, NULL, "Sets TU-ART base I/O address" },
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{ UNIT_TUART_CONSOLE, UNIT_TUART_CONSOLE, "CONSOLE", "CONSOLE", NULL, NULL, NULL,
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"Port checks for console input" },
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{ UNIT_TUART_CONSOLE, 0, "NOCONSOLE", "NOCONSOLE", NULL, NULL, NULL,
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"Port does not check for console input" },
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{ UNIT_TUART_EVEN, UNIT_TUART_EVEN, "EVEN", "EVEN", NULL, NULL, NULL,
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"Mode 2 interrupt even mode" },
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{ UNIT_TUART_EVEN, 0, "ODD", "ODD", NULL, NULL, NULL,
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"Mode 2 interrupt odd mode" },
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{ MTAB_XTD|MTAB_VDV|MTAB_VALR, 0, "BAUD", "BAUD", &tuart_set_baud, &tuart_show_baud,
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NULL, "Set baud rate (default=9600)" },
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{ 0 }
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};
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static TUART_CTX tuart0_ctx = {{0, 0, TUART0_IOBASE, TUART0_IOSIZE}, 0, tuart0_tmln, &tuart0_tmxr};
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static TUART_CTX tuart1_ctx = {{0, 0, TUART1_IOBASE, TUART1_IOSIZE}, 0, tuart1_tmln, &tuart1_tmxr};
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static TUART_CTX tuart2_ctx = {{0, 0, TUART2_IOBASE, TUART2_IOSIZE}, 0, tuart2_tmln, &tuart2_tmxr};
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static UNIT tuart0_unit[] = {
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{ UDATA (&tuart_svc, UNIT_ATTABLE | UNIT_DISABLE | UNIT_TUART_CONSOLE, 0), TUART_WAIT },
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};
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static UNIT tuart1_unit[] = {
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{ UDATA (&tuart_svc, UNIT_ATTABLE | UNIT_DISABLE, 0), TUART_WAIT },
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};
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static UNIT tuart2_unit[] = {
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{ UDATA (&tuart_svc, UNIT_ATTABLE | UNIT_DISABLE, 0), TUART_WAIT },
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};
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static REG tuart0_reg[] = {
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{ HRDATAD (TXP0, tuart0_ctx.txp, 1, "TU-ART port 0 transmit pending"), },
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{ HRDATAD (STB0, tuart0_ctx.stb, 8, "TU-ART port 0 status buffer"), },
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{ HRDATAD (INTMASK0, tuart0_ctx.intmask, 8, "TU-ART port 0 interrupt mask"), },
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{ DRDATAD (INTVEC0, tuart0_ctx.intvector, 8, "TU-ART port 0 interrupt vector"), },
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{ HRDATAD (INTADR0, tuart0_ctx.intadr, 8, "TU-ART port 0 interrupt address"), },
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{ NULL }
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};
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static REG tuart1_reg[] = {
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{ HRDATAD (TXP1, tuart1_ctx.txp, 1, "TU-ART port 1/A transmit pending"), },
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{ HRDATAD (STB1, tuart1_ctx.stb, 8, "TU-ART port 1/A status buffer"), },
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{ HRDATAD (INTMASK1, tuart1_ctx.intmask, 8, "TU-ART port 1/A interrupt mask"), },
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{ DRDATAD (INTVEC1, tuart1_ctx.intvector, 8, "TU-ART port 1/A interrupt vector"), },
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{ HRDATAD (INTADR1, tuart1_ctx.intadr, 8, "TU-ART port 1/A interrupt address"), },
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{ NULL }
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};
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static REG tuart2_reg[] = {
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{ HRDATAD (TXP2, tuart2_ctx.txp, 1, "TU-ART port 2/B transmit pending"), },
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{ HRDATAD (STB2, tuart2_ctx.stb, 8, "TU-ART port 2/B status buffer"), },
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{ HRDATAD (INTMASK2, tuart2_ctx.intmask, 8, "TU-ART port 2/B interrupt mask"), },
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{ DRDATAD (INTVEC2, tuart2_ctx.intvector, 8, "TU-ART port 2/B interrupt vector"), },
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{ HRDATAD (INTADR2, tuart2_ctx.intadr, 8, "TU-ART port 2/B interrupt address"), },
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{ NULL }
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};
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DEVICE tuart0_dev = {
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TUART0_SNAME, /* name */
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tuart0_unit, /* unit */
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tuart0_reg, /* registers */
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tuart_mod, /* modifiers */
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1, /* # units */
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10, /* address radix */
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31, /* address width */
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1, /* address increment */
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8, /* data radix */
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8, /* data width */
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NULL, /* examine routine */
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NULL, /* deposit routine */
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&tuart0_reset, /* reset routine */
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NULL, /* boot routine */
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&tuart_attach, /* attach routine */
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&tuart_detach, /* detach routine */
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&tuart0_ctx, /* context */
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(DEV_DISABLE | DEV_DIS | DEV_DEBUG | DEV_MUX), /* flags */
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0, /* debug control */
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tuart_dt, /* debug flags */
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NULL, /* mem size routine */
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NULL, /* logical name */
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NULL, /* help */
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NULL, /* attach help */
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NULL, /* context for help */
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&tuart_description /* description */
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};
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DEVICE tuart1_dev = {
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TUART1_SNAME, /* name */
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tuart1_unit, /* unit */
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tuart1_reg, /* registers */
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tuart_mod, /* modifiers */
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1, /* # units */
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10, /* address radix */
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31, /* address width */
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1, /* address increment */
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8, /* data radix */
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8, /* data width */
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NULL, /* examine routine */
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NULL, /* deposit routine */
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&tuart1_reset, /* reset routine */
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NULL, /* boot routine */
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&tuart_attach, /* attach routine */
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&tuart_detach, /* detach routine */
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&tuart1_ctx, /* context */
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(DEV_DISABLE | DEV_DIS | DEV_DEBUG | DEV_MUX), /* flags */
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0, /* debug control */
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tuart_dt, /* debug flags */
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NULL, /* mem size routine */
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NULL, /* logical name */
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NULL, /* help */
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NULL, /* attach help */
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NULL, /* context for help */
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&tuart_description /* description */
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};
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DEVICE tuart2_dev = {
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TUART2_SNAME, /* name */
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tuart2_unit, /* unit */
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tuart2_reg, /* registers */
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tuart_mod, /* modifiers */
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1, /* # units */
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10, /* address radix */
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31, /* address width */
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1, /* address increment */
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8, /* data radix */
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8, /* data width */
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NULL, /* examine routine */
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NULL, /* deposit routine */
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&tuart2_reset, /* reset routine */
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NULL, /* boot routine */
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&tuart_attach, /* attach routine */
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&tuart_detach, /* detach routine */
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&tuart2_ctx, /* context */
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(DEV_DISABLE | DEV_DIS | DEV_DEBUG | DEV_MUX), /* flags */
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0, /* debug control */
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tuart_dt, /* debug flags */
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NULL, /* mem size routine */
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NULL, /* logical name */
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NULL, /* help */
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NULL, /* attach help */
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NULL, /* context for help */
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&tuart_description /* description */
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};
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static const char* tuart_description(DEVICE *dptr)
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{
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return TUART_NAME;
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}
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static t_stat tuart0_reset(DEVICE *dptr)
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{
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return(tuart_reset(dptr, &tuart0_io));
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}
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static t_stat tuart1_reset(DEVICE *dptr)
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{
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return(tuart_reset(dptr, &tuart1_io));
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}
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static t_stat tuart2_reset(DEVICE *dptr)
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{
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return(tuart_reset(dptr, &tuart2_io));
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}
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static t_stat tuart_reset(DEVICE *dptr, int32 (*routine)(const int32, const int32, const int32))
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{
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TUART_CTX *xptr;
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xptr = (TUART_CTX *) dptr->ctxt;
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/* Connect/Disconnect I/O Ports at base address */
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if (sim_map_resource(xptr->pnp.io_base, xptr->pnp.io_size, RESOURCE_TYPE_IO, routine, dptr->name, dptr->flags & DEV_DIS) != 0) {
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sim_debug(ERROR_MSG, dptr, "error mapping I/O resource at 0x%02x.\n", xptr->pnp.io_base);
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return SCPE_ARG;
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}
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/* Set DEVICE for this UNIT */
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dptr->units[0].dptr = dptr;
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/* Reset registers */
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xptr->stb = TUART_TBE;
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xptr->txp = FALSE;
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xptr->hbd = 1;
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xptr->baud = 9600;
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xptr->sbits = 1;
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tuart_config_line(&dptr->units[0]);
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if (!(dptr->flags & DEV_DIS)) {
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sim_activate_abs(&dptr->units[0], dptr->units[0].wait);
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} else {
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sim_cancel(&dptr->units[0]);
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}
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sim_debug(STATUS_MSG, dptr, "reset adapter.\n");
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return SCPE_OK;
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}
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static t_stat tuart_svc(UNIT *uptr)
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{
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TUART_CTX *xptr;
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int32 c;
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t_stat r;
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t_bool dr = TRUE;
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xptr = (TUART_CTX *) uptr->dptr->ctxt;
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/* Check for new incoming connection */
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if (uptr->flags & UNIT_ATT) {
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if (tmxr_poll_conn(xptr->tmxr) >= 0) { /* poll connection */
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xptr->conn = TRUE; /* set connected */
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xptr->tmln->rcve = 1;
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sim_debug(STATUS_MSG, uptr->dptr, "new connection.\n");
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}
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}
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/* TX data */
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if (xptr->txp) {
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if (uptr->flags & UNIT_ATT) {
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r = tmxr_putc_ln(xptr->tmln, xptr->txb);
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xptr->txp = FALSE; /* Reset TX Pending */
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if (r == SCPE_LOST) {
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xptr->conn = FALSE; /* Connection was lost */
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sim_debug(STATUS_MSG, uptr->dptr, "lost connection.\n");
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}
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} else {
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r = sim_putchar(xptr->txb);
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xptr->txp = FALSE; /* Reset TX Pending */
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xptr->stb |= TUART_TBE; /* Xmit buffer empty */
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dr = FALSE; /* Skip read */
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}
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/* If TX buffer now empty, send interrupt */
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if ((!xptr->txp) && (xptr->intmask & TUART_TBEIE)) {
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xptr->intadr = TUART_TBSIA;
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tuart_int(uptr);
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}
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}
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/* Update TBE if not set and no character pending */
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if (!xptr->txp && !(xptr->stb & TUART_TBE) && uptr->flags & UNIT_ATT) {
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tmxr_poll_tx(xptr->tmxr);
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xptr->stb |= (tmxr_txdone_ln(xptr->tmln) && xptr->conn) ? TUART_TBE : 0;
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}
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/* Check for Data if RX buffer empty */
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if (dr && !(xptr->stb & TUART_RDA)) {
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if (uptr->flags & UNIT_ATT) {
|
|
tmxr_poll_rx(xptr->tmxr);
|
|
|
|
c = tmxr_getc_ln(xptr->tmln);
|
|
} else if (uptr->flags & UNIT_TUART_CONSOLE) {
|
|
c = sim_poll_kbd();
|
|
} else {
|
|
c = 0;
|
|
}
|
|
|
|
if (c & (TMXR_VALID | SCPE_KFLAG)) {
|
|
xptr->rxb = c & 0xff;
|
|
xptr->stb |= TUART_RDA;
|
|
xptr->stb &= ~(TUART_FME | TUART_ORE);
|
|
|
|
if (xptr->intmask & TUART_RDAIE) {
|
|
xptr->intadr = TUART_RDAIA;
|
|
tuart_int(uptr);
|
|
}
|
|
}
|
|
}
|
|
|
|
sim_activate_abs(uptr, uptr->wait);
|
|
|
|
return SCPE_OK;
|
|
}
|
|
|
|
/* Attach routine */
|
|
static t_stat tuart_attach(UNIT *uptr, CONST char *cptr)
|
|
{
|
|
TUART_CTX *xptr;
|
|
t_stat r = SCPE_OK;
|
|
|
|
xptr = (TUART_CTX *) uptr->dptr->ctxt;
|
|
|
|
sim_debug(VERBOSE_MSG, uptr->dptr, "attach (%s).\n", cptr);
|
|
|
|
if ((r = tmxr_attach(xptr->tmxr, uptr, cptr)) == SCPE_OK) {
|
|
xptr->tmln->rcve = 1;
|
|
|
|
r = tuart_config_line(uptr);
|
|
}
|
|
|
|
return r;
|
|
}
|
|
|
|
|
|
/* Detach routine */
|
|
static t_stat tuart_detach(UNIT *uptr)
|
|
{
|
|
TUART_CTX *xptr;
|
|
|
|
if (uptr->dptr == NULL) {
|
|
return SCPE_IERR;
|
|
}
|
|
|
|
sim_debug(VERBOSE_MSG, uptr->dptr, "detach.\n");
|
|
|
|
if (uptr->flags & UNIT_ATT) {
|
|
xptr = (TUART_CTX *) uptr->dptr->ctxt;
|
|
|
|
sim_cancel(uptr);
|
|
|
|
return (tmxr_detach(xptr->tmxr, uptr));
|
|
}
|
|
|
|
return SCPE_UNATT;
|
|
}
|
|
|
|
static t_stat tuart_set_baud(UNIT *uptr, int32 value, const char *cptr, void *desc)
|
|
{
|
|
TUART_CTX *xptr;
|
|
int32 baud;
|
|
t_stat r = SCPE_ARG;
|
|
|
|
xptr = (TUART_CTX *) uptr->dptr->ctxt;
|
|
|
|
if (cptr != NULL) {
|
|
if (sscanf(cptr, "%d", &baud)) {
|
|
switch (baud) {
|
|
case 110:
|
|
case 150:
|
|
case 300:
|
|
case 1200:
|
|
case 2400:
|
|
case 4800:
|
|
case 9600:
|
|
xptr->baud = baud;
|
|
xptr->hbd = 1;
|
|
r = tuart_config_line(uptr);
|
|
return r;
|
|
|
|
case 19200:
|
|
case 38400:
|
|
case 76800:
|
|
xptr->baud = baud / 8;
|
|
xptr->hbd = 8;
|
|
r = tuart_config_line(uptr);
|
|
return r;
|
|
|
|
default:
|
|
sim_printf("invalid baud rate\n");
|
|
break;
|
|
}
|
|
}
|
|
}
|
|
|
|
return r;
|
|
}
|
|
|
|
static t_stat tuart_show_baud(FILE *st, UNIT *uptr, int32 value, const void *desc)
|
|
{
|
|
TUART_CTX *xptr;
|
|
|
|
xptr = (TUART_CTX *) uptr->dptr->ctxt;
|
|
|
|
fprintf(st, "%d (wait=%d)", TUART_BAUD(xptr), uptr->wait);
|
|
|
|
return SCPE_OK;
|
|
}
|
|
|
|
static t_stat tuart_config_line(UNIT *uptr)
|
|
{
|
|
TUART_CTX *xptr;
|
|
char config[20];
|
|
t_stat r = SCPE_OK;
|
|
|
|
xptr = (TUART_CTX *) uptr->dptr->ctxt;
|
|
|
|
if (xptr != NULL) {
|
|
sprintf(config, "%d-8N%d", TUART_BAUD(xptr), xptr->sbits);
|
|
|
|
if ((uptr->flags & UNIT_ATT) && (xptr->tmln->serport)) {
|
|
r = tmxr_set_config_line(xptr->tmln, config);
|
|
}
|
|
|
|
sim_debug(STATUS_MSG, uptr->dptr, "Port configuration set to '%s'.\n", config);
|
|
}
|
|
|
|
return r;
|
|
}
|
|
|
|
static int32 tuart0_io(int32 addr, int32 io, int32 data)
|
|
{
|
|
return(tuart_io(&tuart0_dev, addr, io, data));
|
|
}
|
|
|
|
static int32 tuart1_io(int32 addr, int32 io, int32 data)
|
|
{
|
|
return(tuart_io(&tuart1_dev, addr, io, data));
|
|
}
|
|
|
|
static int32 tuart2_io(int32 addr, int32 io, int32 data)
|
|
{
|
|
return(tuart_io(&tuart2_dev, addr, io, data));
|
|
}
|
|
|
|
static int32 tuart_io(DEVICE *dptr, int32 addr, int32 io, int32 data)
|
|
{
|
|
int32 r;
|
|
|
|
if ((addr & 0x03) == 0x03) {
|
|
r = tuart_intadrmsk(dptr, io, data);
|
|
}
|
|
else if (addr & 0x02) {
|
|
r = tuart_command(dptr, io, data);
|
|
}
|
|
else if (addr & 0x01) {
|
|
r = tuart_data(dptr, io, data);
|
|
} else {
|
|
r = tuart_stat(dptr, io, data);
|
|
}
|
|
|
|
return(r);
|
|
}
|
|
|
|
static int32 tuart_stat(DEVICE *dptr, int32 io, int32 data)
|
|
{
|
|
TUART_CTX *xptr;
|
|
int32 r = 0xff;
|
|
|
|
xptr = (TUART_CTX *) dptr->ctxt;
|
|
|
|
if (io == IO_RD) {
|
|
r = xptr->stb;
|
|
} else {
|
|
xptr->sbits = (data & TUART_1STOP) ? 1 : 2;
|
|
|
|
switch (data & ~TUART_1STOP) {
|
|
case TUART_110:
|
|
xptr->baud = 110;
|
|
break;
|
|
|
|
case TUART_150:
|
|
xptr->baud = 150;
|
|
break;
|
|
|
|
case TUART_300:
|
|
xptr->baud = 300;
|
|
break;
|
|
|
|
case TUART_1200:
|
|
xptr->baud = 1200;
|
|
break;
|
|
|
|
case TUART_2400:
|
|
xptr->baud = 2400;
|
|
break;
|
|
|
|
case TUART_4800:
|
|
xptr->baud = 4800;
|
|
break;
|
|
|
|
case TUART_9600:
|
|
default:
|
|
xptr->baud = 9600;
|
|
break;
|
|
}
|
|
sim_debug(STATUS_MSG, dptr, "Status Port Write %02X (sbits=%d baud=%d)\n", data, xptr->sbits, xptr->baud);
|
|
tuart_config_line(&dptr->units[0]);
|
|
}
|
|
|
|
return r;
|
|
}
|
|
|
|
static int32 tuart_data(DEVICE *dptr, int32 io, int32 data)
|
|
{
|
|
TUART_CTX *xptr;
|
|
int32 r = 0xff;
|
|
|
|
xptr = (TUART_CTX *) dptr->ctxt;
|
|
|
|
if (io == IO_RD) {
|
|
r = xptr->rxb;
|
|
xptr->stb &= ~(TUART_RDA | TUART_FME | TUART_ORE | TUART_IPG);
|
|
} else {
|
|
xptr->txb = data;
|
|
xptr->txp = TRUE;
|
|
xptr->stb &= ~(TUART_TBE | TUART_IPG);
|
|
}
|
|
|
|
return r;
|
|
}
|
|
|
|
static int32 tuart_command(DEVICE *dptr, int32 io, int32 data)
|
|
{
|
|
TUART_CTX *xptr;
|
|
int32 r = 0xff;
|
|
|
|
xptr = (TUART_CTX *) dptr->ctxt;
|
|
|
|
if (io == IO_RD) {
|
|
} else {
|
|
if (data & TUART_RESET) {
|
|
xptr->stb &= ~(TUART_ORE);
|
|
sim_debug(STATUS_MSG, dptr, "Reset port\n");
|
|
}
|
|
xptr->inta = (data & TUART_INTA) ? TRUE : FALSE;
|
|
xptr->hbd = (data & TUART_HBD) ? 8 : 1;
|
|
sim_debug(STATUS_MSG, dptr, "Command Port Write %02X (inta=%d hbd=%d)\n", data, xptr->inta, xptr->hbd);
|
|
tuart_config_line(&dptr->units[0]);
|
|
}
|
|
|
|
return r;
|
|
}
|
|
|
|
static int32 tuart_intadrmsk(DEVICE *dptr, int32 io, int32 data)
|
|
{
|
|
TUART_CTX *xptr;
|
|
|
|
xptr = (TUART_CTX *) dptr->ctxt;
|
|
|
|
if (io == IO_RD) {
|
|
return xptr->intadr;
|
|
} else {
|
|
xptr->intmask = data;
|
|
}
|
|
|
|
return 0xff;
|
|
}
|
|
|
|
static void tuart_int(UNIT *uptr)
|
|
{
|
|
TUART_CTX *xptr;
|
|
|
|
xptr = (TUART_CTX *) uptr->dptr->ctxt;
|
|
|
|
if (!xptr->inta) {
|
|
return;
|
|
}
|
|
|
|
vectorInterrupt |= (1 << xptr->intvector);
|
|
dataBus[xptr->intvector] = xptr->intadr;
|
|
if (uptr->flags & UNIT_TUART_EVEN) {
|
|
dataBus[xptr->intvector] &= 0xfe;
|
|
}
|
|
xptr->stb |= TUART_IPG;
|
|
|
|
sim_debug(IRQ_MSG, uptr->dptr, "Vector=%d Data bus=%02X\n", xptr->intvector, dataBus[xptr->intvector]);
|
|
}
|
|
|