c70a1ba3df
Multiplying a negative number by a zero value with a non-zero exponent produced wrong results.
483 lines
13 KiB
C
483 lines
13 KiB
C
/*
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* BESM-6 arithmetic instructions.
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*
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* Copyright (c) 1997-2009, Leonid Broukhis
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* Copyright (c) 2009, Serge Vakulenko
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* SERGE VAKULENKO OR LEONID BROUKHIS BE LIABLE FOR ANY CLAIM, DAMAGES
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* OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE
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* OR OTHER DEALINGS IN THE SOFTWARE.
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* Except as contained in this notice, the name of Leonid Broukhis or
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* Serge Vakulenko shall not be used in advertising or otherwise to promote
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* the sale, use or other dealings in this Software without prior written
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* authorization from Leonid Broukhis and Serge Vakulenko.
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*/
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#include <math.h>
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#include "besm6_defs.h"
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typedef struct {
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t_uint64 mantissa;
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unsigned exponent; /* offset by 64 */
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} alureg_t; /* ALU register type */
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static alureg_t toalu (t_value val)
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{
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alureg_t ret;
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ret.mantissa = val & BITS41;
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ret.exponent = (val >> 41) & BITS(7);
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if (ret.mantissa & BIT41)
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ret.mantissa |= BIT42;
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return ret;
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}
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static int SIM_INLINE is_negative (alureg_t *word)
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{
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return (word->mantissa & BIT41) != 0;
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}
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static void negate (alureg_t *val)
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{
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if (is_negative (val))
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val->mantissa |= BIT42;
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val->mantissa = (~val->mantissa + 1) & BITS42;
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if (((val->mantissa >> 1) ^ val->mantissa) & BIT41) {
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val->mantissa >>= 1;
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++val->exponent;
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}
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if (is_negative (val))
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val->mantissa |= BIT42;
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}
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/*
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* 48-й разряд -> 1, 47-й -> 2 и т.п.
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* Единица 1-го разряда и нулевое слово -> 48,
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* как в первоначальном варианте системы команд.
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*/
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int besm6_highest_bit (t_value val)
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{
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int n = 32, cnt = 0;
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do {
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t_value tmp = val;
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if (tmp >>= n) {
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cnt += n;
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val = tmp;
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}
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} while (n >>= 1);
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return 48 - cnt;
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}
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/*
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* Нормализация и округление.
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* Результат помещается в регистры ACC и 40-1 разряды RMR.
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* 48-41 разряды RMR сохраняются.
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*/
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static void normalize_and_round (alureg_t acc, t_uint64 mr, int rnd_rq)
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{
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t_uint64 rr = 0;
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int i;
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t_uint64 r;
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if (RAU & RAU_NORM_DISABLE)
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goto chk_rnd;
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i = (acc.mantissa >> 39) & 3;
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if (i == 0) {
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r = acc.mantissa & BITS40;
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if (r) {
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int cnt = besm6_highest_bit (r) - 9;
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r <<= cnt;
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rr = mr >> (40 - cnt);
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acc.mantissa = r | rr;
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mr <<= cnt;
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acc.exponent -= cnt;
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goto chk_zero;
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}
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r = mr & BITS40;
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if (r) {
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int cnt = besm6_highest_bit (r) - 9;
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rr = mr;
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r <<= cnt;
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acc.mantissa = r;
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mr = 0;
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acc.exponent -= 40 + cnt;
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goto chk_zero;
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}
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goto zero;
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} else if (i == 3) {
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r = ~acc.mantissa & BITS40;
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if (r) {
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int cnt = besm6_highest_bit (r) - 9;
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r = (r << cnt) | ((1LL << cnt) - 1);
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rr = mr >> (40 - cnt);
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acc.mantissa = BIT41 | (~r & BITS40) | rr;
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mr <<= cnt;
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acc.exponent -= cnt;
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goto chk_zero;
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}
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r = ~mr & BITS40;
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if (r) {
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int cnt = besm6_highest_bit (r) - 9;
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rr = mr;
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r = (r << cnt) | ((1LL << cnt) - 1);
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acc.mantissa = BIT41 | (~r & BITS40);
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mr = 0;
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acc.exponent -= 40 + cnt;
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goto chk_zero;
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} else {
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rr = 1;
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acc.mantissa = BIT41;
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mr = 0;
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acc.exponent -= 80;
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goto chk_zero;
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}
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}
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chk_zero:
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if (rr)
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rnd_rq = 0;
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chk_rnd:
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if (acc.exponent & 0x8000)
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goto zero;
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if (! (RAU & RAU_ROUND_DISABLE) && rnd_rq)
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acc.mantissa |= 1;
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if (! acc.mantissa && ! (RAU & RAU_NORM_DISABLE)) {
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zero: ACC = 0;
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RMR &= ~BITS40;
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return;
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}
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ACC = (t_value) (acc.exponent & BITS(7)) << 41 |
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(acc.mantissa & BITS41);
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RMR = (RMR & ~BITS40) | (mr & BITS40);
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/* При переполнении мантисса и младшие разряды порядка верны */
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if (acc.exponent & 0x80) {
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if (! (RAU & RAU_OVF_DISABLE))
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longjmp (cpu_halt, STOP_OVFL);
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}
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}
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/*
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* Сложение и все варианты вычитаний.
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* Исходные значения: регистр ACC и аргумент 'val'.
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* Результат помещается в регистр ACC и 40-1 разряды RMR.
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*/
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void besm6_add (t_value val, int negate_acc, int negate_val)
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{
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t_uint64 mr;
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alureg_t acc, word, a1, a2;
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int diff, neg, rnd_rq = 0;
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acc = toalu (ACC);
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word = toalu (val);
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if (! negate_acc) {
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if (! negate_val) {
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/* Сложение */
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} else {
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/* Вычитание */
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negate (&word);
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}
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} else {
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if (! negate_val) {
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/* Обратное вычитание */
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negate (&acc);
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} else {
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/* Вычитание модулей */
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if (is_negative (&acc))
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negate (&acc);
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if (! is_negative (&word))
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negate (&word);
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}
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}
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diff = acc.exponent - word.exponent;
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if (diff < 0) {
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diff = -diff;
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a1 = acc;
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a2 = word;
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} else {
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a1 = word;
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a2 = acc;
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}
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mr = 0;
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neg = is_negative (&a1);
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if (diff == 0) {
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/* Nothing to do. */
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} else if (diff <= 40) {
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rnd_rq = (mr = (a1.mantissa << (40 - diff)) & BITS40) != 0;
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a1.mantissa = ((a1.mantissa >> diff) |
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(neg ? (~0ll << (40 - diff)) : 0)) & BITS42;
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} else if (diff <= 80) {
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diff -= 40;
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rnd_rq = a1.mantissa != 0;
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mr = ((a1.mantissa >> diff) |
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(neg ? (~0ll << (40 - diff)) : 0)) & BITS40;
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if (neg) {
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a1.mantissa = BITS42;
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} else
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a1.mantissa = 0;
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} else {
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rnd_rq = a1.mantissa != 0;
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if (neg) {
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mr = BITS40;
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a1.mantissa = BITS42;
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} else
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mr = a1.mantissa = 0;
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}
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acc.exponent = a2.exponent;
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acc.mantissa = a1.mantissa + a2.mantissa;
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/* Если требуется нормализация вправо, биты 42:41
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* принимают значение 01 или 10. */
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switch ((acc.mantissa >> 40) & 3) {
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case 2:
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case 1:
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rnd_rq |= acc.mantissa & 1;
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mr = (mr >> 1) | ((acc.mantissa & 1) << 39);
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acc.mantissa >>= 1;
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++acc.exponent;
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}
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normalize_and_round (acc, mr, rnd_rq);
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}
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/*
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* non-restoring division
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*/
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#define ABS(x) ((x) < 0 ? -x : x)
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#define INT64(x) ((x) & BIT41 ? (0xFFFFFFFFFFFFFFFFLL << 40) | (x) : x)
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static alureg_t nrdiv (alureg_t n, alureg_t d)
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{
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t_int64 nn, dd, q, res;
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alureg_t quot;
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/* to compensate for potential normalization to the right */
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nn = INT64(n.mantissa)*2;
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dd = INT64(d.mantissa)*2;
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res = 0, q = BIT41;
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if (ABS(nn) >= ABS(dd)) {
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/* normalization to the right */
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nn/=2;
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n.exponent++;
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}
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while (q > 1) {
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if (nn == 0)
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break;
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if (ABS(nn) < BIT40)
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nn *= 2; /* magic shortcut */
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else if ((nn > 0) ^ (dd > 0)) {
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res -= q;
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nn = 2*nn+dd;
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} else {
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res += q;
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nn = 2*nn-dd;
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}
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q /= 2;
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}
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quot.mantissa = res/2;
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quot.exponent = n.exponent-d.exponent+64;
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return quot;
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}
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/*
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* Деление.
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* Исходные значения: регистр ACC и аргумент 'val'.
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* Результат помещается в регистр ACC, содержимое RMR не определено.
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*/
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void besm6_divide (t_value val)
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{
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alureg_t acc;
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alureg_t dividend, divisor;
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if (((val ^ (val << 1)) & BIT41) == 0) {
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/* Ненормализованный делитель: деление на ноль. */
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longjmp (cpu_halt, STOP_DIVZERO);
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}
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dividend = toalu(ACC);
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divisor = toalu(val);
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acc = nrdiv(dividend, divisor);
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normalize_and_round (acc, 0, 0);
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}
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/*
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* Умножение.
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* Исходные значения: регистр ACC и аргумент 'val'.
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* Результат помещается в регистр ACC и 40-1 разряды RMR.
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*/
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void besm6_multiply (t_value val)
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{
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uint8 neg = 0;
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alureg_t acc, word, a, b;
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t_uint64 mr, alo, blo, ahi, bhi;
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register t_uint64 l;
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if (! ACC || ! val) {
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/* multiplication by zero is zero */
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ACC = 0;
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RMR &= ~BITS40;
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return;
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}
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acc = toalu (ACC);
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word = toalu (val);
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a = acc;
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b = word;
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mr = 0;
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if (is_negative (&a)) {
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neg = 1;
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negate (&a);
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}
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if (is_negative (&b)) {
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neg ^= 1;
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negate (&b);
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}
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acc.exponent = a.exponent + b.exponent - 64;
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alo = a.mantissa & BITS(20);
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ahi = a.mantissa >> 20;
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blo = b.mantissa & BITS(20);
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bhi = b.mantissa >> 20;
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l = alo * blo + ((alo * bhi + ahi * blo) << 20);
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mr = l & BITS40;
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l >>= 40;
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acc.mantissa = l + ahi * bhi;
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if (neg && (acc.mantissa || mr)) {
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mr = (~mr & BITS40) + 1;
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acc.mantissa = ((~acc.mantissa & BITS40) + (mr >> 40))
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| BIT41 | BIT42;
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mr &= BITS40;
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}
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normalize_and_round (acc, mr, mr != 0);
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}
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/*
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* Изменение знака числа на сумматоре ACC.
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* Результат помещается в регистр ACC, RMR гасится.
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*/
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void besm6_change_sign (int negate_acc)
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{
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alureg_t acc;
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acc = toalu (ACC);
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if (negate_acc)
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negate (&acc);
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RMR = 0;
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normalize_and_round (acc, 0, 0);
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}
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/*
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* Изменение порядка числа на сумматоре ACC.
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* Результат помещается в регистр ACC, RMR гасится.
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*/
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void besm6_add_exponent (int val)
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{
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alureg_t acc;
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acc = toalu (ACC);
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acc.exponent += val;
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RMR = 0;
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normalize_and_round (acc, 0, 0);
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}
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/*
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* Сборка значения по маске.
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*/
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t_value besm6_pack (t_value val, t_value mask)
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{
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t_value result;
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result = 0;
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for (; mask; mask>>=1, val>>=1)
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if (mask & 1) {
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result >>= 1;
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if (val & 1)
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result |= BIT48;
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}
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return result;
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}
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/*
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* Разборка значения по маске.
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*/
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t_value besm6_unpack (t_value val, t_value mask)
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{
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t_value result;
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int i;
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result = 0;
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for (i=0; i<48; ++i) {
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result <<= 1;
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if (mask & BIT48) {
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if (val & BIT48)
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result |= 1;
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val <<= 1;
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}
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mask <<= 1;
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}
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return result;
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}
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/*
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* Подсчёт количества единиц в слове.
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*/
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int besm6_count_ones (t_value word)
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{
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int c;
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for (c=0; word; ++c)
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word &= word-1;
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return c;
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}
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/*
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* Сдвиг сумматора ACC с выдвижением в регистр младших разрядов RMR.
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* Величина сдвига находится в диапазоне -64..63.
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*/
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void besm6_shift (int i)
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{
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RMR = 0;
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if (i > 0) {
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/* Сдвиг вправо. */
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if (i < 48) {
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RMR = (ACC << (48-i)) & BITS48;
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ACC >>= i;
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} else {
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RMR = ACC >> (i-48);
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ACC = 0;
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}
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} else if (i < 0) {
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/* Сдвиг влево. */
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i = -i;
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if (i < 48) {
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RMR = ACC >> (48-i);
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ACC = (ACC << i) & BITS48;
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} else {
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RMR = (ACC << (i-48)) & BITS48;
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ACC = 0;
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}
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}
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}
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