b7c1eae41f
The source set has been extensively overhauled. For correct viewing, set Visual C++ or Emacs to have tab stops every 4 characters. 1. New Features in 3.4-1 1.1 All Ethernet devices - Added Windows user-defined adapter names (from Timothe Litt) 1.2 Interdata, SDS, HP, PDP-8, PDP-18b terminal multiplexors - Added support for SET <unit>n DISCONNECT 1.3 VAX - Added latent QDSS support - Revised autoconfigure to handle QDSS 1.4 PDP-11 - Revised autoconfigure to handle more casees 2. Bugs Fixed in 3.4-1 2.1 SCP and libraries - Trim trailing spaces on all input (for example, attach file names) - Fixed sim_sock spurious SIGPIPE error in Unix/Linux - Fixed sim_tape misallocation of TPC map array for 64b simulators 2.2 1401 - Fixed bug, CPU reset was clearing SSB through SSG 2.3 PDP-11 - Fixed bug in VH vector display routine - Fixed XU runt packet processing (found by Tim Chapman) 2.4 Interdata - Fixed bug in SHOW PAS CONN/STATS - Fixed potential integer overflow exception in divide 2.5 SDS - Fixed bug in SHOW MUX CONN/STATS 2.6 HP - Fixed bug in SHOW MUX CONN/STATS 2.7 PDP-8 - Fixed bug in SHOW TTIX CONN/STATS - Fixed bug in SET/SHOW TTOXn LOG 2.8 PDP-18b - Fixed bug in SHOW TTIX CONN/STATS - Fixed bug in SET/SHOW TTOXn LOG 2.9 Nova, Eclipse - Fixed potential integer overflow exception in divide
103 lines
4.6 KiB
C
103 lines
4.6 KiB
C
/* hp2100_cpu.h: HP 2100 CPU definitions
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Copyright (c) 2005, Robert M. Supnik
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Permission is hereby granted, free of charge, to any person obtaining a
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copy of this software and associated documentation files (the "Software"),
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to deal in the Software without restriction, including without limitation
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the rights to use, copy, modify, merge, publish, distribute, sublicense,
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and/or sell copies of the Software, and to permit persons to whom the
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Software is furnished to do so, subject to the following conditions:
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The above copyright notice and this permission notice shall be included in
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all copies or substantial portions of the Software.
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THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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ROBERT M SUPNIK BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
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IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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Except as contained in this notice, the name of Robert M Supnik shall not
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be used in advertising or otherwise to promote the sale, use or other dealings
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in this Software without prior written authorization from Robert M Supnik.
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21-Jan-05 JDB Reorganized CPU option flags
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14-Jan-05 RMS Cloned from hp2100_cpu.c
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CPU models are broken down into type and series to facilitate option
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validation. Bits 3:2 encode the type, and bits 1:0 encode the series
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within the type.
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*/
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#ifndef _HP2100_CPU_H_
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#define _HP2100_CPU_H_ 0
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#define CPU_V_SERIES 0
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#define CPU_V_TYPE 2
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#define TYPE_211X 0 /* 2114, 2115, 2116 */
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#define TYPE_2100 1 /* 2100A, 2100S */
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#define TYPE_21MX 2 /* 21MX-M, 21MX-E, 21MX-F */
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#define TYPE_1000A 3 /* A600, A700, A900, A990 */
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#define CPU_2116 (TYPE_211X << CPU_V_TYPE | 0)
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#define CPU_2100 (TYPE_2100 << CPU_V_TYPE | 0)
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#define CPU_21MX_M (TYPE_21MX << CPU_V_TYPE | 0)
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#define CPU_21MX_E (TYPE_21MX << CPU_V_TYPE | 1)
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#define UNIT_V_CPU (UNIT_V_UF + 0) /* CPU model bits 0-3 */
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#define UNIT_M_CPU 017 /* CPU model mask */
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#define UNIT_M_TYPE 014 /* CPU type mask */
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#define UNIT_V_EAU (UNIT_V_UF + 4) /* EAU installed */
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#define UNIT_V_FP (UNIT_V_UF + 5) /* FP installed */
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#define UNIT_V_IOP (UNIT_V_UF + 6) /* IOP installed */
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#define UNIT_V_DMS (UNIT_V_UF + 7) /* DMS installed */
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#define UNIT_V_FFP (UNIT_V_UF + 8) /* FFP installed */
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#define UNIT_CPU_MASK (UNIT_M_CPU << UNIT_V_CPU)
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#define UNIT_2116 (CPU_2116 << UNIT_V_CPU)
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#define UNIT_2100 (CPU_2100 << UNIT_V_CPU)
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#define UNIT_21MX_M (CPU_21MX_M << UNIT_V_CPU)
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#define UNIT_21MX_E (CPU_21MX_E << UNIT_V_CPU)
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#define UNIT_TYPE_MASK (UNIT_M_TYPE << UNIT_V_CPU)
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#define UNIT_TYPE_211X ((TYPE_211X << CPU_V_TYPE) << UNIT_V_CPU)
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#define UNIT_TYPE_2100 ((TYPE_2100 << CPU_V_TYPE) << UNIT_V_CPU)
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#define UNIT_TYPE_21MX ((TYPE_21MX << CPU_V_TYPE) << UNIT_V_CPU)
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#define UNIT_CPU_MODEL (cpu_unit.flags & UNIT_CPU_MASK)
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#define UNIT_CPU_TYPE (cpu_unit.flags & UNIT_TYPE_MASK)
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#define CPU_TYPE (UNIT_CPU_TYPE >> (UNIT_V_CPU + CPU_V_TYPE))
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#define UNIT_EAU (1 << UNIT_V_EAU)
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#define UNIT_FP (1 << UNIT_V_FP)
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#define UNIT_IOP (1 << UNIT_V_IOP)
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#define UNIT_DMS (1 << UNIT_V_DMS)
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#define UNIT_FFP (1 << UNIT_V_FFP)
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#define UNIT_OPTS (UNIT_EAU | UNIT_FP | UNIT_IOP | UNIT_DMS | UNIT_FFP)
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#define PCQ_SIZE 64 /* must be 2**n */
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#define PCQ_MASK (PCQ_SIZE - 1)
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#define PCQ_ENTRY pcq[pcq_p = (pcq_p - 1) & PCQ_MASK] = err_PC
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t_stat resolve (uint32 MA, uint32 *addr, uint32 irq);
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uint8 ReadB (uint32 addr);
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uint8 ReadBA (uint32 addr);
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uint16 ReadW (uint32 addr);
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uint16 ReadWA (uint32 addr);
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uint32 ReadF (uint32 addr);
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void WriteB (uint32 addr, uint32 dat);
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void WriteBA (uint32 addr, uint32 dat);
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void WriteW (uint32 addr, uint32 dat);
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void WriteWA (uint32 addr, uint32 dat);
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t_stat iogrp (uint32 ir, uint32 iotrap);
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void mp_dms_jmp (uint32 va);
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uint16 dms_rmap (uint32 mapi);
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void dms_wmap (uint32 mapi, uint32 dat);
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void dms_viol (uint32 va, uint32 st);
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uint32 dms_upd_sr (void);
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#endif
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