a12e4a1c39
The source set has been extensively overhauled. For correct viewing, set Visual C++ or Emacs to have tab stops every 4 characters. 1. New Features 1.1 3.5-0 1.1.1 All Ethernet devices - Added Windows user-defined adapter names (from Timothe Litt) 1.1.2 Interdata, SDS, HP, PDP-8, PDP-18b terminal multiplexors - Added support for SET <unit>n DISCONNECT 1.1.3 VAX - Added latent QDSS support - Revised autoconfigure to handle QDSS 1.1.4 PDP-11 - Revised autoconfigure to handle more cases 1.2 3.5-1 No new features 1.3 3.5-2 1.3.1 All ASCII terminals - Most ASCII terminal emulators have supported 7-bit and 8-bit operation; where required, they have also supported an upper- case only or KSR-emulation mode. This release adds a new mode, 7P, for 7-bit printing characters. In 7P mode, non-printing characters in the range 0-31 (decimal), and 127 (decimal), are automatically suppressed. This prevents printing of fill characters under Windows. The printable character set for ASCII code values 0-31 can be changed with the SET CONSOLE PCHAR command. Code value 127 (DELETE) is always suppressed. 1.3.2 VAX-11/780 - First release. The VAX-11/780 has successfully run VMS V7.2. The commercial instructions and compatability mode have not been extensively tested. The Ethernet controller is not working yet and is disabled. 2. Bugs Fixed 2.1 3.5-0 2.1.1 SCP and libraries - Trim trailing spaces on all input (for example, attach file names) - Fixed sim_sock spurious SIGPIPE error in Unix/Linux - Fixed sim_tape misallocation of TPC map array for 64b simulators 2.1.2 1401 - Fixed bug, CPU reset was clearing SSB through SSG 2.1.3 PDP-11 - Fixed bug in VH vector display routine - Fixed XU runt packet processing (found by Tim Chapman) 2.1.4 Interdata - Fixed bug in SHOW PAS CONN/STATS - Fixed potential integer overflow exception in divide 2.1.5 SDS - Fixed bug in SHOW MUX CONN/STATS 2.1.6 HP - Fixed bug in SHOW MUX CONN/STATS 2.1.7 PDP-8 - Fixed bug in SHOW TTIX CONN/STATS - Fixed bug in SET/SHOW TTOXn LOG 2.1.8 PDP-18b - Fixed bug in SHOW TTIX CONN/STATS - Fixed bug in SET/SHOW TTOXn LOG 2.1.9 Nova, Eclipse - Fixed potential integer overflow exception in divide 2.2 3.5-1 2.2.1 1401 - Changed character encodings to be compatible with Pierce 709X simulator - Added mode for old/new character encodings 2.2.2 1620 - Changed character encodings to be compatible with Pierce 709X simulator 2.2.3 PDP-10 - Changed MOVNI to eliminate GCC warning 2.2.4 VAX - Fixed bug in structure definitions with 32b compilation options - Fixed bug in autoconfiguration table 2.2.5 PDP-11 - Fixed bug in autoconfiguration table 2.3 3.5-2 2.3.1 PDP-10 - RP: fixed drive clear not to clear disk address 2.3.2 PDP-11 (VAX, VAX-11/780, for shared peripherals) - HK: fixed overlap seek interaction with drive select, drive clear, etc - RQ, TM, TQ, TS, TU: widened address display to 64b when USE_ADDR64 option selected - TU: changed default adapter from TM02 to TM03 (required by VMS) - RP: fixed drive clear not to clear disk address - RP, TU: fixed device enable/disable to enabled/disable Massbus adapter as well - XQ: fixed register access alignment bug (found by Doug Carman) 2.3.3 PDP-8 - RL: fixed IOT 61 decoding bug (found by David Gesswein) - DF, DT, RF: fixed register access alignment bug (found by Doug Carman) 2.3.4 VAX - Fixed CVTfi to trap on integer overflow if PSW<iv> is set - Fixed breakpoint detection when USE_ADDR64 option selected
707 lines
29 KiB
C
707 lines
29 KiB
C
/* pdp11_tm.c: PDP-11 magnetic tape simulator
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Copyright (c) 1993-2005, Robert M Supnik
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Permission is hereby granted, free of charge, to any person obtaining a
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copy of this software and associated documentation files (the "Software"),
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to deal in the Software without restriction, including without limitation
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the rights to use, copy, modify, merge, publish, distribute, sublicense,
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and/or sell copies of the Software, and to permit persons to whom the
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Software is furnished to do so, subject to the following conditions:
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The above copyright notice and this permission notice shall be included in
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all copies or substantial portions of the Software.
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THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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ROBERT M SUPNIK BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
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IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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Except as contained in this notice, the name of Robert M Supnik shall not be
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used in advertising or otherwise to promote the sale, use or other dealings
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in this Software without prior written authorization from Robert M Supnik.
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tm TM11/TU10 magtape
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31-Oct-05 RMS Fixed address width for large files
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16-Aug-05 RMS Fixed C++ declaration and cast problems
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07-Jul-05 RMS Removed extraneous externs
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18-Mar-05 RMS Added attached test to detach routine
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07-Dec-04 RMS Added read-only file support
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30-Sep-04 RMS Revised Unibus interface
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25-Jan-04 RMS Revised for device debug support
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29-Dec-03 RMS Added 18b Qbus support
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25-Apr-03 RMS Revised for extended file support
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28-Mar-03 RMS Added multiformat support
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28-Feb-03 RMS Revised for magtape library, added logging
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30-Oct-02 RMS Revised BOT handling, added error record handling
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30-Sep-02 RMS Added variable address support to bootstrap
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Added vector change/display support
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Changed mapping mnemonics
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New data structures
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Updated error handling
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28-Aug-02 RMS Added end of medium support
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30-May-02 RMS Widened POS to 32b
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22-Apr-02 RMS Fixed max record length, first block bootstrap
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(found by Jonathan Engdahl)
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26-Jan-02 RMS Revised bootstrap to conform to M9312
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06-Jan-02 RMS Revised enable/disable support
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30-Nov-01 RMS Added read only unit, extended SET/SHOW support
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24-Nov-01 RMS Converted UST, POS, FLG to arrays
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09-Nov-01 RMS Added bus map support
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18-Oct-01 RMS Added stub diagnostic register (found by Thord Nilson)
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07-Sep-01 RMS Revised device disable and interrupt mechanisms
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26-Apr-01 RMS Added device enable/disable support
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18-Apr-01 RMS Changed to rewind tape before boot
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14-Apr-99 RMS Changed t_addr to unsigned
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04-Oct-98 RMS V2.4 magtape format
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10-May-98 RMS Fixed bug with non-zero unit operation (from Steven Schultz)
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09-May-98 RMS Fixed problems in bootstrap (from Steven Schultz)
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10-Apr-98 RMS Added 2nd block bootstrap (from John Holden,
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University of Sydney)
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31-Jul-97 RMS Added bootstrap (from Ethan Dicks, Ohio State)
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22-Jan-97 RMS V2.3 magtape format
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18-Jan-97 RMS Fixed double interrupt, error flag bugs
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29-Jun-96 RMS Added unit disable support
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Magnetic tapes are represented as a series of variable 8b records
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of the form:
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32b record length in bytes - exact number
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byte 0
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byte 1
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:
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byte n-2
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byte n-1
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32b record length in bytes - exact number
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If the byte count is odd, the record is padded with an extra byte
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of junk. File marks are represented by a single record length of 0.
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End of tape is two consecutive end of file marks.
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*/
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#include "pdp11_defs.h"
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#include "sim_tape.h"
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#define TM_NUMDR 8 /* #drives */
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#define USTAT u3 /* unit status */
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/* Command - tm_cmd */
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#define MTC_ERR (1 << CSR_V_ERR) /* error */
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#define MTC_V_DEN 13 /* density */
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#define MTC_M_DEN 03
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#define MTC_DEN (MTC_M_DEN << MTC_V_DEN)
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#define MTC_INIT 0010000 /* init */
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#define MTC_LPAR 0004000 /* parity select */
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#define MTC_V_UNIT 8 /* unit */
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#define MTC_M_UNIT 07
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#define MTC_UNIT (MTC_M_UNIT << MTC_V_UNIT)
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#define MTC_DONE (1 << CSR_V_DONE) /* done */
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#define MTC_IE (1 << CSR_V_IE) /* interrupt enable */
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#define MTC_V_EMA 4 /* ext mem address */
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#define MTC_M_EMA 03
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#define MTC_EMA (MTC_M_EMA << MTC_V_EMA)
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#define MTC_V_FNC 1 /* function */
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#define MTC_M_FNC 07
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#define MTC_UNLOAD 00
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#define MTC_READ 01
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#define MTC_WRITE 02
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#define MTC_WREOF 03
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#define MTC_SPACEF 04
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#define MTC_SPACER 05
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#define MTC_WREXT 06
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#define MTC_REWIND 07
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#define MTC_FNC (MTC_M_FNC << MTC_V_FNC)
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#define MTC_GO (1 << CSR_V_GO) /* go */
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#define MTC_RW (MTC_DEN | MTC_LPAR | MTC_UNIT | MTC_IE | \
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MTC_EMA | MTC_FNC)
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#define GET_EMA(x) (((x) & MTC_EMA) << (16 - MTC_V_EMA))
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#define GET_UNIT(x) (((x) >> MTC_V_UNIT) & MTC_M_UNIT)
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#define GET_FNC(x) (((x) >> MTC_V_FNC) & MTC_M_FNC)
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/* Status - stored in tm_sta or (*) uptr->USTAT or (+) calculated */
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#define STA_ILL 0100000 /* illegal */
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#define STA_EOF 0040000 /* *end of file */
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#define STA_CRC 0020000 /* CRC error */
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#define STA_PAR 0010000 /* parity error */
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#define STA_DLT 0004000 /* data late */
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#define STA_EOT 0002000 /* *end of tape */
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#define STA_RLE 0001000 /* rec lnt error */
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#define STA_BAD 0000400 /* bad tape error */
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#define STA_NXM 0000200 /* non-existent mem */
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#define STA_ONL 0000100 /* *online */
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#define STA_BOT 0000040 /* *start of tape */
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#define STA_7TK 0000020 /* 7 track */
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#define STA_SDN 0000010 /* settle down */
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#define STA_WLK 0000004 /* *write locked */
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#define STA_REW 0000002 /* *rewinding */
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#define STA_TUR 0000001 /* +unit ready */
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#define STA_CLR (STA_7TK | STA_SDN) /* always clear */
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#define STA_DYN (STA_EOF | STA_EOT | STA_ONL | STA_BOT | \
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STA_WLK | STA_REW | STA_TUR) /* kept in USTAT */
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#define STA_EFLGS (STA_ILL | STA_EOF | STA_CRC | STA_PAR | \
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STA_DLT | STA_EOT | STA_RLE | STA_BAD | STA_NXM)
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/* set error */
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/* Read lines - tm_rdl */
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#define RDL_CLK 0100000 /* 10 Khz clock */
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extern uint16 *M; /* memory */
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extern int32 int_req[IPL_HLVL];
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extern FILE *sim_deb;
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uint8 *tmxb = NULL; /* xfer buffer */
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int32 tm_sta = 0; /* status register */
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int32 tm_cmd = 0; /* command register */
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int32 tm_ca = 0; /* current address */
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int32 tm_bc = 0; /* byte count */
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int32 tm_db = 0; /* data buffer */
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int32 tm_rdl = 0; /* read lines */
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int32 tm_time = 10; /* record latency */
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int32 tm_stopioe = 1; /* stop on error */
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DEVICE tm_dev;
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t_stat tm_rd (int32 *data, int32 PA, int32 access);
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t_stat tm_wr (int32 data, int32 PA, int32 access);
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t_stat tm_svc (UNIT *uptr);
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t_stat tm_reset (DEVICE *dptr);
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t_stat tm_attach (UNIT *uptr, char *cptr);
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t_stat tm_detach (UNIT *uptr);
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t_stat tm_boot (int32 unitno, DEVICE *dptr);
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void tm_go (UNIT *uptr);
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int32 tm_updcsta (UNIT *uptr);
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void tm_set_done (void);
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t_stat tm_map_err (UNIT *uptr, t_stat st);
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t_stat tm_vlock (UNIT *uptr, int32 val, char *cptr, void *desc);
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/* MT data structures
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tm_dev MT device descriptor
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tm_unit MT unit list
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tm_reg MT register list
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tm_mod MT modifier list
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*/
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DIB tm_dib = {
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IOBA_TM, IOLN_TM, &tm_rd, &tm_wr,
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1, IVCL (TM), VEC_TM, { NULL }
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};
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UNIT tm_unit[] = {
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{ UDATA (&tm_svc, UNIT_ATTABLE + UNIT_ROABLE +UNIT_DISABLE, 0) },
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{ UDATA (&tm_svc, UNIT_ATTABLE + UNIT_ROABLE +UNIT_DISABLE, 0) },
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{ UDATA (&tm_svc, UNIT_ATTABLE + UNIT_ROABLE +UNIT_DISABLE, 0) },
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{ UDATA (&tm_svc, UNIT_ATTABLE + UNIT_ROABLE +UNIT_DISABLE, 0) },
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{ UDATA (&tm_svc, UNIT_ATTABLE + UNIT_ROABLE +UNIT_DISABLE, 0) },
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{ UDATA (&tm_svc, UNIT_ATTABLE + UNIT_ROABLE +UNIT_DISABLE, 0) },
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{ UDATA (&tm_svc, UNIT_ATTABLE + UNIT_ROABLE +UNIT_DISABLE, 0) },
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{ UDATA (&tm_svc, UNIT_ATTABLE + UNIT_ROABLE +UNIT_DISABLE, 0) }
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};
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REG tm_reg[] = {
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{ ORDATA (MTS, tm_sta, 16) },
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{ ORDATA (MTC, tm_cmd, 16) },
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{ ORDATA (MTBRC, tm_bc, 16) },
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{ ORDATA (MTCMA, tm_ca, 16) },
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{ ORDATA (MTD, tm_db, 8) },
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{ ORDATA (MTRD, tm_rdl, 16) },
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{ FLDATA (INT, IREQ (TM), INT_V_TM) },
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{ FLDATA (ERR, tm_cmd, CSR_V_ERR) },
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{ FLDATA (DONE, tm_cmd, CSR_V_DONE) },
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{ FLDATA (IE, tm_cmd, CSR_V_IE) },
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{ FLDATA (STOP_IOE, tm_stopioe, 0) },
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{ DRDATA (TIME, tm_time, 24), PV_LEFT },
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{ URDATA (UST, tm_unit[0].USTAT, 8, 16, 0, TM_NUMDR, 0) },
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{ URDATA (POS, tm_unit[0].pos, 10, T_ADDR_W, 0,
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TM_NUMDR, PV_LEFT | REG_RO) },
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{ ORDATA (DEVADDR, tm_dib.ba, 32), REG_HRO },
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{ ORDATA (DEVVEC, tm_dib.vec, 16), REG_HRO },
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{ NULL }
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};
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MTAB tm_mod[] = {
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{ MTUF_WLK, 0, "write enabled", "WRITEENABLED", &tm_vlock },
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{ MTUF_WLK, MTUF_WLK, "write locked", "LOCKED", &tm_vlock },
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{ MTAB_XTD|MTAB_VUN, 0, "FORMAT", "FORMAT",
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&sim_tape_set_fmt, &sim_tape_show_fmt, NULL },
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{ MTAB_XTD|MTAB_VDV, 020, "ADDRESS", "ADDRESS",
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&set_addr, &show_addr, NULL },
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{ MTAB_XTD|MTAB_VDV, 0, "VECTOR", "VECTOR",
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&set_vec, &show_vec, NULL },
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{ 0 }
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};
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DEVICE tm_dev = {
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"TM", tm_unit, tm_reg, tm_mod,
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TM_NUMDR, 10, T_ADDR_W, 1, 8, 8,
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NULL, NULL, &tm_reset,
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&tm_boot, &tm_attach, &tm_detach,
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&tm_dib, DEV_DISABLE | DEV_UBUS | DEV_Q18 | DEV_DEBUG
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};
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/* I/O dispatch routines, I/O addresses 17772520 - 17772532
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17772520 MTS read only, constructed from tm_sta
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plus current drive status flags
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17772522 MTC read/write
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17772524 MTBRC read/write
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17772526 MTCMA read/write
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17772530 MTD read/write
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17772532 MTRD read only
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*/
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t_stat tm_rd (int32 *data, int32 PA, int32 access)
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{
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UNIT *uptr;
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uptr = tm_dev.units + GET_UNIT (tm_cmd); /* get unit */
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switch ((PA >> 1) & 07) { /* decode PA<3:1> */
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case 0: /* MTS */
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*data = tm_updcsta (uptr); /* update status */
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break;
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case 1: /* MTC */
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tm_updcsta (uptr); /* update status */
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*data = tm_cmd; /* return command */
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break;
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case 2: /* MTBRC */
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*data = tm_bc; /* return byte count */
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break;
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case 3: /* MTCMA */
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*data = tm_ca; /* return mem addr */
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break;
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case 4: /* MTD */
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*data = tm_db; /* return data buffer */
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break;
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case 5: /* MTRD */
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tm_rdl = tm_rdl ^ RDL_CLK; /* "clock" ticks */
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*data = tm_rdl;
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break;
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default: /* unimplemented */
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*data = 0;
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break;
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}
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return SCPE_OK;
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}
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t_stat tm_wr (int32 data, int32 PA, int32 access)
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{
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UNIT *uptr;
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switch ((PA >> 1) & 07) { /* decode PA<3:1> */
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case 0: /* MTS: read only */
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break;
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case 1: /* MTC */
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uptr = tm_dev.units + GET_UNIT (tm_cmd); /* select unit */
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if ((tm_cmd & MTC_DONE) == 0) tm_sta = tm_sta | STA_ILL;
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else {
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if (access == WRITEB) data = (PA & 1)?
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(tm_cmd & 0377) | (data << 8):
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(tm_cmd & ~0377) | data;
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if (data & MTC_INIT) { /* init? */
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tm_reset (&tm_dev); /* reset device */
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return SCPE_OK;
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}
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if ((data & MTC_IE) == 0) /* int disable? */
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CLR_INT (TM); /* clr int request */
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else if ((tm_cmd & (MTC_ERR + MTC_DONE)) && !(tm_cmd & MTC_IE))
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SET_INT (TM); /* set int request */
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tm_cmd = (tm_cmd & ~MTC_RW) | (data & MTC_RW);
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uptr = tm_dev.units + GET_UNIT (tm_cmd); /* new unit */
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if (data & MTC_GO) tm_go (uptr); /* new function? */
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}
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tm_updcsta (uptr); /* update status */
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break;
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case 2: /* MTBRC */
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if (access == WRITEB) data = (PA & 1)?
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(tm_bc & 0377) | (data << 8): (tm_bc & ~0377) | data;
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tm_bc = data;
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break;
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case 3: /* MTCMA */
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if (access == WRITEB) data = (PA & 1)?
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(tm_ca & 0377) | (data << 8): (tm_ca & ~0377) | data;
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tm_ca = data;
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break;
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case 4: /* MTD */
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if ((access == WRITEB) && (PA & 1)) return SCPE_OK;
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tm_db = data & 0377;
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break;
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} /* end switch */
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return SCPE_OK;
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}
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/* New magtape command */
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void tm_go (UNIT *uptr)
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{
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int32 f;
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f = GET_FNC (tm_cmd); /* get function */
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if (((uptr->flags & UNIT_ATT) == 0) || /* not attached? */
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sim_is_active (uptr) || /* busy? */
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(((f == MTC_WRITE) || (f == MTC_WREOF) || (f == MTC_WREXT)) &&
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sim_tape_wrp (uptr))) { /* write locked? */
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tm_sta = tm_sta | STA_ILL; /* illegal */
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tm_set_done (); /* set done */
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return;
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}
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uptr->USTAT = uptr->USTAT & (STA_WLK | STA_ONL); /* clear status */
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tm_sta = 0; /* clear errors */
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if (f == MTC_UNLOAD) { /* unload? */
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uptr->USTAT = (uptr->USTAT | STA_REW) & ~STA_ONL;
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detach_unit (uptr); /* set offline */
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}
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else if (f == MTC_REWIND) /* rewind */
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uptr->USTAT = uptr->USTAT | STA_REW; /* rewinding */
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/* else /* uncomment this else if rewind/unload don't set done */
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tm_cmd = tm_cmd & ~MTC_DONE; /* clear done */
|
|
CLR_INT (TM); /* clear int */
|
|
sim_activate (uptr, tm_time); /* start io */
|
|
return;
|
|
}
|
|
|
|
/* Unit service
|
|
|
|
If rewind done, reposition to start of tape, set status
|
|
else, do operation, set done, interrupt
|
|
*/
|
|
|
|
t_stat tm_svc (UNIT *uptr)
|
|
{
|
|
int32 f, t, u;
|
|
uint32 xma;
|
|
t_mtrlnt tbc, cbc;
|
|
t_stat st, r = SCPE_OK;
|
|
|
|
u = (int32) (uptr - tm_dev.units); /* get unit number */
|
|
f = GET_FNC (tm_cmd); /* get command */
|
|
xma = GET_EMA (tm_cmd) | tm_ca; /* get mem addr */
|
|
cbc = 0200000 - tm_bc; /* get bc */
|
|
|
|
if (uptr->USTAT & STA_REW) { /* rewind? */
|
|
sim_tape_rewind (uptr); /* update position */
|
|
if (uptr->flags & UNIT_ATT) /* still on line? */
|
|
uptr->USTAT = STA_ONL | STA_BOT |
|
|
(sim_tape_wrp (uptr)? STA_WLK: 0);
|
|
else uptr->USTAT = 0;
|
|
if (u == GET_UNIT (tm_cmd)) { /* selected? */
|
|
tm_set_done (); /* set done */
|
|
tm_updcsta (uptr); /* update status */
|
|
}
|
|
return SCPE_OK;
|
|
}
|
|
|
|
if ((uptr->flags & UNIT_ATT) == 0) { /* if not attached */
|
|
uptr->USTAT = 0; /* unit off line */
|
|
tm_sta = tm_sta | STA_ILL; /* illegal operation */
|
|
tm_set_done (); /* set done */
|
|
tm_updcsta (uptr); /* update status */
|
|
return IORETURN (tm_stopioe, SCPE_UNATT);
|
|
}
|
|
|
|
if (DEBUG_PRS (tm_dev)) fprintf (sim_deb,
|
|
">>TM: op=%o, ma=%o, bc=%o, pos=%d\n", f, xma, cbc, uptr->pos);
|
|
switch (f) { /* case on function */
|
|
|
|
case MTC_READ: /* read */
|
|
st = sim_tape_rdrecf (uptr, tmxb, &tbc, MT_MAXFR); /* read rec */
|
|
if (st == MTSE_RECE) tm_sta = tm_sta | STA_PAR; /* rec in error? */
|
|
else if (st != MTSE_OK) { /* other error? */
|
|
r = tm_map_err (uptr, st); /* map error */
|
|
break;
|
|
}
|
|
if (tbc > cbc) tm_sta = tm_sta | STA_RLE; /* wrong size? */
|
|
if (tbc < cbc) cbc = tbc; /* use smaller */
|
|
if (t = Map_WriteB (xma, cbc, tmxb)) { /* copy buf to mem */
|
|
tm_sta = tm_sta | STA_NXM; /* NXM, set err */
|
|
cbc = cbc - t; /* adj byte cnt */
|
|
}
|
|
xma = (xma + cbc) & 0777777; /* inc bus addr */
|
|
tm_bc = (tm_bc + cbc) & 0177777; /* inc byte cnt */
|
|
break;
|
|
|
|
case MTC_WRITE: /* write */
|
|
case MTC_WREXT: /* write ext gap */
|
|
if (t = Map_ReadB (xma, cbc, tmxb)) { /* copy mem to buf */
|
|
tm_sta = tm_sta | STA_NXM; /* NXM, set err */
|
|
cbc = cbc - t; /* adj byte cnt */
|
|
if (cbc == 0) break; /* no xfr? done */
|
|
}
|
|
if (st = sim_tape_wrrecf (uptr, tmxb, cbc)) /* write rec, err? */
|
|
r = tm_map_err (uptr, st); /* map error */
|
|
else {
|
|
xma = (xma + cbc) & 0777777; /* inc bus addr */
|
|
tm_bc = (tm_bc + cbc) & 0177777; /* inc byte cnt */
|
|
}
|
|
break;
|
|
|
|
case MTC_WREOF: /* write eof */
|
|
if (st = sim_tape_wrtmk (uptr)) /* write tmk, err? */
|
|
r = tm_map_err (uptr, st); /* map error */
|
|
break;
|
|
|
|
case MTC_SPACEF: /* space forward */
|
|
do {
|
|
tm_bc = (tm_bc + 1) & 0177777; /* incr wc */
|
|
if (st = sim_tape_sprecf (uptr, &tbc)) { /* spc rec fwd, err? */
|
|
r = tm_map_err (uptr, st); /* map error */
|
|
break;
|
|
}
|
|
} while (tm_bc != 0);
|
|
break;
|
|
|
|
case MTC_SPACER: /* space reverse */
|
|
do {
|
|
tm_bc = (tm_bc + 1) & 0177777; /* incr wc */
|
|
if (st = sim_tape_sprecr (uptr, &tbc)) { /* spc rec rev, err? */
|
|
r = tm_map_err (uptr, st); /* map error */
|
|
break;
|
|
}
|
|
} while (tm_bc != 0);
|
|
break;
|
|
} /* end case */
|
|
|
|
tm_cmd = (tm_cmd & ~MTC_EMA) | ((xma >> (16 - MTC_V_EMA)) & MTC_EMA);
|
|
tm_ca = xma & 0177777; /* update mem addr */
|
|
tm_set_done (); /* set done */
|
|
tm_updcsta (uptr); /* update status */
|
|
if (DEBUG_PRS (tm_dev)) fprintf (sim_deb,
|
|
">>TM: sta=%o, ma=%o, wc=%o, pos=%d\n",
|
|
tm_sta, tm_ca, tm_bc, uptr->pos);
|
|
return r;
|
|
}
|
|
|
|
/* Update controller status */
|
|
|
|
int32 tm_updcsta (UNIT *uptr)
|
|
{
|
|
tm_sta = (tm_sta & ~(STA_DYN | STA_CLR)) | (uptr->USTAT & STA_DYN);
|
|
if (sim_is_active (uptr)) tm_sta = tm_sta & ~STA_TUR;
|
|
else tm_sta = tm_sta | STA_TUR;
|
|
if (tm_sta & STA_EFLGS) tm_cmd = tm_cmd | MTC_ERR;
|
|
else tm_cmd = tm_cmd & ~MTC_ERR;
|
|
if ((tm_cmd & MTC_IE) == 0) CLR_INT (TM);
|
|
return tm_sta;
|
|
}
|
|
|
|
/* Set done */
|
|
|
|
void tm_set_done (void)
|
|
{
|
|
tm_cmd = tm_cmd | MTC_DONE;
|
|
if (tm_cmd & MTC_IE) SET_INT (TM);
|
|
return;
|
|
}
|
|
|
|
/* Map tape error status */
|
|
|
|
t_stat tm_map_err (UNIT *uptr, t_stat st)
|
|
{
|
|
switch (st) {
|
|
|
|
case MTSE_FMT: /* illegal fmt */
|
|
case MTSE_UNATT: /* not attached */
|
|
tm_sta = tm_sta | STA_ILL;
|
|
case MTSE_OK: /* no error */
|
|
return SCPE_IERR;
|
|
|
|
case MTSE_TMK: /* tape mark */
|
|
uptr->USTAT = uptr->USTAT | STA_EOF; /* end of file */
|
|
break;
|
|
|
|
case MTSE_IOERR: /* IO error */
|
|
tm_sta = tm_sta | STA_PAR; /* parity error */
|
|
if (tm_stopioe) return SCPE_IOERR;
|
|
break;
|
|
|
|
case MTSE_INVRL: /* invalid rec lnt */
|
|
tm_sta = tm_sta | STA_PAR; /* parity error */
|
|
return SCPE_MTRLNT;
|
|
|
|
case MTSE_RECE: /* record in error */
|
|
tm_sta = tm_sta | STA_PAR; /* parity error */
|
|
break;
|
|
|
|
case MTSE_EOM: /* end of medium */
|
|
tm_sta = tm_sta | STA_BAD; /* bad tape */
|
|
break;
|
|
|
|
case MTSE_BOT: /* reverse into BOT */
|
|
uptr->USTAT = uptr->USTAT | STA_BOT; /* set status */
|
|
break;
|
|
|
|
case MTSE_WRP: /* write protect */
|
|
tm_sta = tm_sta | STA_ILL; /* illegal operation */
|
|
break;
|
|
}
|
|
|
|
return SCPE_OK;
|
|
}
|
|
|
|
/* Reset routine */
|
|
|
|
t_stat tm_reset (DEVICE *dptr)
|
|
{
|
|
int32 u;
|
|
UNIT *uptr;
|
|
|
|
tm_cmd = MTC_DONE; /* set done */
|
|
tm_bc = tm_ca = tm_db = tm_sta = tm_rdl = 0;
|
|
CLR_INT (TM); /* clear interrupt */
|
|
for (u = 0; u < TM_NUMDR; u++) { /* loop thru units */
|
|
uptr = tm_dev.units + u;
|
|
sim_tape_reset (uptr); /* reset tape */
|
|
sim_cancel (uptr); /* cancel activity */
|
|
if (uptr->flags & UNIT_ATT) uptr->USTAT = STA_ONL |
|
|
(sim_tape_bot (uptr)? STA_BOT: 0) |
|
|
(sim_tape_wrp (uptr)? STA_WLK: 0);
|
|
else uptr->USTAT = 0;
|
|
}
|
|
if (tmxb == NULL) tmxb = (uint8 *) calloc (MT_MAXFR, sizeof (uint8));
|
|
if (tmxb == NULL) return SCPE_MEM;
|
|
return SCPE_OK;
|
|
}
|
|
|
|
/* Attach routine */
|
|
|
|
t_stat tm_attach (UNIT *uptr, char *cptr)
|
|
{
|
|
t_stat r;
|
|
int32 u = uptr - tm_dev.units;
|
|
|
|
r = sim_tape_attach (uptr, cptr);
|
|
if (r != SCPE_OK) return r;
|
|
uptr->USTAT = STA_ONL | STA_BOT | (sim_tape_wrp (uptr)? STA_WLK: 0);
|
|
if (u == GET_UNIT (tm_cmd)) tm_updcsta (uptr);
|
|
return r;
|
|
}
|
|
|
|
/* Detach routine */
|
|
|
|
t_stat tm_detach (UNIT* uptr)
|
|
{
|
|
int32 u = uptr - tm_dev.units;
|
|
|
|
if (!(uptr->flags & UNIT_ATT)) return SCPE_OK;
|
|
if (!sim_is_active (uptr)) uptr->USTAT = 0;
|
|
if (u == GET_UNIT (tm_cmd)) tm_updcsta (uptr);
|
|
return sim_tape_detach (uptr);
|
|
}
|
|
|
|
/* Write lock/enable routine */
|
|
|
|
t_stat tm_vlock (UNIT *uptr, int32 val, char *cptr, void *desc)
|
|
{
|
|
int32 u = uptr - tm_dev.units;
|
|
|
|
if ((uptr->flags & UNIT_ATT) &&
|
|
(val || sim_tape_wrp (uptr)))
|
|
uptr->USTAT = uptr->USTAT | STA_WLK;
|
|
else uptr->USTAT = uptr->USTAT & ~STA_WLK;
|
|
if (u == GET_UNIT (tm_cmd)) tm_updcsta (uptr);
|
|
return SCPE_OK;
|
|
}
|
|
|
|
/* Device bootstrap
|
|
|
|
Magtape boot format changed over time. Originally, a boot tape
|
|
contained a boot loader in the first block. Eventually, the first
|
|
block was reserved for a tape label, and the second block was
|
|
expected to contain a boot loader. BSD and DEC operating systems
|
|
use the second block scheme, so it is the default.
|
|
|
|
To boot from the first block, use boot -o (old).
|
|
*/
|
|
|
|
#define BOOT_START 016000
|
|
#define BOOT_ENTRY (BOOT_START + 2)
|
|
#define BOOT_UNIT (BOOT_START + 010)
|
|
#define BOOT_CSR (BOOT_START + 014)
|
|
#define BOOT1_LEN (sizeof (boot1_rom) / sizeof (int16))
|
|
#define BOOT2_LEN (sizeof (boot2_rom) / sizeof (int16))
|
|
|
|
static const uint16 boot1_rom[] = {
|
|
0046524, /* boot_start: "TM" */
|
|
0012706, BOOT_START, /* mov #boot_start, sp */
|
|
0012700, 0000000, /* mov #unit_num, r0 */
|
|
0012701, 0172526, /* mov #172526, r1 ; mtcma */
|
|
0005011, /* clr (r1) */
|
|
0010141, /* mov r1, -(r1) ; mtbrc */
|
|
0010002, /* mov r0,r2 */
|
|
0000302, /* swab r2 */
|
|
0062702, 0060003, /* add #60003, r2 */
|
|
0010241, /* mov r2, -(r1) ; read + go */
|
|
0105711, /* tstb (r1) ; mtc */
|
|
0100376, /* bpl .-2 */
|
|
0005002, /* clr r2 */
|
|
0005003, /* clr r3 */
|
|
0012704, BOOT_START+020, /* mov #boot_start+20, r4 */
|
|
0005005, /* clr r5 */
|
|
0005007 /* clr r7 */
|
|
};
|
|
|
|
static const uint16 boot2_rom[] = {
|
|
0046524, /* boot_start: "TM" */
|
|
0012706, BOOT_START, /* mov #boot_start, sp */
|
|
0012700, 0000000, /* mov #unit_num, r0 */
|
|
0012701, 0172526, /* mov #172526, r1 ; mtcma */
|
|
0005011, /* clr (r1) */
|
|
0012741, 0177777, /* mov #-1, -(r1) ; mtbrc */
|
|
0010002, /* mov r0,r2 */
|
|
0000302, /* swab r2 */
|
|
0062702, 0060011, /* add #60011, r2 */
|
|
0010241, /* mov r2, -(r1) ; space + go */
|
|
0105711, /* tstb (r1) ; mtc */
|
|
0100376, /* bpl .-2 */
|
|
0010002, /* mov r0,r2 */
|
|
0000302, /* swab r2 */
|
|
0062702, 0060003, /* add #60003, r2 */
|
|
0010211, /* mov r2, (r1) ; read + go */
|
|
0105711, /* tstb (r1) ; mtc */
|
|
0100376, /* bpl .-2 */
|
|
0005002, /* clr r2 */
|
|
0005003, /* clr r3 */
|
|
0012704, BOOT_START+020, /* mov #boot_start+20, r4 */
|
|
0005005, /* clr r5 */
|
|
0005007 /* clr r7 */
|
|
};
|
|
|
|
t_stat tm_boot (int32 unitno, DEVICE *dptr)
|
|
{
|
|
int32 i;
|
|
extern int32 saved_PC;
|
|
extern int32 sim_switches;
|
|
|
|
sim_tape_rewind (&tm_unit[unitno]);
|
|
if (sim_switches & SWMASK ('O')) {
|
|
for (i = 0; i < BOOT1_LEN; i++)
|
|
M[(BOOT_START >> 1) + i] = boot1_rom[i];
|
|
}
|
|
else {
|
|
for (i = 0; i < BOOT2_LEN; i++)
|
|
M[(BOOT_START >> 1) + i] = boot2_rom[i];
|
|
}
|
|
M[BOOT_UNIT >> 1] = unitno;
|
|
M[BOOT_CSR >> 1] = (tm_dib.ba & DMASK) + 06;
|
|
saved_PC = BOOT_ENTRY;
|
|
return SCPE_OK;
|
|
}
|